From: Sasha Levin Date: Wed, 13 Jan 2021 17:32:19 +0000 (-0500) Subject: Fixes for 4.9 X-Git-Tag: v4.4.252~35 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=0ba901f1ea21181f5a679bc38abc5374d58cef38;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 4.9 Signed-off-by: Sasha Levin --- diff --git a/queue-4.9/powerpc-fix-incorrect-stw-ux-u-x-instructions-in-__s.patch b/queue-4.9/powerpc-fix-incorrect-stw-ux-u-x-instructions-in-__s.patch new file mode 100644 index 00000000000..bc55b5ebec7 --- /dev/null +++ b/queue-4.9/powerpc-fix-incorrect-stw-ux-u-x-instructions-in-__s.patch @@ -0,0 +1,69 @@ +From fc5ceba2495d205149e515a65044092e996c3cf8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 07:12:44 +0000 +Subject: powerpc: Fix incorrect stw{, ux, u, x} instructions in __set_pte_at + +From: Mathieu Desnoyers + +[ Upstream commit d85be8a49e733dcd23674aa6202870d54bf5600d ] + +The placeholder for instruction selection should use the second +argument's operand, which is %1, not %0. This could generate incorrect +assembly code if the memory addressing of operand %0 is a different +form from that of operand %1. + +Also remove the %Un placeholder because having %Un placeholders +for two operands which are based on the same local var (ptep) doesn't +make much sense. By the way, it doesn't change the current behaviour +because "<>" constraint is missing for the associated "=m". + +[chleroy: revised commit log iaw segher's comments and removed %U0] + +Fixes: 9bf2b5cdc5fe ("powerpc: Fixes for CONFIG_PTE_64BIT for SMP support") +Cc: # v2.6.28+ +Signed-off-by: Mathieu Desnoyers +Signed-off-by: Christophe Leroy +Acked-by: Segher Boessenkool +Signed-off-by: Michael Ellerman +Link: https://lore.kernel.org/r/96354bd77977a6a933fe9020da57629007fdb920.1603358942.git.christophe.leroy@csgroup.eu +Signed-off-by: Sasha Levin +--- + arch/powerpc/include/asm/book3s/32/pgtable.h | 4 ++-- + arch/powerpc/include/asm/nohash/pgtable.h | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h +index 6b8b2d57fdc8c..e588028922a83 100644 +--- a/arch/powerpc/include/asm/book3s/32/pgtable.h ++++ b/arch/powerpc/include/asm/book3s/32/pgtable.h +@@ -411,9 +411,9 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, + if (pte_val(*ptep) & _PAGE_HASHPTE) + flush_hash_entry(mm, ptep, addr); + __asm__ __volatile__("\ +- stw%U0%X0 %2,%0\n\ ++ stw%X0 %2,%0\n\ + eieio\n\ +- stw%U0%X0 %L2,%1" ++ stw%X1 %L2,%1" + : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) + : "r" (pte) : "memory"); + +diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h +index 1263c22d60d85..330fe178c0c5e 100644 +--- a/arch/powerpc/include/asm/nohash/pgtable.h ++++ b/arch/powerpc/include/asm/nohash/pgtable.h +@@ -155,9 +155,9 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, + flush_hash_entry(mm, ptep, addr); + #endif + __asm__ __volatile__("\ +- stw%U0%X0 %2,%0\n\ ++ stw%X0 %2,%0\n\ + eieio\n\ +- stw%U0%X0 %L2,%1" ++ stw%X1 %L2,%1" + : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) + : "r" (pte) : "memory"); + +-- +2.27.0 + diff --git a/queue-4.9/series b/queue-4.9/series index 4a7bc2141d0..108b6fc04d0 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -4,3 +4,4 @@ target-use-xcopy-segment-descriptor-cscd-ids.patch xcopy-loop-over-devices-using-idr-helper.patch scsi-target-fix-xcopy-naa-identifier-lookup.patch target-add-xcopy-target-segment-desc-sense-codes.patch +powerpc-fix-incorrect-stw-ux-u-x-instructions-in-__s.patch