From: Nikos Mavrogiannopoulos Date: Mon, 11 Apr 2011 14:26:35 +0000 (+0200) Subject: fixes in acceleration detection. X-Git-Tag: gnutls_2_99_1~54 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=0baa0937de0e5534b2010039ab047ce8eb7cf92a;p=thirdparty%2Fgnutls.git fixes in acceleration detection. Added Intel's library code for AES-NI acceleration. --- diff --git a/.gitignore b/.gitignore index c1aac5b080..42008a71d0 100644 --- a/.gitignore +++ b/.gitignore @@ -449,3 +449,5 @@ gl/tests/test-vasprintf gl/tests/test-vsnprintf lib/accelerated/libaccelerated.la gl/time.h +lib/accelerated/intel/libintel.la +doc/cyclo/cyclo-gnutls.html diff --git a/configure.ac b/configure.ac index fcbf548500..f6b28b236a 100644 --- a/configure.ac +++ b/configure.ac @@ -90,6 +90,7 @@ AC_CHECK_TYPES(uint,,, [ # include ]) + AC_ARG_ENABLE(hardware-acceleration, AS_HELP_STRING([--disable-hardware-acceleration], [unconditionally disable hardware acceleration]), use_accel=$enableval, use_accel=yes) @@ -99,9 +100,18 @@ if test "$use_accel" != "no"; then case $host_cpu in i?86 | x86_64 | amd64) GCC_FLAG_ADD([-maes -mpclmul],[X86]) - - if test "x$X86" = "xyes";then - hw_accel="x86" + AC_CHECK_PROGS(YASM, yasm) + + if test "x$YASM" != "x";then + if test "x$X86" = "xyes";then + if test "$host_cpu" = "x86_64" -o "$host_cpu" = "amd64";then + hw_accel="x86-64" + else + hw_accel="x86" + fi + fi + else + AC_MSG_WARN([[yasm assembler not found. Disabling AES-NI compilation.]]) fi ;; *) @@ -110,7 +120,8 @@ esac fi -AM_CONDITIONAL(TRY_X86_OPTIMIZATIONS, test "$X86" = "yes") +AM_CONDITIONAL(TRY_X86_OPTIMIZATIONS, test x"$hw_accel" = x"x86" -o x"$hw_accel" = x"x86-64") +AM_CONDITIONAL(ASM_X86_64, test x"$hw_accel" = x"x86-64") AM_CONDITIONAL(HAVE_GCC_GNU89_INLINE_OPTION, test "$gnu89_inline" = "yes"]) AM_CONDITIONAL(HAVE_GCC, test "$GCC" = "yes") @@ -399,6 +410,7 @@ AC_CONFIG_FILES([ lib/nettle/Makefile tests/suite/Makefile lib/accelerated/Makefile + lib/accelerated/intel/Makefile ]) AC_OUTPUT diff --git a/lib/accelerated/Makefile.am b/lib/accelerated/Makefile.am index bfe9a168c1..0e760640d3 100644 --- a/lib/accelerated/Makefile.am +++ b/lib/accelerated/Makefile.am @@ -22,19 +22,25 @@ # MA 02110-1301, USA AM_CFLAGS = $(WERROR_CFLAGS) $(WSTACK_CFLAGS) $(WARN_CFLAGS) +SUBDIRS = AM_CPPFLAGS = \ -I$(srcdir)/../../gl \ -I$(srcdir)/../includes \ -I$(builddir)/../includes \ -I$(srcdir)/.. +if ENABLE_MINITASN1 +AM_CPPFLAGS += -I$(srcdir)/../minitasn1 +endif + noinst_LTLIBRARIES = libaccelerated.la EXTRA_DIST = x86.h aes-x86.h accelerated.h libaccelerated_la_SOURCES = accelerated.c +libaccelerated_la_LIBADD = if TRY_X86_OPTIMIZATIONS +SUBDIRS += intel AM_CFLAGS += -DTRY_X86_OPTIMIZATIONS -libaccelerated_la_SOURCES += aes-x86.c +libaccelerated_la_LIBADD += intel/libintel.la endif - diff --git a/lib/accelerated/accelerated.c b/lib/accelerated/accelerated.c index 91e7040fb0..a25c57bd5f 100644 --- a/lib/accelerated/accelerated.c +++ b/lib/accelerated/accelerated.c @@ -1,6 +1,6 @@ #include #ifdef TRY_X86_OPTIMIZATIONS -# include +# include #endif void _gnutls_register_accel_crypto(void) diff --git a/lib/accelerated/aes-x86.c b/lib/accelerated/aes-x86.c deleted file mode 100644 index 1b705edf5d..0000000000 --- a/lib/accelerated/aes-x86.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * Copyright (C) 2011, Free Software Foundation - * - * Author: Nikos Mavrogiannopoulos - * - * This file is part of GnuTLS. - * - * The GnuTLS is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public License - * as published by the Free Software Foundation; either version 2.1 of - * the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, - * USA - * - * The following code is an implementation of the AES-128-CBC cipher - * using intel's AES instruction set. It is based on Intel reference - * code. - */ - -#include -#include -#include -#include -#include -#include -#include - -struct aes_ctx { - uint8_t iv[16]; - uint8_t key[16*10]; - size_t keysize; -}; - -static int -aes_cipher_init (gnutls_cipher_algorithm_t algorithm, void **_ctx) -{ - struct aes_ctx *ctx; - - if (algorithm != GNUTLS_CIPHER_AES_128_CBC) - return GNUTLS_E_INVALID_REQUEST; - - *_ctx = gnutls_calloc (1, sizeof (struct aes_ctx)); - if (*_ctx == NULL) - { - gnutls_assert (); - return GNUTLS_E_MEMORY_ERROR; - } - - ctx = *_ctx; - - return 0; -} - -inline static __m128i aes128_assist (__m128i temp1, __m128i temp2) -{ -__m128i temp3; - temp2 = _mm_shuffle_epi32 (temp2 ,0xff); - temp3 = _mm_slli_si128 (temp1, 0x4); - temp1 = _mm_xor_si128 (temp1, temp3); - temp3 = _mm_slli_si128 (temp3, 0x4); - temp1 = _mm_xor_si128 (temp1, temp3); - temp3 = _mm_slli_si128 (temp3, 0x4); - temp1 = _mm_xor_si128 (temp1, temp3); - temp1 = _mm_xor_si128 (temp1, temp2); - - return temp1; -} - -static int -aes_cipher_setkey (void *_ctx, const void *userkey, size_t keysize) -{ -struct aes_ctx *ctx = _ctx; -__m128i temp1, temp2; -__m128i *Key_Schedule = (__m128i*)ctx->key; - - temp1 = _mm_loadu_si128((__m128i*)userkey); - Key_Schedule[0] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1 ,0x1); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[1] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x2); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[2] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x4); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[3] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x8); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[4] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x10); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[5] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x20); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[6] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x40); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[7] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x80); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[8] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x1b); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[9] = temp1; - temp2 = _mm_aeskeygenassist_si128 (temp1,0x36); - temp1 = aes128_assist(temp1, temp2); - Key_Schedule[10] = temp1; - - ctx->keysize = keysize; - - return 0; -} - -static int -aes_setiv (void *_ctx, const void *iv, size_t iv_size) -{ - struct aes_ctx *ctx = _ctx; - - memcpy (ctx->iv, iv, 16); - - return 0; -} - -#define AES_128_ROUNDS 10 - -static int -aes_encrypt (void *_ctx, const void *plain, size_t plainsize, - void *encr, size_t length) -{ -struct aes_ctx *ctx = _ctx; -__m128i feedback,data; -int i,j; - - feedback=_mm_loadu_si128 ((__m128i*)ctx->iv); - for(i=0; i < length; i++) { - data = _mm_loadu_si128 (&((__m128i*)plain)[i]); - feedback = _mm_xor_si128 (data,feedback); - feedback = _mm_xor_si128 (feedback,((__m128i*)ctx->key)[0]); - - for(j=1; j key)[j]); - - feedback = _mm_aesenclast_si128 (feedback,((__m128i*)ctx->key)[j]); - _mm_storeu_si128 (&((__m128i*)encr)[i],feedback); - } - - return 0; -} - -static int -aes_decrypt (void *_ctx, const void *encr, size_t encrsize, - void *plain, size_t length) -{ -struct aes_ctx *ctx = _ctx; -__m128i data,feedback,last_in; -int i,j; - - feedback=_mm_loadu_si128 ((__m128i*)ctx->iv); - - for(i=0; i < length; i++) { - last_in=_mm_loadu_si128 (&((__m128i*)encr)[i]); - data = _mm_xor_si128 (last_in,((__m128i*)ctx->key)[0]); - - for(j=1; j key)[j]); - - data = _mm_aesdeclast_si128 (data,((__m128i*)ctx->key)[j]); - data = _mm_xor_si128 (data,feedback); - _mm_storeu_si128 (&((__m128i*)plain)[i],data); - feedback=last_in; - } - - return 0; -} - -static void -aes_deinit (void *_ctx) -{ - gnutls_free (_ctx); -} - -static const gnutls_crypto_cipher_st cipher_struct = { - .init = aes_cipher_init, - .setkey = aes_cipher_setkey, - .setiv = aes_setiv, - .encrypt = aes_encrypt, - .decrypt = aes_decrypt, - .deinit = aes_deinit, -}; - -static unsigned check_optimized_aes(void) -{ -unsigned int a,b,c,d; - cpuid(1, a,b,c,d); - - return (c & 0x2000000); -} - -void -register_x86_crypto (void) -{ -int ret; - if (check_optimized_aes()) { - fprintf(stderr, "Intel AES accelerator was detected\n"); - ret = gnutls_crypto_single_cipher_register (GNUTLS_CIPHER_AES_128_CBC, 90, &cipher_struct); - if (ret < 0) - { - gnutls_assert (); - } - } - - return; -} diff --git a/lib/accelerated/intel/Makefile.am b/lib/accelerated/intel/Makefile.am new file mode 100644 index 0000000000..51dea2fd5a --- /dev/null +++ b/lib/accelerated/intel/Makefile.am @@ -0,0 +1,60 @@ +## Process this file with automake to produce Makefile.in +# Copyright (C) 2011 Free Software +# Foundation, Inc. +# +# Author: Nikos Mavrogiannopoulos +# +# This file is part of GNUTLS. +# +# The GNUTLS library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public License +# as published by the Free Software Foundation; either version 2.1 of +# the License, or (at your option) any later version. +# +# The GNUTLS library is distributed in the hope that it will be +# useful, but WITHOUT ANY WARRANTY; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with the GNUTLS library; if not, write to the Free +# Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301, USA + +AM_CFLAGS = $(WERROR_CFLAGS) $(WSTACK_CFLAGS) $(WARN_CFLAGS) +AM_CPPFLAGS = \ + -I$(srcdir)/../../../gl \ + -I$(srcdir)/../../includes \ + -I$(srcdir)/../../ \ + -I$(srcdir)/../ + +if ENABLE_MINITASN1 +AM_CPPFLAGS += -I$(srcdir)/../minitasn1 +endif + +noinst_LTLIBRARIES = libintel.la + +EXTRA_DIST = aes-x86.h +libintel_la_SOURCES = aes-x86.c +libintel_la_LIBADD = + +YASM_OPTS = -D__linux__ + +x64_do_rdtsc.o: asm/x64_do_rdtsc.s + $(YASM) $(YASM_OPTS) -f elf64 $^ -o $@ + +x64_iaesx64.o: asm/x64_iaesx64.s + $(YASM) $(YASM_OPTS) -f elf64 $^ -o $@ + +x86_do_rdtsc.o: asm/x86_do_rdtsc.s + $(YASM) $(YASM_OPTS) -f elf32 $^ -o $@ + +x86_iaesx86.o: asm/x86_iaesx86.s + $(YASM) $(YASM_OPTS) -f elf32 $^ -o $@ + +if ASM_X86_64 +libintel_la_LIBADD += x64_do_rdtsc.o x64_iaesx64.o +else +libintel_la_LIBADD += x86_do_rdtsc.o x86_iaesx86.o +endif + diff --git a/lib/accelerated/intel/aes-x86.c b/lib/accelerated/intel/aes-x86.c new file mode 100644 index 0000000000..55ee6ffd6b --- /dev/null +++ b/lib/accelerated/intel/aes-x86.c @@ -0,0 +1,201 @@ +/* + * Copyright (C) 2011, Free Software Foundation + * + * Author: Nikos Mavrogiannopoulos + * + * This file is part of GnuTLS. + * + * The GnuTLS is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public License + * as published by the Free Software Foundation; either version 2.1 of + * the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, + * USA + * + * The following code is an implementation of the AES-128-CBC cipher + * using intel's AES instruction set. It is based on Intel reference + * code. + */ + +#include +#include +#include +#include +#include +#include +#include "iaesni.h" +#include "iaes_asm_interface.h" + +#ifdef __GNUC__ +# define ALIGN16 __attribute__ ((aligned (16))) +#else +# define ALIGN16 +#endif + +typedef void (*enc_func)(sAesData*); + +struct aes_ctx { + uint8_t iv[16]; + uint8_t ALIGN16 expanded_key[16*16]; + uint8_t ALIGN16 expanded_key_dec[16*16]; + enc_func enc; + enc_func dec; + size_t keysize; +}; + +static int +aes_cipher_init (gnutls_cipher_algorithm_t algorithm, void **_ctx) +{ + struct aes_ctx *ctx; + + /* we use key size to distinguish */ + if (algorithm != GNUTLS_CIPHER_AES_128_CBC && algorithm != GNUTLS_CIPHER_AES_192_CBC + && algorithm != GNUTLS_CIPHER_AES_256_CBC) + return GNUTLS_E_INVALID_REQUEST; + + *_ctx = gnutls_calloc (1, sizeof (struct aes_ctx)); + if (*_ctx == NULL) + { + gnutls_assert (); + return GNUTLS_E_MEMORY_ERROR; + } + + ctx = *_ctx; + + return 0; +} + +static int +aes_cipher_setkey (void *_ctx, const void *userkey, size_t keysize) +{ +struct aes_ctx *ctx = _ctx; + + if (keysize == 128/8) + { + iEncExpandKey128((void*)userkey, ctx->expanded_key); + iDecExpandKey128((void*)userkey, ctx->expanded_key_dec); + ctx->enc = iEnc128_CBC; + ctx->dec = iDec128_CBC; + } + else if (keysize == 192/8) + { + iEncExpandKey192((void*)userkey, ctx->expanded_key); + iDecExpandKey192((void*)userkey, ctx->expanded_key_dec); + ctx->enc = iEnc192_CBC; + ctx->dec = iDec192_CBC; + } + else if (keysize == 256/8) + { + iEncExpandKey256((void*)userkey, ctx->expanded_key); + iDecExpandKey256((void*)userkey, ctx->expanded_key_dec); + ctx->enc = iEnc256_CBC; + ctx->dec = iDec256_CBC; + } + + ctx->keysize = keysize; + + return 0; +} + +static int +aes_setiv (void *_ctx, const void *iv, size_t iv_size) +{ + struct aes_ctx *ctx = _ctx; + + memcpy (ctx->iv, iv, 16); + + return 0; +} + +static int +aes_encrypt (void *_ctx, const void *plain, size_t plainsize, + void *encr, size_t length) +{ +struct aes_ctx *ctx = _ctx; +sAesData aesData; + + aesData.in_block = (void*)plain; + aesData.out_block = encr; + aesData.expanded_key = ctx->expanded_key; + aesData.num_blocks = length % 16; + + ctx->enc(&aesData); + + return 0; +} + +static int +aes_decrypt (void *_ctx, const void *encr, size_t encrsize, + void *plain, size_t length) +{ +struct aes_ctx *ctx = _ctx; +sAesData aesData; + + aesData.in_block = (void*)encr; + aesData.out_block = plain; + aesData.expanded_key = ctx->expanded_key; + aesData.num_blocks = length % 16; + + ctx->dec(&aesData); + + return 0; +} + +static void +aes_deinit (void *_ctx) +{ + gnutls_free (_ctx); +} + +static const gnutls_crypto_cipher_st cipher_struct = { + .init = aes_cipher_init, + .setkey = aes_cipher_setkey, + .setiv = aes_setiv, + .encrypt = aes_encrypt, + .decrypt = aes_decrypt, + .deinit = aes_deinit, +}; + +static unsigned check_optimized_aes(void) +{ +unsigned int a,b,c,d; + cpuid(1, a,b,c,d); + + return (c & 0x2000000); +} + +void +register_x86_crypto (void) +{ +int ret; + if (check_optimized_aes()) { + fprintf(stderr, "Intel AES accelerator was detected\n"); + ret = gnutls_crypto_single_cipher_register (GNUTLS_CIPHER_AES_128_CBC, 90, &cipher_struct); + if (ret < 0) + { + gnutls_assert (); + } + + ret = gnutls_crypto_single_cipher_register (GNUTLS_CIPHER_AES_192_CBC, 90, &cipher_struct); + if (ret < 0) + { + gnutls_assert (); + } + + ret = gnutls_crypto_single_cipher_register (GNUTLS_CIPHER_AES_256_CBC, 90, &cipher_struct); + if (ret < 0) + { + gnutls_assert (); + } + } + + return; +} diff --git a/lib/accelerated/aes-x86.h b/lib/accelerated/intel/aes-x86.h similarity index 100% rename from lib/accelerated/aes-x86.h rename to lib/accelerated/intel/aes-x86.h diff --git a/lib/accelerated/intel/asm/x64_do_rdtsc.s b/lib/accelerated/intel/asm/x64_do_rdtsc.s new file mode 100755 index 0000000000..74435c73f7 --- /dev/null +++ b/lib/accelerated/intel/asm/x64_do_rdtsc.s @@ -0,0 +1,37 @@ +[bits 64] +[CPU intelnop] + +; Copyright (c) 2010, Intel Corporation +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; +; * Redistributions of source code must retain the above copyright notice, +; this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright notice, +; this list of conditions and the following disclaimer in the documentation +; and/or other materials provided with the distribution. +; * Neither the name of Intel Corporation nor the names of its contributors +; may be used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +; IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +; INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +; OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +align 16 +global do_rdtsc +do_rdtsc: + + rdtsc + shl rdx, 32 + or rax, rdx + ret 0 diff --git a/lib/accelerated/intel/asm/x64_iaesx64.s b/lib/accelerated/intel/asm/x64_iaesx64.s new file mode 100755 index 0000000000..433d1775a8 --- /dev/null +++ b/lib/accelerated/intel/asm/x64_iaesx64.s @@ -0,0 +1,2054 @@ +[bits 64] +[CPU intelnop] + +; Copyright (c) 2010, Intel Corporation +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; +; * Redistributions of source code must retain the above copyright notice, +; this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright notice, +; this list of conditions and the following disclaimer in the documentation +; and/or other materials provided with the distribution. +; * Neither the name of Intel Corporation nor the names of its contributors +; may be used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +; IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +; INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +; OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +%macro linux_setup 0 +%ifdef __linux__ + mov rcx, rdi + mov rdx, rsi +%endif +%endmacro + +%macro inversekey 1 + movdqu xmm1,%1 + aesimc xmm0,xmm1 + movdqu %1,xmm0 +%endmacro + +%macro aesdeclast1 1 + aesdeclast xmm0,%1 +%endmacro + +%macro aesenclast1 1 + aesenclast xmm0,%1 +%endmacro + +%macro aesdec1 1 + aesdec xmm0,%1 +%endmacro + +%macro aesenc1 1 + aesenc xmm0,%1 +%endmacro + + +%macro aesdeclast1_u 1 + movdqu xmm4,%1 + aesdeclast xmm0,xmm4 +%endmacro + +%macro aesenclast1_u 1 + movdqu xmm4,%1 + aesenclast xmm0,xmm4 +%endmacro + +%macro aesdec1_u 1 + movdqu xmm4,%1 + aesdec xmm0,xmm4 +%endmacro + +%macro aesenc1_u 1 + movdqu xmm4,%1 + aesenc xmm0,xmm4 +%endmacro + +%macro aesdec4 1 + movdqa xmm4,%1 + + aesdec xmm0,xmm4 + aesdec xmm1,xmm4 + aesdec xmm2,xmm4 + aesdec xmm3,xmm4 + +%endmacro + +%macro aesdeclast4 1 + movdqa xmm4,%1 + + aesdeclast xmm0,xmm4 + aesdeclast xmm1,xmm4 + aesdeclast xmm2,xmm4 + aesdeclast xmm3,xmm4 + +%endmacro + + +%macro aesenc4 1 + movdqa xmm4,%1 + + aesenc xmm0,xmm4 + aesenc xmm1,xmm4 + aesenc xmm2,xmm4 + aesenc xmm3,xmm4 + +%endmacro + +%macro aesenclast4 1 + movdqa xmm4,%1 + + aesenclast xmm0,xmm4 + aesenclast xmm1,xmm4 + aesenclast xmm2,xmm4 + aesenclast xmm3,xmm4 + +%endmacro + + +%macro load_and_inc4 1 + movdqa xmm4,%1 + movdqa xmm0,xmm5 + movdqa xmm1,xmm5 + paddq xmm1,[counter_add_one wrt rip] + movdqa xmm2,xmm5 + paddq xmm2,[counter_add_two wrt rip] + movdqa xmm3,xmm5 + paddq xmm3,[counter_add_three wrt rip] + pxor xmm0,xmm4 + paddq xmm5,[counter_add_four wrt rip] + pxor xmm1,xmm4 + pxor xmm2,xmm4 + pxor xmm3,xmm4 +%endmacro + +%macro xor_with_input4 1 + movdqu xmm4,[%1] + pxor xmm0,xmm4 + movdqu xmm4,[%1+16] + pxor xmm1,xmm4 + movdqu xmm4,[%1+32] + pxor xmm2,xmm4 + movdqu xmm4,[%1+48] + pxor xmm3,xmm4 +%endmacro + + + +%macro load_and_xor4 2 + movdqa xmm4,%2 + movdqu xmm0,[%1 + 0*16] + pxor xmm0,xmm4 + movdqu xmm1,[%1 + 1*16] + pxor xmm1,xmm4 + movdqu xmm2,[%1 + 2*16] + pxor xmm2,xmm4 + movdqu xmm3,[%1 + 3*16] + pxor xmm3,xmm4 +%endmacro + +%macro store4 1 + movdqu [%1 + 0*16],xmm0 + movdqu [%1 + 1*16],xmm1 + movdqu [%1 + 2*16],xmm2 + movdqu [%1 + 3*16],xmm3 +%endmacro + +%macro copy_round_keys 3 + movdqu xmm4,[%2 + ((%3)*16)] + movdqa [%1 + ((%3)*16)],xmm4 +%endmacro + + +%macro key_expansion_1_192 1 + ;; Assumes the xmm3 includes all zeros at this point. + pshufd xmm2, xmm2, 11111111b + shufps xmm3, xmm1, 00010000b + pxor xmm1, xmm3 + shufps xmm3, xmm1, 10001100b + pxor xmm1, xmm3 + pxor xmm1, xmm2 + movdqu [rdx+%1], xmm1 +%endmacro + +; Calculate w10 and w11 using calculated w9 and known w4-w5 +%macro key_expansion_2_192 1 + movdqa xmm5, xmm4 + pslldq xmm5, 4 + shufps xmm6, xmm1, 11110000b + pxor xmm6, xmm5 + pxor xmm4, xmm6 + pshufd xmm7, xmm4, 00001110b + movdqu [rdx+%1], xmm7 +%endmacro + + +section .data +align 16 +shuffle_mask: +DD 0FFFFFFFFh +DD 03020100h +DD 07060504h +DD 0B0A0908h + + +align 16 +counter_add_one: +DD 1 +DD 0 +DD 0 +DD 0 + +counter_add_two: +DD 2 +DD 0 +DD 0 +DD 0 + +counter_add_three: +DD 3 +DD 0 +DD 0 +DD 0 + +counter_add_four: +DD 4 +DD 0 +DD 0 +DD 0 + + + +section .text + +align 16 +key_expansion256: + + pshufd xmm2, xmm2, 011111111b + + movdqa xmm4, xmm1 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pxor xmm1, xmm2 + + movdqu [rdx], xmm1 + add rdx, 0x10 + + aeskeygenassist xmm4, xmm1, 0 + pshufd xmm2, xmm4, 010101010b + + movdqa xmm4, xmm3 + pshufb xmm4, xmm5 + pxor xmm3, xmm4 + pshufb xmm4, xmm5 + pxor xmm3, xmm4 + pshufb xmm4, xmm5 + pxor xmm3, xmm4 + pxor xmm3, xmm2 + + movdqu [rdx], xmm3 + add rdx, 0x10 + + ret + + + +align 16 +key_expansion128: + pshufd xmm2, xmm2, 0xFF; + movdqa xmm3, xmm1 + pshufb xmm3, xmm5 + pxor xmm1, xmm3 + pshufb xmm3, xmm5 + pxor xmm1, xmm3 + pshufb xmm3, xmm5 + pxor xmm1, xmm3 + pxor xmm1, xmm2 + + ; storing the result in the key schedule array + movdqu [rdx], xmm1 + add rdx, 0x10 + ret + + + + + + +align 16 +global iEncExpandKey128 +iEncExpandKey128: + + linux_setup + + movdqu xmm1, [rcx] ; loading the key + + movdqu [rdx], xmm1 + + movdqa xmm5, [shuffle_mask wrt rip] + + add rdx,16 + + aeskeygenassist xmm2, xmm1, 0x1 ; Generating round key 1 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x2 ; Generating round key 2 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x4 ; Generating round key 3 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x8 ; Generating round key 4 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x10 ; Generating round key 5 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x20 ; Generating round key 6 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x40 ; Generating round key 7 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x80 ; Generating round key 8 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x1b ; Generating round key 9 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x36 ; Generating round key 10 + call key_expansion128 + + ret + + + +align 16 +global iEncExpandKey192 +iEncExpandKey192: + + linux_setup + sub rsp,64+8 + movdqa [rsp],xmm6 + movdqa [rsp+16],xmm7 + + + movq xmm7, [rcx+16] ; loading the AES key + movq [rdx+16], xmm7 ; Storing key in memory where all key expansion + pshufd xmm4, xmm7, 01001111b + movdqu xmm1, [rcx] ; loading the AES key + movdqu [rdx], xmm1 ; Storing key in memory where all key expansion + + pxor xmm3, xmm3 ; Set xmm3 to be all zeros. Required for the key_expansion. + pxor xmm6, xmm6 ; Set xmm3 to be all zeros. Required for the key_expansion. + + aeskeygenassist xmm2, xmm4, 0x1 ; Complete round key 1 and generate round key 2 + key_expansion_1_192 24 + key_expansion_2_192 40 + + aeskeygenassist xmm2, xmm4, 0x2 ; Generate round key 3 and part of round key 4 + key_expansion_1_192 48 + key_expansion_2_192 64 + + aeskeygenassist xmm2, xmm4, 0x4 ; Complete round key 4 and generate round key 5 + key_expansion_1_192 72 + key_expansion_2_192 88 + + aeskeygenassist xmm2, xmm4, 0x8 ; Generate round key 6 and part of round key 7 + key_expansion_1_192 96 + key_expansion_2_192 112 + + aeskeygenassist xmm2, xmm4, 0x10 ; Complete round key 7 and generate round key 8 + key_expansion_1_192 120 + key_expansion_2_192 136 + + aeskeygenassist xmm2, xmm4, 0x20 ; Generate round key 9 and part of round key 10 + key_expansion_1_192 144 + key_expansion_2_192 160 + + aeskeygenassist xmm2, xmm4, 0x40 ; Complete round key 10 and generate round key 11 + key_expansion_1_192 168 + key_expansion_2_192 184 + + aeskeygenassist xmm2, xmm4, 0x80 ; Generate round key 12 + key_expansion_1_192 192 + + + movdqa xmm6,[rsp] + movdqa xmm7,[rsp+16] + add rsp,64+8 + + ret + + + + +align 16 +global iDecExpandKey128 +iDecExpandKey128: + + linux_setup + push rcx + push rdx + sub rsp,16+8 + + call iEncExpandKey128 + + add rsp,16+8 + pop rdx + pop rcx + + inversekey [rdx + 1*16] + inversekey [rdx + 2*16] + inversekey [rdx + 3*16] + inversekey [rdx + 4*16] + inversekey [rdx + 5*16] + inversekey [rdx + 6*16] + inversekey [rdx + 7*16] + inversekey [rdx + 8*16] + inversekey [rdx + 9*16] + + ret + + +align 16 +global iDecExpandKey192 +iDecExpandKey192: + + linux_setup + push rcx + push rdx + sub rsp,16+8 + + call iEncExpandKey192 + + add rsp,16+8 + pop rdx + pop rcx + + + inversekey [rdx + 1*16] + inversekey [rdx + 2*16] + inversekey [rdx + 3*16] + inversekey [rdx + 4*16] + inversekey [rdx + 5*16] + inversekey [rdx + 6*16] + inversekey [rdx + 7*16] + inversekey [rdx + 8*16] + inversekey [rdx + 9*16] + inversekey [rdx + 10*16] + inversekey [rdx + 11*16] + + ret + + + +align 16 +global iDecExpandKey256 +iDecExpandKey256: + + linux_setup + push rcx + push rdx + sub rsp,16+8 + + call iEncExpandKey256 + + add rsp,16+8 + pop rdx + pop rcx + + inversekey [rdx + 1*16] + inversekey [rdx + 2*16] + inversekey [rdx + 3*16] + inversekey [rdx + 4*16] + inversekey [rdx + 5*16] + inversekey [rdx + 6*16] + inversekey [rdx + 7*16] + inversekey [rdx + 8*16] + inversekey [rdx + 9*16] + inversekey [rdx + 10*16] + inversekey [rdx + 11*16] + inversekey [rdx + 12*16] + inversekey [rdx + 13*16] + + ret + + + + +align 16 +global iEncExpandKey256 +iEncExpandKey256: + + linux_setup + + movdqu xmm1, [rcx] ; loading the key + movdqu xmm3, [rcx+16] + movdqu [rdx], xmm1 ; Storing key in memory where all key schedule will be stored + movdqu [rdx+16], xmm3 + + add rdx,32 + + movdqa xmm5, [shuffle_mask wrt rip] ; this mask is used by key_expansion + + aeskeygenassist xmm2, xmm3, 0x1 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x2 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x4 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x8 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x10 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x20 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x40 ; +; call key_expansion256 + + pshufd xmm2, xmm2, 011111111b + + movdqa xmm4, xmm1 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pxor xmm1, xmm2 + + movdqu [rdx], xmm1 + + + ret + + + + + + +align 16 +global iDec128 +iDec128: + + linux_setup + sub rsp,16*16+8 + + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + test eax,eax + jz end_dec128 + + cmp eax,4 + jl lp128decsingle + + test rcx,0xf + jz lp128decfour + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + mov rcx,rsp + + + +align 16 +lp128decfour: + + test eax,eax + jz end_dec128 + + cmp eax,4 + jl lp128decsingle + + load_and_xor4 rdx, [rcx+10*16] + add rdx,16*4 + aesdec4 [rcx+9*16] + aesdec4 [rcx+8*16] + aesdec4 [rcx+7*16] + aesdec4 [rcx+6*16] + aesdec4 [rcx+5*16] + aesdec4 [rcx+4*16] + aesdec4 [rcx+3*16] + aesdec4 [rcx+2*16] + aesdec4 [rcx+1*16] + aesdeclast4 [rcx+0*16] + + sub eax,4 + store4 r8+rdx-(16*4) + jmp lp128decfour + + + align 16 +lp128decsingle: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+10*16] + pxor xmm0, xmm4 + aesdec1_u [rcx+9*16] + aesdec1_u [rcx+8*16] + aesdec1_u [rcx+7*16] + aesdec1_u [rcx+6*16] + aesdec1_u [rcx+5*16] + aesdec1_u [rcx+4*16] + aesdec1_u [rcx+3*16] + aesdec1_u [rcx+2*16] + aesdec1_u [rcx+1*16] + aesdeclast1_u [rcx+0*16] + + add rdx, 16 + movdqu [r8 + rdx - 16], xmm0 + dec eax + jnz lp128decsingle + +end_dec128: + + add rsp,16*16+8 + ret + + +align 16 +global iDec128_CBC +iDec128_CBC: + + linux_setup + sub rsp,16*16+8 + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm5,[rax] + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + + sub r8,rdx + + + test eax,eax + jz end_dec128_CBC + + cmp eax,4 + jl lp128decsingle_CBC + + test rcx,0xf + jz lp128decfour_CBC + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + mov rcx,rsp + + +align 16 +lp128decfour_CBC: + + test eax,eax + jz end_dec128_CBC + + cmp eax,4 + jl lp128decsingle_CBC + + load_and_xor4 rdx, [rcx+10*16] + add rdx,16*4 + aesdec4 [rcx+9*16] + aesdec4 [rcx+8*16] + aesdec4 [rcx+7*16] + aesdec4 [rcx+6*16] + aesdec4 [rcx+5*16] + aesdec4 [rcx+4*16] + aesdec4 [rcx+3*16] + aesdec4 [rcx+2*16] + aesdec4 [rcx+1*16] + aesdeclast4 [rcx+0*16] + + pxor xmm0,xmm5 + movdqu xmm4,[rdx - 16*4 + 0*16] + pxor xmm1,xmm4 + movdqu xmm4,[rdx - 16*4 + 1*16] + pxor xmm2,xmm4 + movdqu xmm4,[rdx - 16*4 + 2*16] + pxor xmm3,xmm4 + movdqu xmm5,[rdx - 16*4 + 3*16] + + sub eax,4 + store4 r8+rdx-(16*4) + jmp lp128decfour_CBC + + + align 16 +lp128decsingle_CBC: + + movdqu xmm0, [rdx] + movdqa xmm1,xmm0 + movdqu xmm4,[rcx+10*16] + pxor xmm0, xmm4 + aesdec1_u [rcx+9*16] + aesdec1_u [rcx+8*16] + aesdec1_u [rcx+7*16] + aesdec1_u [rcx+6*16] + aesdec1_u [rcx+5*16] + aesdec1_u [rcx+4*16] + aesdec1_u [rcx+3*16] + aesdec1_u [rcx+2*16] + aesdec1_u [rcx+1*16] + aesdeclast1_u [rcx+0*16] + + pxor xmm0,xmm5 + movdqa xmm5,xmm1 + add rdx, 16 + movdqu [r8 + rdx - 16], xmm0 + dec eax + jnz lp128decsingle_CBC + +end_dec128_CBC: + + mov r9,[r9+24] + movdqu [r9],xmm5 + add rsp,16*16+8 + ret + + +align 16 +global iDec192_CBC +iDec192_CBC: + + linux_setup + sub rsp,16*16+8 + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm5,[rax] + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + + sub r8,rdx + + test eax,eax + jz end_dec192_CBC + + cmp eax,4 + jl lp192decsingle_CBC + + test rcx,0xf + jz lp192decfour_CBC + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + mov rcx,rsp + + +align 16 +lp192decfour_CBC: + + test eax,eax + jz end_dec192_CBC + + cmp eax,4 + jl lp192decsingle_CBC + + load_and_xor4 rdx, [rcx+12*16] + add rdx,16*4 + aesdec4 [rcx+11*16] + aesdec4 [rcx+10*16] + aesdec4 [rcx+9*16] + aesdec4 [rcx+8*16] + aesdec4 [rcx+7*16] + aesdec4 [rcx+6*16] + aesdec4 [rcx+5*16] + aesdec4 [rcx+4*16] + aesdec4 [rcx+3*16] + aesdec4 [rcx+2*16] + aesdec4 [rcx+1*16] + aesdeclast4 [rcx+0*16] + + pxor xmm0,xmm5 + movdqu xmm4,[rdx - 16*4 + 0*16] + pxor xmm1,xmm4 + movdqu xmm4,[rdx - 16*4 + 1*16] + pxor xmm2,xmm4 + movdqu xmm4,[rdx - 16*4 + 2*16] + pxor xmm3,xmm4 + movdqu xmm5,[rdx - 16*4 + 3*16] + + sub eax,4 + store4 r8+rdx-(16*4) + jmp lp192decfour_CBC + + + align 16 +lp192decsingle_CBC: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+12*16] + movdqa xmm1,xmm0 + pxor xmm0, xmm4 + aesdec1_u [rcx+11*16] + aesdec1_u [rcx+10*16] + aesdec1_u [rcx+9*16] + aesdec1_u [rcx+8*16] + aesdec1_u [rcx+7*16] + aesdec1_u [rcx+6*16] + aesdec1_u [rcx+5*16] + aesdec1_u [rcx+4*16] + aesdec1_u [rcx+3*16] + aesdec1_u [rcx+2*16] + aesdec1_u [rcx+1*16] + aesdeclast1_u [rcx+0*16] + + pxor xmm0,xmm5 + movdqa xmm5,xmm1 + add rdx, 16 + movdqu [r8 + rdx - 16], xmm0 + dec eax + jnz lp192decsingle_CBC + +end_dec192_CBC: + + mov r9,[r9+24] + movdqu [r9],xmm5 + add rsp,16*16+8 + ret + + + + +align 16 +global iDec256_CBC +iDec256_CBC: + + linux_setup + sub rsp,16*16+8 + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm5,[rax] + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + + sub r8,rdx + + test eax,eax + jz end_dec256_CBC + + cmp eax,4 + jl lp256decsingle_CBC + + test rcx,0xf + jz lp256decfour_CBC + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + copy_round_keys rsp,rcx,13 + copy_round_keys rsp,rcx,14 + mov rcx,rsp + +align 16 +lp256decfour_CBC: + + test eax,eax + jz end_dec256_CBC + + cmp eax,4 + jl lp256decsingle_CBC + + load_and_xor4 rdx, [rcx+14*16] + add rdx,16*4 + aesdec4 [rcx+13*16] + aesdec4 [rcx+12*16] + aesdec4 [rcx+11*16] + aesdec4 [rcx+10*16] + aesdec4 [rcx+9*16] + aesdec4 [rcx+8*16] + aesdec4 [rcx+7*16] + aesdec4 [rcx+6*16] + aesdec4 [rcx+5*16] + aesdec4 [rcx+4*16] + aesdec4 [rcx+3*16] + aesdec4 [rcx+2*16] + aesdec4 [rcx+1*16] + aesdeclast4 [rcx+0*16] + + pxor xmm0,xmm5 + movdqu xmm4,[rdx - 16*4 + 0*16] + pxor xmm1,xmm4 + movdqu xmm4,[rdx - 16*4 + 1*16] + pxor xmm2,xmm4 + movdqu xmm4,[rdx - 16*4 + 2*16] + pxor xmm3,xmm4 + movdqu xmm5,[rdx - 16*4 + 3*16] + + sub eax,4 + store4 r8+rdx-(16*4) + jmp lp256decfour_CBC + + + align 16 +lp256decsingle_CBC: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+14*16] + movdqa xmm1,xmm0 + pxor xmm0, xmm4 + aesdec1_u [rcx+13*16] + aesdec1_u [rcx+12*16] + aesdec1_u [rcx+11*16] + aesdec1_u [rcx+10*16] + aesdec1_u [rcx+9*16] + aesdec1_u [rcx+8*16] + aesdec1_u [rcx+7*16] + aesdec1_u [rcx+6*16] + aesdec1_u [rcx+5*16] + aesdec1_u [rcx+4*16] + aesdec1_u [rcx+3*16] + aesdec1_u [rcx+2*16] + aesdec1_u [rcx+1*16] + aesdeclast1_u [rcx+0*16] + + pxor xmm0,xmm5 + movdqa xmm5,xmm1 + add rdx, 16 + movdqu [r8 + rdx - 16], xmm0 + dec eax + jnz lp256decsingle_CBC + +end_dec256_CBC: + + mov r9,[r9+24] + movdqu [r9],xmm5 + add rsp,16*16+8 + ret + + + + + +align 16 +global iDec192 +iDec192: + + linux_setup + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + test eax,eax + jz end_dec192 + + cmp eax,4 + jl lp192decsingle + + test rcx,0xf + jz lp192decfour + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + mov rcx,rsp + +align 16 +lp192decfour: + + test eax,eax + jz end_dec192 + + cmp eax,4 + jl lp192decsingle + + load_and_xor4 rdx, [rcx+12*16] + add rdx,16*4 + aesdec4 [rcx+11*16] + aesdec4 [rcx+10*16] + aesdec4 [rcx+9*16] + aesdec4 [rcx+8*16] + aesdec4 [rcx+7*16] + aesdec4 [rcx+6*16] + aesdec4 [rcx+5*16] + aesdec4 [rcx+4*16] + aesdec4 [rcx+3*16] + aesdec4 [rcx+2*16] + aesdec4 [rcx+1*16] + aesdeclast4 [rcx+0*16] + + sub eax,4 + store4 r8+rdx-(16*4) + jmp lp192decfour + + + align 16 +lp192decsingle: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+12*16] + pxor xmm0, xmm4 + aesdec1_u [rcx+11*16] + aesdec1_u [rcx+10*16] + aesdec1_u [rcx+9*16] + aesdec1_u [rcx+8*16] + aesdec1_u [rcx+7*16] + aesdec1_u [rcx+6*16] + aesdec1_u [rcx+5*16] + aesdec1_u [rcx+4*16] + aesdec1_u [rcx+3*16] + aesdec1_u [rcx+2*16] + aesdec1_u [rcx+1*16] + aesdeclast1_u [rcx+0*16] + + add rdx, 16 + movdqu [r8 + rdx - 16], xmm0 + dec eax + jnz lp192decsingle + +end_dec192: + + add rsp,16*16+8 + ret + + + + +align 16 +global iDec256 +iDec256: + + linux_setup + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test eax,eax + jz end_dec256 + + cmp eax,4 + jl lp256dec + + test rcx,0xf + jz lp256dec4 + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + copy_round_keys rsp,rcx,13 + copy_round_keys rsp,rcx,14 + mov rcx,rsp + + + align 16 +lp256dec4: + test eax,eax + jz end_dec256 + + cmp eax,4 + jl lp256dec + + load_and_xor4 rdx,[rcx+14*16] + add rdx, 4*16 + aesdec4 [rcx+13*16] + aesdec4 [rcx+12*16] + aesdec4 [rcx+11*16] + aesdec4 [rcx+10*16] + aesdec4 [rcx+9*16] + aesdec4 [rcx+8*16] + aesdec4 [rcx+7*16] + aesdec4 [rcx+6*16] + aesdec4 [rcx+5*16] + aesdec4 [rcx+4*16] + aesdec4 [rcx+3*16] + aesdec4 [rcx+2*16] + aesdec4 [rcx+1*16] + aesdeclast4 [rcx+0*16] + + store4 r8+rdx-16*4 + sub eax,4 + jmp lp256dec4 + + align 16 +lp256dec: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+14*16] + add rdx, 16 + pxor xmm0, xmm4 ; Round 0 (only xor) + aesdec1_u [rcx+13*16] + aesdec1_u [rcx+12*16] + aesdec1_u [rcx+11*16] + aesdec1_u [rcx+10*16] + aesdec1_u [rcx+9*16] + aesdec1_u [rcx+8*16] + aesdec1_u [rcx+7*16] + aesdec1_u [rcx+6*16] + aesdec1_u [rcx+5*16] + aesdec1_u [rcx+4*16] + aesdec1_u [rcx+3*16] + aesdec1_u [rcx+2*16] + aesdec1_u [rcx+1*16] + aesdeclast1_u [rcx+0*16] + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp256dec + +end_dec256: + + add rsp,16*16+8 + ret + + + + + + +align 16 +global iEnc128 +iEnc128: + + linux_setup + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test eax,eax + jz end_enc128 + + cmp eax,4 + jl lp128encsingle + + test rcx,0xf + jz lpenc128four + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + mov rcx,rsp + + + align 16 + +lpenc128four: + + test eax,eax + jz end_enc128 + + cmp eax,4 + jl lp128encsingle + + load_and_xor4 rdx,[rcx+0*16] + add rdx,4*16 + aesenc4 [rcx+1*16] + aesenc4 [rcx+2*16] + aesenc4 [rcx+3*16] + aesenc4 [rcx+4*16] + aesenc4 [rcx+5*16] + aesenc4 [rcx+6*16] + aesenc4 [rcx+7*16] + aesenc4 [rcx+8*16] + aesenc4 [rcx+9*16] + aesenclast4 [rcx+10*16] + + store4 r8+rdx-16*4 + sub eax,4 + jmp lpenc128four + + align 16 +lp128encsingle: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+0*16] + add rdx, 16 + pxor xmm0, xmm4 + aesenc1_u [rcx+1*16] + aesenc1_u [rcx+2*16] + aesenc1_u [rcx+3*16] + aesenc1_u [rcx+4*16] + aesenc1_u [rcx+5*16] + aesenc1_u [rcx+6*16] + aesenc1_u [rcx+7*16] + aesenc1_u [rcx+8*16] + aesenc1_u [rcx+9*16] + aesenclast1_u [rcx+10*16] + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp128encsingle + +end_enc128: + + add rsp,16*16+8 + ret + + +align 16 +global iEnc128_CTR +iEnc128_CTR: + + linux_setup + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm5,[rax] + + + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test eax,eax + jz end_encctr128 + + cmp eax,4 + jl lp128encctrsingle + + test rcx,0xf + jz lpencctr128four + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + mov rcx,rsp + + + align 16 + +lpencctr128four: + + test eax,eax + jz end_encctr128 + + cmp eax,4 + jl lp128encctrsingle + + load_and_inc4 [rcx+0*16] + add rdx,4*16 + aesenc4 [rcx+1*16] + aesenc4 [rcx+2*16] + aesenc4 [rcx+3*16] + aesenc4 [rcx+4*16] + aesenc4 [rcx+5*16] + aesenc4 [rcx+6*16] + aesenc4 [rcx+7*16] + aesenc4 [rcx+8*16] + aesenc4 [rcx+9*16] + aesenclast4 [rcx+10*16] + xor_with_input4 rdx-(4*16) + + store4 r8+rdx-16*4 + sub eax,4 + jmp lpencctr128four + + align 16 +lp128encctrsingle: + + movdqa xmm0,xmm5 + paddq xmm5,[counter_add_one wrt rip] + add rdx, 16 + movdqu xmm4,[rcx+0*16] + pxor xmm0, xmm4 + aesenc1_u [rcx+1*16] + aesenc1_u [rcx+2*16] + aesenc1_u [rcx+3*16] + aesenc1_u [rcx+4*16] + aesenc1_u [rcx+5*16] + aesenc1_u [rcx+6*16] + aesenc1_u [rcx+7*16] + aesenc1_u [rcx+8*16] + aesenc1_u [rcx+9*16] + aesenclast1_u [rcx+10*16] + movdqu xmm4, [rdx-16] + pxor xmm0,xmm4 + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp128encctrsingle + +end_encctr128: + + mov r9,[r9+24] + movdqu [r9],xmm5 + add rsp,16*16+8 + ret + + + +align 16 +global iEnc192_CTR +iEnc192_CTR: + + linux_setup + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm5,[rax] + + + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test eax,eax + jz end_encctr192 + + cmp eax,4 + jl lp192encctrsingle + + test rcx,0xf + jz lpencctr192four + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + mov rcx,rsp + + + align 16 + +lpencctr192four: + + test eax,eax + jz end_encctr192 + + cmp eax,4 + jl lp192encctrsingle + + load_and_inc4 [rcx+0*16] + add rdx,4*16 + aesenc4 [rcx+1*16] + aesenc4 [rcx+2*16] + aesenc4 [rcx+3*16] + aesenc4 [rcx+4*16] + aesenc4 [rcx+5*16] + aesenc4 [rcx+6*16] + aesenc4 [rcx+7*16] + aesenc4 [rcx+8*16] + aesenc4 [rcx+9*16] + aesenc4 [rcx+10*16] + aesenc4 [rcx+11*16] + aesenclast4 [rcx+12*16] + xor_with_input4 rdx-(4*16) + + store4 r8+rdx-16*4 + sub eax,4 + jmp lpencctr192four + + align 16 +lp192encctrsingle: + + movdqa xmm5,xmm0 + movdqu xmm4,[rcx+0*16] + paddq xmm5,[counter_add_one wrt rip] + add rdx, 16 + pxor xmm0, xmm4 + aesenc1_u [rcx+1*16] + aesenc1_u [rcx+2*16] + aesenc1_u [rcx+3*16] + aesenc1_u [rcx+4*16] + aesenc1_u [rcx+5*16] + aesenc1_u [rcx+6*16] + aesenc1_u [rcx+7*16] + aesenc1_u [rcx+8*16] + aesenc1_u [rcx+9*16] + aesenc1_u [rcx+10*16] + aesenc1_u [rcx+11*16] + aesenclast1_u [rcx+12*16] + movdqu xmm4, [rdx] + pxor xmm0,xmm4 + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp192encctrsingle + +end_encctr192: + + mov r9,[r9+24] + movdqu [r9],xmm5 + add rsp,16*16+8 + ret + + +align 16 +global iEnc256_CTR +iEnc256_CTR: + + linux_setup + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm5,[rax] + + + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test eax,eax + jz end_encctr256 + + cmp eax,4 + jl lp256encctrsingle + + test rcx,0xf + jz lpencctr256four + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + copy_round_keys rsp,rcx,13 + copy_round_keys rsp,rcx,14 + mov rcx,rsp + + + align 16 + +lpencctr256four: + + test eax,eax + jz end_encctr256 + + cmp eax,4 + jl lp256encctrsingle + + load_and_inc4 [rcx+0*16] + add rdx,4*16 + aesenc4 [rcx+1*16] + aesenc4 [rcx+2*16] + aesenc4 [rcx+3*16] + aesenc4 [rcx+4*16] + aesenc4 [rcx+5*16] + aesenc4 [rcx+6*16] + aesenc4 [rcx+7*16] + aesenc4 [rcx+8*16] + aesenc4 [rcx+9*16] + aesenc4 [rcx+10*16] + aesenc4 [rcx+11*16] + aesenc4 [rcx+12*16] + aesenc4 [rcx+13*16] + aesenclast4 [rcx+14*16] + xor_with_input4 rdx-(4*16) + + store4 r8+rdx-16*4 + sub eax,4 + jmp lpencctr256four + + align 16 +lp256encctrsingle: + + movdqa xmm5,xmm0 + movdqu xmm4,[rcx+0*16] + paddq xmm5,[counter_add_one wrt rip] + add rdx, 16 + pxor xmm0, xmm4 + aesenc1_u [rcx+1*16] + aesenc1_u [rcx+2*16] + aesenc1_u [rcx+3*16] + aesenc1_u [rcx+4*16] + aesenc1_u [rcx+5*16] + aesenc1_u [rcx+6*16] + aesenc1_u [rcx+7*16] + aesenc1_u [rcx+8*16] + aesenc1_u [rcx+9*16] + aesenc1_u [rcx+10*16] + aesenc1_u [rcx+11*16] + aesenc1_u [rcx+12*16] + aesenc1_u [rcx+13*16] + aesenclast1_u [rcx+14*16] + movdqu xmm4, [rdx] + pxor xmm0,xmm4 + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp256encctrsingle + +end_encctr256: + + mov r9,[r9+24] + movdqu [r9],xmm5 + add rsp,16*16+8 + ret + + + + + + + +align 16 +global iEnc128_CBC +iEnc128_CBC: + + linux_setup + sub rsp,16*16+8 + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm1,[rax] + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test rcx,0xf + jz lp128encsingle_CBC + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + mov rcx,rsp + + + align 16 + +lp128encsingle_CBC: + + movdqu xmm0, [rdx] + movdqu xmm4,[rcx+0*16] + add rdx, 16 + pxor xmm0, xmm1 + pxor xmm0, xmm4 + aesenc1 [rcx+1*16] + aesenc1 [rcx+2*16] + aesenc1 [rcx+3*16] + aesenc1 [rcx+4*16] + aesenc1 [rcx+5*16] + aesenc1 [rcx+6*16] + aesenc1 [rcx+7*16] + aesenc1 [rcx+8*16] + aesenc1 [rcx+9*16] + aesenclast1 [rcx+10*16] + movdqa xmm1,xmm0 + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp128encsingle_CBC + + mov r9,[r9+24] + movdqu [r9],xmm1 + add rsp,16*16+8 + ret + + +align 16 +global iEnc192_CBC +iEnc192_CBC: + + linux_setup + sub rsp,16*16+8 + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm1,[rax] + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + test rcx,0xf + jz lp192encsingle_CBC + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + mov rcx,rsp + + + + align 16 + +lp192encsingle_CBC: + + movdqu xmm0, [rdx] + movdqu xmm4, [rcx+0*16] + add rdx, 16 + pxor xmm0, xmm1 + pxor xmm0, xmm4 + aesenc1 [rcx+1*16] + aesenc1 [rcx+2*16] + aesenc1 [rcx+3*16] + aesenc1 [rcx+4*16] + aesenc1 [rcx+5*16] + aesenc1 [rcx+6*16] + aesenc1 [rcx+7*16] + aesenc1 [rcx+8*16] + aesenc1 [rcx+9*16] + aesenc1 [rcx+10*16] + aesenc1 [rcx+11*16] + aesenclast1 [rcx+12*16] + movdqa xmm1,xmm0 + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp192encsingle_CBC + + mov r9,[r9+24] + movdqu [r9],xmm1 + + add rsp,16*16+8 + ret + + +align 16 +global iEnc256_CBC +iEnc256_CBC: + + linux_setup + sub rsp,16*16+8 + + mov r9,rcx + mov rax,[rcx+24] + movdqu xmm1,[rax] + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + test rcx,0xf + jz lp256encsingle_CBC + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + copy_round_keys rsp,rcx,13 + copy_round_keys rsp,rcx,14 + mov rcx,rsp + + align 16 + +lp256encsingle_CBC: + + movdqu xmm0, [rdx] + movdqu xmm4, [rcx+0*16] + add rdx, 16 + pxor xmm0, xmm1 + pxor xmm0, xmm4 + aesenc1 [rcx+1*16] + aesenc1 [rcx+2*16] + aesenc1 [rcx+3*16] + aesenc1 [rcx+4*16] + aesenc1 [rcx+5*16] + aesenc1 [rcx+6*16] + aesenc1 [rcx+7*16] + aesenc1 [rcx+8*16] + aesenc1 [rcx+9*16] + aesenc1 [rcx+10*16] + aesenc1 [rcx+11*16] + aesenc1 [rcx+12*16] + aesenc1 [rcx+13*16] + aesenclast1 [rcx+14*16] + movdqa xmm1,xmm0 + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp256encsingle_CBC + + mov r9,[r9+24] + movdqu [r9],xmm1 + add rsp,16*16+8 + ret + + + + +align 16 +global iEnc192 +iEnc192: + + linux_setup + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + test eax,eax + jz end_enc192 + + cmp eax,4 + jl lp192encsingle + + test rcx,0xf + jz lpenc192four + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + mov rcx,rsp + + + align 16 + +lpenc192four: + + test eax,eax + jz end_enc192 + + cmp eax,4 + jl lp192encsingle + + load_and_xor4 rdx,[rcx+0*16] + add rdx,4*16 + aesenc4 [rcx+1*16] + aesenc4 [rcx+2*16] + aesenc4 [rcx+3*16] + aesenc4 [rcx+4*16] + aesenc4 [rcx+5*16] + aesenc4 [rcx+6*16] + aesenc4 [rcx+7*16] + aesenc4 [rcx+8*16] + aesenc4 [rcx+9*16] + aesenc4 [rcx+10*16] + aesenc4 [rcx+11*16] + aesenclast4 [rcx+12*16] + + store4 r8+rdx-16*4 + sub eax,4 + jmp lpenc192four + + align 16 +lp192encsingle: + + movdqu xmm0, [rdx] + movdqu xmm4, [rcx+0*16] + add rdx, 16 + pxor xmm0, xmm4 + aesenc1_u [rcx+1*16] + aesenc1_u [rcx+2*16] + aesenc1_u [rcx+3*16] + aesenc1_u [rcx+4*16] + aesenc1_u [rcx+5*16] + aesenc1_u [rcx+6*16] + aesenc1_u [rcx+7*16] + aesenc1_u [rcx+8*16] + aesenc1_u [rcx+9*16] + aesenc1_u [rcx+10*16] + aesenc1_u [rcx+11*16] + aesenclast1_u [rcx+12*16] + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp192encsingle + +end_enc192: + + add rsp,16*16+8 + ret + + + + + + +align 16 +global iEnc256 +iEnc256: + + linux_setup + sub rsp,16*16+8 + + mov eax,[rcx+32] ; numblocks + mov rdx,[rcx] + mov r8,[rcx+8] + mov rcx,[rcx+16] + + sub r8,rdx + + + test eax,eax + jz end_enc256 + + cmp eax,4 + jl lp256enc + + test rcx,0xf + jz lp256enc4 + + copy_round_keys rsp,rcx,0 + copy_round_keys rsp,rcx,1 + copy_round_keys rsp,rcx,2 + copy_round_keys rsp,rcx,3 + copy_round_keys rsp,rcx,4 + copy_round_keys rsp,rcx,5 + copy_round_keys rsp,rcx,6 + copy_round_keys rsp,rcx,7 + copy_round_keys rsp,rcx,8 + copy_round_keys rsp,rcx,9 + copy_round_keys rsp,rcx,10 + copy_round_keys rsp,rcx,11 + copy_round_keys rsp,rcx,12 + copy_round_keys rsp,rcx,13 + copy_round_keys rsp,rcx,14 + mov rcx,rsp + + + align 16 + +lp256enc4: + test eax,eax + jz end_enc256 + + cmp eax,4 + jl lp256enc + + + load_and_xor4 rdx,[rcx+0*16] + add rdx, 16*4 + aesenc4 [rcx+1*16] + aesenc4 [rcx+2*16] + aesenc4 [rcx+3*16] + aesenc4 [rcx+4*16] + aesenc4 [rcx+5*16] + aesenc4 [rcx+6*16] + aesenc4 [rcx+7*16] + aesenc4 [rcx+8*16] + aesenc4 [rcx+9*16] + aesenc4 [rcx+10*16] + aesenc4 [rcx+11*16] + aesenc4 [rcx+12*16] + aesenc4 [rcx+13*16] + aesenclast4 [rcx+14*16] + + store4 r8+rdx-16*4 + sub eax,4 + jmp lp256enc4 + + align 16 +lp256enc: + + movdqu xmm0, [rdx] + movdqu xmm4, [rcx+0*16] + add rdx, 16 + pxor xmm0, xmm4 + aesenc1_u [rcx+1*16] + aesenc1_u [rcx+2*16] + aesenc1_u [rcx+3*16] + aesenc1_u [rcx+4*16] + aesenc1_u [rcx+5*16] + aesenc1_u [rcx+6*16] + aesenc1_u [rcx+7*16] + aesenc1_u [rcx+8*16] + aesenc1_u [rcx+9*16] + aesenc1_u [rcx+10*16] + aesenc1_u [rcx+11*16] + aesenc1_u [rcx+12*16] + aesenc1_u [rcx+13*16] + aesenclast1_u [rcx+14*16] + + ; Store output encrypted data into CIPHERTEXT array + movdqu [r8+rdx-16], xmm0 + dec eax + jnz lp256enc + +end_enc256: + + add rsp,16*16+8 + ret diff --git a/lib/accelerated/intel/asm/x86_do_rdtsc.s b/lib/accelerated/intel/asm/x86_do_rdtsc.s new file mode 100755 index 0000000000..ba4f41090a --- /dev/null +++ b/lib/accelerated/intel/asm/x86_do_rdtsc.s @@ -0,0 +1,35 @@ +[bits 32] +[CPU intelnop] + +; Copyright (c) 2010, Intel Corporation +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; +; * Redistributions of source code must retain the above copyright notice, +; this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright notice, +; this list of conditions and the following disclaimer in the documentation +; and/or other materials provided with the distribution. +; * Neither the name of Intel Corporation nor the names of its contributors +; may be used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +; IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +; INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +; OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +align 16 +global _do_rdtsc +_do_rdtsc: + + rdtsc + ret diff --git a/lib/accelerated/intel/asm/x86_iaesx86.s b/lib/accelerated/intel/asm/x86_iaesx86.s new file mode 100755 index 0000000000..16fda3b19b --- /dev/null +++ b/lib/accelerated/intel/asm/x86_iaesx86.s @@ -0,0 +1,2183 @@ +[bits 32] +[CPU intelnop] + +; Copyright (c) 2010, Intel Corporation +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; +; * Redistributions of source code must retain the above copyright notice, +; this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright notice, +; this list of conditions and the following disclaimer in the documentation +; and/or other materials provided with the distribution. +; * Neither the name of Intel Corporation nor the names of its contributors +; may be used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +; IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +; INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +; OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +%macro inversekey 1 + movdqu xmm1,%1 + aesimc xmm0,xmm1 + movdqu %1,xmm0 +%endmacro + + +%macro aesdec4 1 + movdqa xmm4,%1 + + aesdec xmm0,xmm4 + aesdec xmm1,xmm4 + aesdec xmm2,xmm4 + aesdec xmm3,xmm4 + +%endmacro + + +%macro aesdeclast4 1 + movdqa xmm4,%1 + + aesdeclast xmm0,xmm4 + aesdeclast xmm1,xmm4 + aesdeclast xmm2,xmm4 + aesdeclast xmm3,xmm4 + +%endmacro + + +%macro aesenc4 1 + movdqa xmm4,%1 + + aesenc xmm0,xmm4 + aesenc xmm1,xmm4 + aesenc xmm2,xmm4 + aesenc xmm3,xmm4 + +%endmacro + +%macro aesenclast4 1 + movdqa xmm4,%1 + + aesenclast xmm0,xmm4 + aesenclast xmm1,xmm4 + aesenclast xmm2,xmm4 + aesenclast xmm3,xmm4 + +%endmacro + + +%macro aesdeclast1 1 + aesdeclast xmm0,%1 +%endmacro + +%macro aesenclast1 1 + aesenclast xmm0,%1 +%endmacro + +%macro aesdec1 1 + aesdec xmm0,%1 +%endmacro + +;abab +%macro aesenc1 1 + aesenc xmm0,%1 +%endmacro + + +%macro aesdeclast1_u 1 + movdqu xmm4,%1 + aesdeclast xmm0,xmm4 +%endmacro + +%macro aesenclast1_u 1 + movdqu xmm4,%1 + aesenclast xmm0,xmm4 +%endmacro + +%macro aesdec1_u 1 + movdqu xmm4,%1 + aesdec xmm0,xmm4 +%endmacro + +%macro aesenc1_u 1 + movdqu xmm4,%1 + aesenc xmm0,xmm4 +%endmacro + + +%macro load_and_xor4 2 + movdqa xmm4,%2 + movdqu xmm0,[%1 + 0*16] + pxor xmm0,xmm4 + movdqu xmm1,[%1 + 1*16] + pxor xmm1,xmm4 + movdqu xmm2,[%1 + 2*16] + pxor xmm2,xmm4 + movdqu xmm3,[%1 + 3*16] + pxor xmm3,xmm4 +%endmacro + + +%macro load_and_inc4 1 + movdqa xmm4,%1 + movdqa xmm0,xmm5 + movdqa xmm1,xmm5 + paddq xmm1,[counter_add_one] + movdqa xmm2,xmm5 + paddq xmm2,[counter_add_two] + movdqa xmm3,xmm5 + paddq xmm3,[counter_add_three] + pxor xmm0,xmm4 + paddq xmm5,[counter_add_four] + pxor xmm1,xmm4 + pxor xmm2,xmm4 + pxor xmm3,xmm4 +%endmacro + +%macro xor_with_input4 1 + movdqu xmm4,[%1] + pxor xmm0,xmm4 + movdqu xmm4,[%1+16] + pxor xmm1,xmm4 + movdqu xmm4,[%1+32] + pxor xmm2,xmm4 + movdqu xmm4,[%1+48] + pxor xmm3,xmm4 +%endmacro + +%macro store4 1 + movdqu [%1 + 0*16],xmm0 + movdqu [%1 + 1*16],xmm1 + movdqu [%1 + 2*16],xmm2 + movdqu [%1 + 3*16],xmm3 +%endmacro + + +%macro copy_round_keys 3 + movdqu xmm4,[%2 + ((%3)*16)] + movdqa [%1 + ((%3)*16)],xmm4 +%endmacro + +;abab +%macro copy_round_keyx 3 + movdqu xmm4,[%2 + ((%3)*16)] + movdqa %1,xmm4 +%endmacro + + + +%macro key_expansion_1_192 1 + ;; Assumes the xmm3 includes all zeros at this point. + pshufd xmm2, xmm2, 11111111b + shufps xmm3, xmm1, 00010000b + pxor xmm1, xmm3 + shufps xmm3, xmm1, 10001100b + pxor xmm1, xmm3 + pxor xmm1, xmm2 + movdqu [edx+%1], xmm1 +%endmacro + +; Calculate w10 and w11 using calculated w9 and known w4-w5 +%macro key_expansion_2_192 1 + movdqa xmm5, xmm4 + pslldq xmm5, 4 + shufps xmm6, xmm1, 11110000b + pxor xmm6, xmm5 + pxor xmm4, xmm6 + pshufd xmm7, xmm4, 00001110b + movdqu [edx+%1], xmm7 +%endmacro + + + + + +section .data +align 16 +shuffle_mask: +DD 0FFFFFFFFh +DD 03020100h +DD 07060504h +DD 0B0A0908h + +align 16 +counter_add_one: +DD 1 +DD 0 +DD 0 +DD 0 + +counter_add_two: +DD 2 +DD 0 +DD 0 +DD 0 + +counter_add_three: +DD 3 +DD 0 +DD 0 +DD 0 + +counter_add_four: +DD 4 +DD 0 +DD 0 +DD 0 + + +section .text + + + +align 16 +key_expansion256: + + pshufd xmm2, xmm2, 011111111b + + movdqu xmm4, xmm1 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pxor xmm1, xmm2 + + movdqu [edx], xmm1 + add edx, 0x10 + + aeskeygenassist xmm4, xmm1, 0 + pshufd xmm2, xmm4, 010101010b + + movdqu xmm4, xmm3 + pshufb xmm4, xmm5 + pxor xmm3, xmm4 + pshufb xmm4, xmm5 + pxor xmm3, xmm4 + pshufb xmm4, xmm5 + pxor xmm3, xmm4 + pxor xmm3, xmm2 + + movdqu [edx], xmm3 + add edx, 0x10 + + ret + + + +align 16 +key_expansion128: + pshufd xmm2, xmm2, 0xFF; + movdqu xmm3, xmm1 + pshufb xmm3, xmm5 + pxor xmm1, xmm3 + pshufb xmm3, xmm5 + pxor xmm1, xmm3 + pshufb xmm3, xmm5 + pxor xmm1, xmm3 + pxor xmm1, xmm2 + + ; storing the result in the key schedule array + movdqu [edx], xmm1 + add edx, 0x10 + ret + + + +align 16 +global _iEncExpandKey128 +_iEncExpandKey128: + + mov ecx,[esp-4+8] ;input + mov edx,[esp-4+12] ;ctx + + movdqu xmm1, [ecx] ; loading the key + + movdqu [edx], xmm1 + + movdqa xmm5, [shuffle_mask] + + add edx,16 + + aeskeygenassist xmm2, xmm1, 0x1 ; Generating round key 1 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x2 ; Generating round key 2 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x4 ; Generating round key 3 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x8 ; Generating round key 4 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x10 ; Generating round key 5 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x20 ; Generating round key 6 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x40 ; Generating round key 7 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x80 ; Generating round key 8 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x1b ; Generating round key 9 + call key_expansion128 + aeskeygenassist xmm2, xmm1, 0x36 ; Generating round key 10 + call key_expansion128 + + ret + + +align 16 +global _iEncExpandKey192 +_iEncExpandKey192: + + mov ecx,[esp-4+8] ;input + mov edx,[esp-4+12] ;ctx + + movq xmm7, [ecx+16] ; loading the AES key + movq [edx+16], xmm7 ; Storing key in memory where all key expansion + pshufd xmm4, xmm7, 01001111b + movdqu xmm1, [ecx] ; loading the AES key + movdqu [edx], xmm1 ; Storing key in memory where all key expansion + + pxor xmm3, xmm3 ; Set xmm3 to be all zeros. Required for the key_expansion. + pxor xmm6, xmm6 ; Set xmm3 to be all zeros. Required for the key_expansion. + + aeskeygenassist xmm2, xmm4, 0x1 ; Complete round key 1 and generate round key 2 + key_expansion_1_192 24 + key_expansion_2_192 40 + + aeskeygenassist xmm2, xmm4, 0x2 ; Generate round key 3 and part of round key 4 + key_expansion_1_192 48 + key_expansion_2_192 64 + + aeskeygenassist xmm2, xmm4, 0x4 ; Complete round key 4 and generate round key 5 + key_expansion_1_192 72 + key_expansion_2_192 88 + + aeskeygenassist xmm2, xmm4, 0x8 ; Generate round key 6 and part of round key 7 + key_expansion_1_192 96 + key_expansion_2_192 112 + + aeskeygenassist xmm2, xmm4, 0x10 ; Complete round key 7 and generate round key 8 + key_expansion_1_192 120 + key_expansion_2_192 136 + + aeskeygenassist xmm2, xmm4, 0x20 ; Generate round key 9 and part of round key 10 + key_expansion_1_192 144 + key_expansion_2_192 160 + + aeskeygenassist xmm2, xmm4, 0x40 ; Complete round key 10 and generate round key 11 + key_expansion_1_192 168 + key_expansion_2_192 184 + + aeskeygenassist xmm2, xmm4, 0x80 ; Generate round key 12 + key_expansion_1_192 192 + + ret + + + + + + +align 16 +global _iDecExpandKey128 +_iDecExpandKey128: + push DWORD [esp+8] + push DWORD [esp+8] + + call _iEncExpandKey128 + add esp,8 + + mov edx,[esp-4+12] ;ctx + + inversekey [edx + 1*16] + inversekey [edx + 2*16] + inversekey [edx + 3*16] + inversekey [edx + 4*16] + inversekey [edx + 5*16] + inversekey [edx + 6*16] + inversekey [edx + 7*16] + inversekey [edx + 8*16] + inversekey [edx + 9*16] + + ret + + + + +align 16 +global _iDecExpandKey192 +_iDecExpandKey192: + push DWORD [esp+8] + push DWORD [esp+8] + + call _iEncExpandKey192 + add esp,8 + + mov edx,[esp-4+12] ;ctx + + inversekey [edx + 1*16] + inversekey [edx + 2*16] + inversekey [edx + 3*16] + inversekey [edx + 4*16] + inversekey [edx + 5*16] + inversekey [edx + 6*16] + inversekey [edx + 7*16] + inversekey [edx + 8*16] + inversekey [edx + 9*16] + inversekey [edx + 10*16] + inversekey [edx + 11*16] + + ret + + + + +align 16 +global _iDecExpandKey256 +_iDecExpandKey256: + push DWORD [esp+8] + push DWORD [esp+8] + + call _iEncExpandKey256 + add esp, 8 + + mov edx, [esp-4+12] ;expanded key + + inversekey [edx + 1*16] + inversekey [edx + 2*16] + inversekey [edx + 3*16] + inversekey [edx + 4*16] + inversekey [edx + 5*16] + inversekey [edx + 6*16] + inversekey [edx + 7*16] + inversekey [edx + 8*16] + inversekey [edx + 9*16] + inversekey [edx + 10*16] + inversekey [edx + 11*16] + inversekey [edx + 12*16] + inversekey [edx + 13*16] + + ret + + + + +align 16 +global _iEncExpandKey256 +_iEncExpandKey256: + mov ecx, [esp-4+8] ;input + mov edx, [esp-4+12] ;expanded key + + + movdqu xmm1, [ecx] ; loading the key + movdqu xmm3, [ecx+16] + movdqu [edx], xmm1 ; Storing key in memory where all key schedule will be stored + movdqu [edx+16], xmm3 + + add edx,32 + + movdqa xmm5, [shuffle_mask] ; this mask is used by key_expansion + + aeskeygenassist xmm2, xmm3, 0x1 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x2 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x4 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x8 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x10 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x20 ; + call key_expansion256 + aeskeygenassist xmm2, xmm3, 0x40 ; +; call key_expansion256 + + pshufd xmm2, xmm2, 011111111b + + movdqu xmm4, xmm1 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pshufb xmm4, xmm5 + pxor xmm1, xmm4 + pxor xmm1, xmm2 + + movdqu [edx], xmm1 + + + ret + + + + + + +align 16 +global _iDec128 +_iDec128: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_dec128 + + cmp eax,4 + jl lp128decsingle + + test ecx,0xf + jz lp128decfour + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + mov ecx,esp + + +align 16 +lp128decfour: + + test eax,eax + jz end_dec128 + + cmp eax,4 + jl lp128decsingle + + load_and_xor4 esi, [ecx+10*16] + add esi,16*4 + aesdec4 [ecx+9*16] + aesdec4 [ecx+8*16] + aesdec4 [ecx+7*16] + aesdec4 [ecx+6*16] + aesdec4 [ecx+5*16] + aesdec4 [ecx+4*16] + aesdec4 [ecx+3*16] + aesdec4 [ecx+2*16] + aesdec4 [ecx+1*16] + aesdeclast4 [ecx+0*16] + + sub eax,4 + store4 esi+edi-(16*4) + jmp lp128decfour + + + align 16 +lp128decsingle: + + movdqu xmm0, [esi] + movdqu xmm4,[ecx+10*16] + pxor xmm0, xmm4 + aesdec1_u [ecx+9*16] + aesdec1_u [ecx+8*16] + aesdec1_u [ecx+7*16] + aesdec1_u [ecx+6*16] + aesdec1_u [ecx+5*16] + aesdec1_u [ecx+4*16] + aesdec1_u [ecx+3*16] + aesdec1_u [ecx+2*16] + aesdec1_u [ecx+1*16] + aesdeclast1_u [ecx+0*16] + + add esi, 16 + movdqu [edi+esi - 16], xmm0 + dec eax + jnz lp128decsingle + +end_dec128: + + mov esp,ebp + pop ebp + pop edi + pop esi + + ret + + + +align 16 +global _iDec128_CBC +_iDec128_CBC: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm5,[eax] ;iv + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_dec128_CBC + + cmp eax,4 + jl lp128decsingle_CBC + + test ecx,0xf + jz lp128decfour_CBC + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + mov ecx,esp + + +align 16 +lp128decfour_CBC: + + test eax,eax + jz end_dec128_CBC + + cmp eax,4 + jl lp128decsingle_CBC + + load_and_xor4 esi, [ecx+10*16] + add esi,16*4 + aesdec4 [ecx+9*16] + aesdec4 [ecx+8*16] + aesdec4 [ecx+7*16] + aesdec4 [ecx+6*16] + aesdec4 [ecx+5*16] + aesdec4 [ecx+4*16] + aesdec4 [ecx+3*16] + aesdec4 [ecx+2*16] + aesdec4 [ecx+1*16] + aesdeclast4 [ecx+0*16] + + pxor xmm0,xmm5 + movdqu xmm4,[esi- 16*4 + 0*16] + pxor xmm1,xmm4 + movdqu xmm4,[esi- 16*4 + 1*16] + pxor xmm2,xmm4 + movdqu xmm4,[esi- 16*4 + 2*16] + pxor xmm3,xmm4 + movdqu xmm5,[esi- 16*4 + 3*16] + + sub eax,4 + store4 esi+edi-(16*4) + jmp lp128decfour_CBC + + + align 16 +lp128decsingle_CBC: + + movdqu xmm0, [esi] + movdqa xmm1,xmm0 + movdqu xmm4,[ecx+10*16] + pxor xmm0, xmm4 + aesdec1_u [ecx+9*16] + aesdec1_u [ecx+8*16] + aesdec1_u [ecx+7*16] + aesdec1_u [ecx+6*16] + aesdec1_u [ecx+5*16] + aesdec1_u [ecx+4*16] + aesdec1_u [ecx+3*16] + aesdec1_u [ecx+2*16] + aesdec1_u [ecx+1*16] + aesdeclast1_u [ecx+0*16] + + pxor xmm0,xmm5 + movdqa xmm5,xmm1 + + add esi, 16 + movdqu [edi+esi - 16], xmm0 + dec eax + jnz lp128decsingle_CBC + +end_dec128_CBC: + + mov esp,ebp + pop ebp + pop edi + pop esi + + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm5 ; store last iv for chaining + + ret + + + + + + +align 16 +global _iDec192 +_iDec192: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_dec192 + + cmp eax,4 + jl lp192decsingle + + test ecx,0xf + jz lp192decfour + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + mov ecx,esp + + +align 16 +lp192decfour: + + test eax,eax + jz end_dec192 + + cmp eax,4 + jl lp192decsingle + + load_and_xor4 esi, [ecx+12*16] + add esi,16*4 + aesdec4 [ecx+11*16] + aesdec4 [ecx+10*16] + aesdec4 [ecx+9*16] + aesdec4 [ecx+8*16] + aesdec4 [ecx+7*16] + aesdec4 [ecx+6*16] + aesdec4 [ecx+5*16] + aesdec4 [ecx+4*16] + aesdec4 [ecx+3*16] + aesdec4 [ecx+2*16] + aesdec4 [ecx+1*16] + aesdeclast4 [ecx+0*16] + + sub eax,4 + store4 esi+edi-(16*4) + jmp lp192decfour + + + align 16 +lp192decsingle: + + movdqu xmm0, [esi] + movdqu xmm4,[ecx+12*16] + pxor xmm0, xmm4 + aesdec1_u [ecx+11*16] + aesdec1_u [ecx+10*16] + aesdec1_u [ecx+9*16] + aesdec1_u [ecx+8*16] + aesdec1_u [ecx+7*16] + aesdec1_u [ecx+6*16] + aesdec1_u [ecx+5*16] + aesdec1_u [ecx+4*16] + aesdec1_u [ecx+3*16] + aesdec1_u [ecx+2*16] + aesdec1_u [ecx+1*16] + aesdeclast1_u [ecx+0*16] + + add esi, 16 + movdqu [edi+esi - 16], xmm0 + dec eax + jnz lp192decsingle + +end_dec192: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + ret + + +align 16 +global _iDec192_CBC +_iDec192_CBC: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm5,[eax] ;iv + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_dec192_CBC + + cmp eax,4 + jl lp192decsingle_CBC + + test ecx,0xf + jz lp192decfour_CBC + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + mov ecx,esp + +align 16 +lp192decfour_CBC: + + test eax,eax + jz end_dec192_CBC + + cmp eax,4 + jl lp192decsingle_CBC + + load_and_xor4 esi, [ecx+12*16] + add esi,16*4 + aesdec4 [ecx+11*16] + aesdec4 [ecx+10*16] + aesdec4 [ecx+9*16] + aesdec4 [ecx+8*16] + aesdec4 [ecx+7*16] + aesdec4 [ecx+6*16] + aesdec4 [ecx+5*16] + aesdec4 [ecx+4*16] + aesdec4 [ecx+3*16] + aesdec4 [ecx+2*16] + aesdec4 [ecx+1*16] + aesdeclast4 [ecx+0*16] + + pxor xmm0,xmm5 + movdqu xmm4,[esi- 16*4 + 0*16] + pxor xmm1,xmm4 + movdqu xmm4,[esi- 16*4 + 1*16] + pxor xmm2,xmm4 + movdqu xmm4,[esi- 16*4 + 2*16] + pxor xmm3,xmm4 + movdqu xmm5,[esi- 16*4 + 3*16] + + sub eax,4 + store4 esi+edi-(16*4) + jmp lp192decfour_CBC + + + align 16 +lp192decsingle_CBC: + + movdqu xmm0, [esi] + movdqu xmm4,[ecx+12*16] + movdqa xmm1,xmm0 + pxor xmm0, xmm4 + aesdec1_u [ecx+11*16] + aesdec1_u [ecx+10*16] + aesdec1_u [ecx+9*16] + aesdec1_u [ecx+8*16] + aesdec1_u [ecx+7*16] + aesdec1_u [ecx+6*16] + aesdec1_u [ecx+5*16] + aesdec1_u [ecx+4*16] + aesdec1_u [ecx+3*16] + aesdec1_u [ecx+2*16] + aesdec1_u [ecx+1*16] + aesdeclast1_u [ecx+0*16] + + pxor xmm0,xmm5 + movdqa xmm5,xmm1 + + add esi, 16 + movdqu [edi+esi - 16], xmm0 + dec eax + jnz lp192decsingle_CBC + +end_dec192_CBC: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + mov ecx,[esp-4+8] + mov ecx,[ecx+12] + movdqu [ecx],xmm5 ; store last iv for chaining + + ret + + + + + +align 16 +global _iDec256 +_iDec256: + mov ecx, [esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + + test eax,eax + jz end_dec256 + + cmp eax,4 + jl lp256dec + + test ecx,0xf + jz lp256dec4 + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + copy_round_keys esp,ecx,13 + copy_round_keys esp,ecx,14 + mov ecx,esp + + align 16 +lp256dec4: + test eax,eax + jz end_dec256 + + cmp eax,4 + jl lp256dec + + load_and_xor4 esi,[ecx+14*16] + add esi, 4*16 + aesdec4 [ecx+13*16] + aesdec4 [ecx+12*16] + aesdec4 [ecx+11*16] + aesdec4 [ecx+10*16] + aesdec4 [ecx+9*16] + aesdec4 [ecx+8*16] + aesdec4 [ecx+7*16] + aesdec4 [ecx+6*16] + aesdec4 [ecx+5*16] + aesdec4 [ecx+4*16] + aesdec4 [ecx+3*16] + aesdec4 [ecx+2*16] + aesdec4 [ecx+1*16] + aesdeclast4 [ecx+0*16] + + store4 esi+edi-16*4 + sub eax,4 + jmp lp256dec4 + + align 16 +lp256dec: + + movdqu xmm0, [esi] + movdqu xmm4,[ecx+14*16] + add esi, 16 + pxor xmm0, xmm4 ; Round 0 (only xor) + aesdec1_u [ecx+13*16] + aesdec1_u [ecx+12*16] + aesdec1_u [ecx+11*16] + aesdec1_u [ecx+10*16] + aesdec1_u [ecx+9*16] + aesdec1_u [ecx+8*16] + aesdec1_u [ecx+7*16] + aesdec1_u [ecx+6*16] + aesdec1_u [ecx+5*16] + aesdec1_u [ecx+4*16] + aesdec1_u [ecx+3*16] + aesdec1_u [ecx+2*16] + aesdec1_u [ecx+1*16] + aesdeclast1_u [ecx+0*16] + + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp256dec + +end_dec256: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + ret + + + + +align 16 +global _iDec256_CBC +_iDec256_CBC: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm5,[eax] ;iv + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_dec256_CBC + + cmp eax,4 + jl lp256decsingle_CBC + + test ecx,0xf + jz lp256decfour_CBC + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + copy_round_keys esp,ecx,13 + copy_round_keys esp,ecx,14 + mov ecx,esp + +align 16 +lp256decfour_CBC: + + test eax,eax + jz end_dec256_CBC + + cmp eax,4 + jl lp256decsingle_CBC + + load_and_xor4 esi, [ecx+14*16] + add esi,16*4 + aesdec4 [ecx+13*16] + aesdec4 [ecx+12*16] + aesdec4 [ecx+11*16] + aesdec4 [ecx+10*16] + aesdec4 [ecx+9*16] + aesdec4 [ecx+8*16] + aesdec4 [ecx+7*16] + aesdec4 [ecx+6*16] + aesdec4 [ecx+5*16] + aesdec4 [ecx+4*16] + aesdec4 [ecx+3*16] + aesdec4 [ecx+2*16] + aesdec4 [ecx+1*16] + aesdeclast4 [ecx+0*16] + + pxor xmm0,xmm5 + movdqu xmm4,[esi- 16*4 + 0*16] + pxor xmm1,xmm4 + movdqu xmm4,[esi- 16*4 + 1*16] + pxor xmm2,xmm4 + movdqu xmm4,[esi- 16*4 + 2*16] + pxor xmm3,xmm4 + movdqu xmm5,[esi- 16*4 + 3*16] + + sub eax,4 + store4 esi+edi-(16*4) + jmp lp256decfour_CBC + + + align 16 +lp256decsingle_CBC: + + movdqu xmm0, [esi] + movdqa xmm1,xmm0 + movdqu xmm4, [ecx+14*16] + pxor xmm0, xmm4 + aesdec1_u [ecx+13*16] + aesdec1_u [ecx+12*16] + aesdec1_u [ecx+11*16] + aesdec1_u [ecx+10*16] + aesdec1_u [ecx+9*16] + aesdec1_u [ecx+8*16] + aesdec1_u [ecx+7*16] + aesdec1_u [ecx+6*16] + aesdec1_u [ecx+5*16] + aesdec1_u [ecx+4*16] + aesdec1_u [ecx+3*16] + aesdec1_u [ecx+2*16] + aesdec1_u [ecx+1*16] + aesdeclast1_u [ecx+0*16] + + pxor xmm0,xmm5 + movdqa xmm5,xmm1 + + add esi, 16 + movdqu [edi+esi - 16], xmm0 + dec eax + jnz lp256decsingle_CBC + +end_dec256_CBC: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm5 ; store last iv for chaining + + ret + + + + + + + + + +align 16 +global _iEnc128 +_iEnc128: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_enc128 + + cmp eax,4 + jl lp128encsingle + + test ecx,0xf + jz lpenc128four + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + mov ecx,esp + + + align 16 + +lpenc128four: + + test eax,eax + jz end_enc128 + + cmp eax,4 + jl lp128encsingle + + load_and_xor4 esi,[ecx+0*16] + add esi,4*16 + aesenc4 [ecx+1*16] + aesenc4 [ecx+2*16] + aesenc4 [ecx+3*16] + aesenc4 [ecx+4*16] + aesenc4 [ecx+5*16] + aesenc4 [ecx+6*16] + aesenc4 [ecx+7*16] + aesenc4 [ecx+8*16] + aesenc4 [ecx+9*16] + aesenclast4 [ecx+10*16] + + store4 esi+edi-16*4 + sub eax,4 + jmp lpenc128four + + align 16 +lp128encsingle: + + movdqu xmm0, [esi] + add esi, 16 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1_u [ecx+1*16] + aesenc1_u [ecx+2*16] + aesenc1_u [ecx+3*16] + aesenc1_u [ecx+4*16] + aesenc1_u [ecx+5*16] + aesenc1_u [ecx+6*16] + aesenc1_u [ecx+7*16] + aesenc1_u [ecx+8*16] + aesenc1_u [ecx+9*16] + aesenclast1_u [ecx+10*16] + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp128encsingle + +end_enc128: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + ret + + +align 16 +global _iEnc128_CTR +_iEnc128_CTR: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm5,[eax] ;initial counter + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_encctr128 + + cmp eax,4 + jl lp128encctrsingle + + test ecx,0xf + jz lpencctr128four + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + mov ecx,esp + + + align 16 + +lpencctr128four: + + test eax,eax + jz end_encctr128 + + cmp eax,4 + jl lp128encsingle + + load_and_inc4 [ecx+0*16] + add esi,4*16 + aesenc4 [ecx+1*16] + aesenc4 [ecx+2*16] + aesenc4 [ecx+3*16] + aesenc4 [ecx+4*16] + aesenc4 [ecx+5*16] + aesenc4 [ecx+6*16] + aesenc4 [ecx+7*16] + aesenc4 [ecx+8*16] + aesenc4 [ecx+9*16] + aesenclast4 [ecx+10*16] + xor_with_input4 esi-(4*16) + + store4 esi+edi-16*4 + sub eax,4 + jmp lpencctr128four + + align 16 +lp128encctrsingle: + + movdqa xmm0,xmm5 + paddq xmm5,[counter_add_one] + add esi, 16 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1_u [ecx+1*16] + aesenc1_u [ecx+2*16] + aesenc1_u [ecx+3*16] + aesenc1_u [ecx+4*16] + aesenc1_u [ecx+5*16] + aesenc1_u [ecx+6*16] + aesenc1_u [ecx+7*16] + aesenc1_u [ecx+8*16] + aesenc1_u [ecx+9*16] + aesenclast1_u [ecx+10*16] + movdqu xmm4, [esi-16] + pxor xmm0,xmm4 + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp128encctrsingle + +end_encctr128: + + mov esp,ebp + pop ebp + pop edi + pop esi + + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm5 ; store last counter for chaining + + ret + + +align 16 +global _iEnc192_CTR +_iEnc192_CTR: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm5,[eax] ;initial counter + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_encctr192 + + cmp eax,4 + jl lp192encctrsingle + + test ecx,0xf + jz lpencctr128four + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + mov ecx,esp + + + align 16 + +lpencctr192four: + + test eax,eax + jz end_encctr192 + + cmp eax,4 + jl lp192encsingle + + load_and_inc4 [ecx+0*16] + add esi,4*16 + aesenc4 [ecx+1*16] + aesenc4 [ecx+2*16] + aesenc4 [ecx+3*16] + aesenc4 [ecx+4*16] + aesenc4 [ecx+5*16] + aesenc4 [ecx+6*16] + aesenc4 [ecx+7*16] + aesenc4 [ecx+8*16] + aesenc4 [ecx+9*16] + aesenc4 [ecx+10*16] + aesenc4 [ecx+11*16] + aesenclast4 [ecx+12*16] + xor_with_input4 esi-(4*16) + + store4 esi+edi-16*4 + sub eax,4 + jmp lpencctr192four + + align 16 +lp192encctrsingle: + + movdqa xmm0,xmm5 + paddq xmm5,[counter_add_one] + add esi, 16 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1_u [ecx+1*16] + aesenc1_u [ecx+2*16] + aesenc1_u [ecx+3*16] + aesenc1_u [ecx+4*16] + aesenc1_u [ecx+5*16] + aesenc1_u [ecx+6*16] + aesenc1_u [ecx+7*16] + aesenc1_u [ecx+8*16] + aesenc1_u [ecx+9*16] + aesenc1_u [ecx+10*16] + aesenc1_u [ecx+11*16] + aesenclast1_u [ecx+12*16] + movdqu xmm4, [esi-16] + pxor xmm0,xmm4 + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp192encctrsingle + +end_encctr192: + + mov esp,ebp + pop ebp + pop edi + pop esi + + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm5 ; store last counter for chaining + + ret + + +align 16 +global _iEnc256_CTR +_iEnc256_CTR: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm5,[eax] ;initial counter + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_encctr256 + + cmp eax,4 + jl lp256encctrsingle + + test ecx,0xf + jz lpencctr128four + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + copy_round_keys esp,ecx,13 + copy_round_keys esp,ecx,14 + mov ecx,esp + + + align 16 + +lpencctr256four: + + test eax,eax + jz end_encctr256 + + cmp eax,4 + jl lp256encctrsingle + + load_and_inc4 [ecx+0*16] + add esi,4*16 + aesenc4 [ecx+1*16] + aesenc4 [ecx+2*16] + aesenc4 [ecx+3*16] + aesenc4 [ecx+4*16] + aesenc4 [ecx+5*16] + aesenc4 [ecx+6*16] + aesenc4 [ecx+7*16] + aesenc4 [ecx+8*16] + aesenc4 [ecx+9*16] + aesenc4 [ecx+10*16] + aesenc4 [ecx+11*16] + aesenc4 [ecx+12*16] + aesenc4 [ecx+13*16] + aesenclast4 [ecx+14*16] + xor_with_input4 esi-(4*16) + + store4 esi+edi-16*4 + sub eax,4 + jmp lpencctr256four + + align 16 + +lp256encctrsingle: + + movdqa xmm0,xmm5 + paddq xmm5,[counter_add_one] + add esi, 16 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1_u [ecx+1*16] + aesenc1_u [ecx+2*16] + aesenc1_u [ecx+3*16] + aesenc1_u [ecx+4*16] + aesenc1_u [ecx+5*16] + aesenc1_u [ecx+6*16] + aesenc1_u [ecx+7*16] + aesenc1_u [ecx+8*16] + aesenc1_u [ecx+9*16] + aesenc1_u [ecx+10*16] + aesenc1_u [ecx+11*16] + aesenc1_u [ecx+12*16] + aesenc1_u [ecx+13*16] + aesenclast1_u [ecx+14*16] + movdqu xmm4, [esi-16] + pxor xmm0,xmm4 + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp256encctrsingle + +end_encctr256: + + mov esp,ebp + pop ebp + pop edi + pop esi + + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm5 ; store last counter for chaining + + ret + + + + + + +align 16 +global _iEnc128_CBC +_iEnc128_CBC: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm1,[eax] ;iv + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + sub edi,esi + + test ecx,0xf + jz lp128encsingle_CBC + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + mov ecx,esp + + align 16 + +lp128encsingle_CBC: + + movdqu xmm0, [esi] + add esi, 16 + pxor xmm0, xmm1 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1 [ecx+1*16] + aesenc1 [ecx+2*16] + aesenc1 [ecx+3*16] + aesenc1 [ecx+4*16] + aesenc1 [ecx+5*16] + aesenc1 [ecx+6*16] + aesenc1 [ecx+7*16] + aesenc1 [ecx+8*16] + aesenc1 [ecx+9*16] + aesenclast1 [ecx+10*16] + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + movdqa xmm1,xmm0 + dec eax + jnz lp128encsingle_CBC + + + mov esp,ebp + pop ebp + pop edi + pop esi + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm1 ; store last iv for chaining + + ret + + +align 16 +global _iEnc192_CBC +_iEnc192_CBC: + mov ecx,[esp-4+8] ; first arg + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm1,[eax] ;iv + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + sub edi,esi + + test ecx,0xf + jz lp192encsingle_CBC + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + mov ecx,esp + + align 16 + +lp192encsingle_CBC: + + movdqu xmm0, [esi] + add esi, 16 + pxor xmm0, xmm1 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1 [ecx+1*16] + aesenc1 [ecx+2*16] + aesenc1 [ecx+3*16] + aesenc1 [ecx+4*16] + aesenc1 [ecx+5*16] + aesenc1 [ecx+6*16] + aesenc1 [ecx+7*16] + aesenc1 [ecx+8*16] + aesenc1 [ecx+9*16] + aesenc1 [ecx+10*16] + aesenc1 [ecx+11*16] + aesenclast1 [ecx+12*16] + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + movdqa xmm1,xmm0 + dec eax + jnz lp192encsingle_CBC + + + mov esp,ebp + pop ebp + pop edi + pop esi + mov ecx,[esp-4+8] ; first arg + mov ecx,[ecx+12] + movdqu [ecx],xmm1 ; store last iv for chaining + + ret + +align 16 +global _iEnc256_CBC +_iEnc256_CBC: + mov ecx,[esp-4+8] ; first arg + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+12] + movdqu xmm1,[eax] ;iv + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + sub edi,esi + + test ecx,0xf + jz lp256encsingle_CBC + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + copy_round_keys esp,ecx,13 + copy_round_keys esp,ecx,14 + mov ecx,esp + + align 16 + +lp256encsingle_CBC: + +;abab + movdqu xmm0, [esi] + add esi, 16 + pxor xmm0, xmm1 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1 [ecx+1*16] + aesenc1 [ecx+2*16] + aesenc1 [ecx+3*16] + aesenc1 [ecx+4*16] + aesenc1 [ecx+5*16] + aesenc1 [ecx+6*16] + aesenc1 [ecx+7*16] + aesenc1 [ecx+8*16] + aesenc1 [ecx+9*16] + aesenc1 [ecx+10*16] + aesenc1 [ecx+11*16] + aesenc1 [ecx+12*16] + aesenc1 [ecx+13*16] + aesenclast1 [ecx+14*16] + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + movdqa xmm1,xmm0 + dec eax + jnz lp256encsingle_CBC + + + mov esp,ebp + pop ebp + pop edi + pop esi + mov ecx,[esp-4+8] + mov ecx,[ecx+12] + movdqu [ecx],xmm1 ; store last iv for chaining + + ret + + + + + +align 16 +global _iEnc192 +_iEnc192: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_enc192 + + cmp eax,4 + jl lp192encsingle + + test ecx,0xf + jz lpenc192four + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + mov ecx,esp + + align 16 + +lpenc192four: + + test eax,eax + jz end_enc192 + + cmp eax,4 + jl lp192encsingle + + load_and_xor4 esi,[ecx+0*16] + add esi,4*16 + aesenc4 [ecx+1*16] + aesenc4 [ecx+2*16] + aesenc4 [ecx+3*16] + aesenc4 [ecx+4*16] + aesenc4 [ecx+5*16] + aesenc4 [ecx+6*16] + aesenc4 [ecx+7*16] + aesenc4 [ecx+8*16] + aesenc4 [ecx+9*16] + aesenc4 [ecx+10*16] + aesenc4 [ecx+11*16] + aesenclast4 [ecx+12*16] + + store4 esi+edi-16*4 + sub eax,4 + jmp lpenc192four + + align 16 +lp192encsingle: + + movdqu xmm0, [esi] + add esi, 16 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1_u [ecx+1*16] + aesenc1_u [ecx+2*16] + aesenc1_u [ecx+3*16] + aesenc1_u [ecx+4*16] + aesenc1_u [ecx+5*16] + aesenc1_u [ecx+6*16] + aesenc1_u [ecx+7*16] + aesenc1_u [ecx+8*16] + aesenc1_u [ecx+9*16] + aesenc1_u [ecx+10*16] + aesenc1_u [ecx+11*16] + aesenclast1_u [ecx+12*16] + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp192encsingle + +end_enc192: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + ret + + + + +align 16 +global _iEnc256 +_iEnc256: + mov ecx,[esp-4+8] + + push esi + push edi + push ebp + mov ebp,esp + + sub esp,16*16 + and esp,0xfffffff0 + + mov eax,[ecx+16] ; numblocks + mov esi,[ecx] + mov edi,[ecx+4] + mov ecx,[ecx+8] + + sub edi,esi + + test eax,eax + jz end_enc256 + + cmp eax,4 + jl lp256enc + + test ecx,0xf + jz lp256enc4 + + copy_round_keys esp,ecx,0 + copy_round_keys esp,ecx,1 + copy_round_keys esp,ecx,2 + copy_round_keys esp,ecx,3 + copy_round_keys esp,ecx,4 + copy_round_keys esp,ecx,5 + copy_round_keys esp,ecx,6 + copy_round_keys esp,ecx,7 + copy_round_keys esp,ecx,8 + copy_round_keys esp,ecx,9 + copy_round_keys esp,ecx,10 + copy_round_keys esp,ecx,11 + copy_round_keys esp,ecx,12 + copy_round_keys esp,ecx,13 + copy_round_keys esp,ecx,14 + mov ecx,esp + + + + align 16 + +lp256enc4: + test eax,eax + jz end_enc256 + + cmp eax,4 + jl lp256enc + + + load_and_xor4 esi,[ecx+0*16] + add esi, 16*4 + aesenc4 [ecx+1*16] + aesenc4 [ecx+2*16] + aesenc4 [ecx+3*16] + aesenc4 [ecx+4*16] + aesenc4 [ecx+5*16] + aesenc4 [ecx+6*16] + aesenc4 [ecx+7*16] + aesenc4 [ecx+8*16] + aesenc4 [ecx+9*16] + aesenc4 [ecx+10*16] + aesenc4 [ecx+11*16] + aesenc4 [ecx+12*16] + aesenc4 [ecx+13*16] + aesenclast4 [ecx+14*16] + + store4 esi+edi-16*4 + sub eax,4 + jmp lp256enc4 + + align 16 +lp256enc: + + movdqu xmm0, [esi] + add esi, 16 + movdqu xmm4,[ecx+0*16] + pxor xmm0, xmm4 + aesenc1_u [ecx+1*16] + aesenc1_u [ecx+2*16] + aesenc1_u [ecx+3*16] + aesenc1_u [ecx+4*16] + aesenc1_u [ecx+5*16] + aesenc1_u [ecx+6*16] + aesenc1_u [ecx+7*16] + aesenc1_u [ecx+8*16] + aesenc1_u [ecx+9*16] + aesenc1_u [ecx+10*16] + aesenc1_u [ecx+11*16] + aesenc1_u [ecx+12*16] + aesenc1_u [ecx+13*16] + aesenclast1_u [ecx+14*16] + + ; Store output encrypted data into CIPHERTEXT array + movdqu [esi+edi-16], xmm0 + dec eax + jnz lp256enc + +end_enc256: + + + mov esp,ebp + pop ebp + pop edi + pop esi + + ret diff --git a/lib/accelerated/intel/iaes_asm_interface.h b/lib/accelerated/intel/iaes_asm_interface.h new file mode 100755 index 0000000000..093d2a56e3 --- /dev/null +++ b/lib/accelerated/intel/iaes_asm_interface.h @@ -0,0 +1,126 @@ +/* + * Copyright (c) 2010, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + +#ifndef _INTEL_AES_ASM_INTERFACE_H__ +#define _INTEL_AES_ASM_INTERFACE_H__ + + +#include "iaesni.h" + + + +//structure to pass aes processing data to asm level functions +typedef struct _sAesData +{ + _AES_IN UCHAR *in_block; + _AES_OUT UCHAR *out_block; + _AES_IN UCHAR *expanded_key; + _AES_INOUT UCHAR *iv; // for CBC mode + _AES_IN size_t num_blocks; +} sAesData; + +#if (__cplusplus) +extern "C" +{ +#endif +#if 0 +#define MYSTDCALL __stdcall +#else +#define MYSTDCALL +#endif + +#ifdef __linux__ +#ifndef __LP64__ +#define iEncExpandKey256 _iEncExpandKey256 +#define iEncExpandKey192 _iEncExpandKey192 +#define iEncExpandKey128 _iEncExpandKey128 +#define iDecExpandKey256 _iDecExpandKey256 +#define iDecExpandKey192 _iDecExpandKey192 +#define iDecExpandKey128 _iDecExpandKey128 +#define iEnc128 _iEnc128 +#define iDec128 _iDec128 +#define iEnc256 _iEnc256 +#define iDec256 _iDec256 +#define iEnc192 _iEnc192 +#define iDec192 _iDec192 +#define iEnc128_CBC _iEnc128_CBC +#define iDec128_CBC _iDec128_CBC +#define iEnc256_CBC _iEnc256_CBC +#define iDec256_CBC _iDec256_CBC +#define iEnc192_CBC _iEnc192_CBC +#define iDec192_CBC _iDec192_CBC +#define iEnc128_CTR _iEnc128_CTR +#define iEnc192_CTR _iEnc192_CTR +#define iEnc256_CTR _iEnc256_CTR +#define do_rdtsc _do_rdtsc +#endif +#endif + // prepearing the different key rounds, for enc/dec in asm + // expnaded key should be 16-byte aligned + // expanded key should have enough space to hold all key rounds (16 bytes per round) - 256 bytes would cover all cases (AES256 has 14 rounds + 1 xor) + void MYSTDCALL iEncExpandKey256(_AES_IN UCHAR *key, _AES_OUT UCHAR *expanded_key); + void MYSTDCALL iEncExpandKey192(_AES_IN UCHAR *key, _AES_OUT UCHAR *expanded_key); + void MYSTDCALL iEncExpandKey128(_AES_IN UCHAR *key, _AES_OUT UCHAR *expanded_key); + + void MYSTDCALL iDecExpandKey256(UCHAR *key, _AES_OUT UCHAR *expanded_key); + void MYSTDCALL iDecExpandKey192(UCHAR *key, _AES_OUT UCHAR *expanded_key); + void MYSTDCALL iDecExpandKey128(UCHAR *key, _AES_OUT UCHAR *expanded_key); + + + //enc/dec asm functions + void MYSTDCALL iEnc128(sAesData *data); + void MYSTDCALL iDec128(sAesData *data); + void MYSTDCALL iEnc256(sAesData *data); + void MYSTDCALL iDec256(sAesData *data); + void MYSTDCALL iEnc192(sAesData *data); + void MYSTDCALL iDec192(sAesData *data); + + void MYSTDCALL iEnc128_CBC(sAesData *data); + void MYSTDCALL iDec128_CBC(sAesData *data); + void MYSTDCALL iEnc256_CBC(sAesData *data); + void MYSTDCALL iDec256_CBC(sAesData *data); + void MYSTDCALL iEnc192_CBC(sAesData *data); + void MYSTDCALL iDec192_CBC(sAesData *data); + + + void MYSTDCALL iEnc128_CTR(sAesData *data); + void MYSTDCALL iEnc256_CTR(sAesData *data); + void MYSTDCALL iEnc192_CTR(sAesData *data); + + // rdtsc function + unsigned long long do_rdtsc(void); + + +#if (__cplusplus) +} +#endif + + +#endif + diff --git a/lib/accelerated/intel/iaesni.h b/lib/accelerated/intel/iaesni.h new file mode 100755 index 0000000000..b358faa7ee --- /dev/null +++ b/lib/accelerated/intel/iaesni.h @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2010, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * * Neither the name of Intel Corporation nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + + +#ifndef _IAESNI_H__ +#define _IAESNI_H__ + +#include + +#define AES_INSTRCTIONS_CPUID_BIT (1<<25) + +//indicates input param +#define _AES_IN + +//indicates output param +#define _AES_OUT + +//indicates input/output param - based on context +#define _AES_INOUT + +typedef unsigned char UCHAR; + + +#ifndef bool +#define bool BOOL +#endif +//test if the processor actually supports the above functions +//executing one the functions below without processor support will cause UD fault +//bool check_for_aes_instructions(void); +#if (__cplusplus) +extern "C" { +#endif +int check_for_aes_instructions(void); + +#define ROUND_KEYS_UNALIGNED_TESTING + +#ifdef __linux__ + +#ifdef ROUND_KEYS_UNALIGNED_TESTING + +#define DEFINE_ROUND_KEYS \ + UCHAR __attribute__ ((aligned (16))) _expandedKey[16*16]; \ + UCHAR *expandedKey = _expandedKey + 4; \ + + +#else + + + +#define DEFINE_ROUND_KEYS \ + UCHAR __attribute__ ((aligned (16))) _expandedKey[16*16]; \ + UCHAR *expandedKey = _expandedKey; \ + +#endif + +#else // if not __linux__ + +#ifdef ROUND_KEYS_UNALIGNED_TESTING + +#define DEFINE_ROUND_KEYS \ + __declspec(align(16)) UCHAR _expandedKey[16*16]; \ + UCHAR *expandedKey = _expandedKey + 4; \ + + +#else + + + +#define DEFINE_ROUND_KEYS \ + __declspec(align(16)) UCHAR _expandedKey[16*16]; \ + UCHAR *expandedKey = _expandedKey; \ + + +#endif + +#endif + + + +// encryption functions +// plainText is pointer to input stream +// cipherText is pointer to buffer to be filled with encrypted (cipher text) data +// key is pointer to enc key (sizes are 16 bytes for AES-128, 24 bytes for AES-192, 32 for AES-256) +// numBlocks is number of 16 bytes blocks to process - note that encryption is done of full 16 byte blocks +void intel_AES_enc128(_AES_IN UCHAR *plainText, _AES_OUT UCHAR *cipherText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks); +void intel_AES_enc192(_AES_IN UCHAR *plainText, _AES_OUT UCHAR *cipherText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks); +void intel_AES_enc256(_AES_IN UCHAR *plainText, _AES_OUT UCHAR *cipherText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks); + + +void intel_AES_enc128_CBC(_AES_IN UCHAR *plainText, _AES_OUT UCHAR *cipherText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *iv); +void intel_AES_enc192_CBC(_AES_IN UCHAR *plainText, _AES_OUT UCHAR *cipherText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *iv); +void intel_AES_enc256_CBC(_AES_IN UCHAR *plainText, _AES_OUT UCHAR *cipherText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *iv); + + +// encryption functions +// cipherText is pointer to encrypted stream +// plainText is pointer to buffer to be filled with original (plain text) data +// key is pointer to enc key (sizes are 16 bytes for AES-128, 24 bytes for AES-192, 32 for AES-256) +// numBlocks is number of 16 bytes blocks to process - note that decryption is done of full 16 byte blocks +void intel_AES_dec128(_AES_IN UCHAR *cipherText, _AES_OUT UCHAR *plainText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks); +void intel_AES_dec192(_AES_IN UCHAR *cipherText, _AES_OUT UCHAR *plainText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks); +void intel_AES_dec256(_AES_IN UCHAR *cipherText, _AES_OUT UCHAR *plainText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks); + +void intel_AES_dec128_CBC(_AES_IN UCHAR *cipherText, _AES_OUT UCHAR *plainText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *iv); +void intel_AES_dec192_CBC(_AES_IN UCHAR *cipherText, _AES_OUT UCHAR *plainText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *iv); +void intel_AES_dec256_CBC(_AES_IN UCHAR *cipherText, _AES_OUT UCHAR *plainText, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *iv); + +void intel_AES_encdec128_CTR(_AES_IN UCHAR *input, _AES_OUT UCHAR *output, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *initial_counter); +void intel_AES_encdec192_CTR(_AES_IN UCHAR *input, _AES_OUT UCHAR *output, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *initial_counter); +void intel_AES_encdec256_CTR(_AES_IN UCHAR *input, _AES_OUT UCHAR *output, _AES_IN UCHAR *key, _AES_IN size_t numBlocks, _AES_IN UCHAR *initial_counter); + + +#if (__cplusplus) +} +#endif + + +#endif + + + diff --git a/lib/accelerated/intel/license.txt b/lib/accelerated/intel/license.txt new file mode 100755 index 0000000000..a93c3231d1 --- /dev/null +++ b/lib/accelerated/intel/license.txt @@ -0,0 +1,34 @@ +/* intel_aes_lib source files come from Intel. + * Modified by Patrick Fay + * +Copyright (c) 2010, Intel Corporation +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + * Neither the name of Intel Corporation nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + --------------------------------------------------------------------------- + Issue Date: Aug 6, 2010 + */ + +Other source code files use the license shown in the source code file. diff --git a/m4/gcc.m4 b/m4/gcc.m4 index ad40adac7e..78ba57017a 100644 --- a/m4/gcc.m4 +++ b/m4/gcc.m4 @@ -15,7 +15,7 @@ AC_DEFUN([GCC_FLAG_ADD], AC_CACHE_CHECK([whether compiler handles $1], [GCC_FLAG], [ save_CFLAGS="$CFLAGS" CFLAGS="${CFLAGS} $1" - AC_PREPROC_IFELSE([AC_LANG_PROGRAM([])], + AC_COMPILE_IFELSE([AC_LANG_PROGRAM([])], [AS_VAR_SET([GCC_FLAG], [yes])], [AS_VAR_SET([GCC_FLAG], [no])]) CFLAGS="$save_CFLAGS"