From: Olivier Hainque Date: Tue, 23 Mar 2004 21:54:36 +0000 (+0100) Subject: optabs.c (expand_binop): When synthesizing double word rotates from single word shifts... X-Git-Tag: releases/gcc-4.0.0~9198 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=0c0ab0f1e8936341273663940ea12f84b0a109ad;p=thirdparty%2Fgcc.git optabs.c (expand_binop): When synthesizing double word rotates from single word shifts... * optabs.c (expand_binop): When synthesizing double word rotates from single word shifts, use a new register target if the provided target is not a REG already. From-SVN: r79875 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82b3453b72c4..9b4f247b89f1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-03-23 Olivier Hainque + + * optabs.c (expand_binop): When synthesizing double word rotates + from single word shifts, use a new register target if the provided + target is not a REG already. + 2004-03-23 Richard Kenner * alias.c (get_alias_set): Add support for TYPE_REF_CAN_ALIAS_ALL. diff --git a/gcc/optabs.c b/gcc/optabs.c index b9439a7dcd63..0dfc093a7c14 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -1087,8 +1087,12 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, int shift_count, left_shift, outof_word; /* If TARGET is the same as one of the operands, the REG_EQUAL note - won't be accurate, so use a new target. */ - if (target == 0 || target == op0 || target == op1) + won't be accurate, so use a new target. Do this also if target is not + a REG, first because having a register instead may open optimization + oportunities, and second because if target and op0 happen to be MEMs + designating the same location, we would risk clobbering it too early + in the code sequence we generate below. */ + if (target == 0 || target == op0 || target == op1 || ! REG_P (target)) target = gen_reg_rtx (mode); start_sequence ();