From: Lad Prabhakar Date: Thu, 4 Sep 2025 07:19:53 +0000 (+0100) Subject: dt-bindings: clock: renesas,r9a09g077/87: Add Ethernet clock IDs X-Git-Tag: v6.18-rc1~50^2~7^3^2~7^2 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=0dcfb6fcdd085bbfcdfdcf64a7d4a75c63c108af;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: clock: renesas,r9a09g077/87: Add Ethernet clock IDs Add clock definitions for Ethernet (ETCLK A-E) to both R9A09G077 and R9A09G087 SoCs. These definitions are required for describing Ethernet devices in DT. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250904071954.3176806-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h index 0c2ce81a87448..2a805e06487b9 100644 --- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h +++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h @@ -26,5 +26,10 @@ #define R9A09G077_CLK_PCLKL 14 #define R9A09G077_SDHI_CLKHS 15 #define R9A09G077_USB_CLK 16 +#define R9A09G077_ETCLKA 17 +#define R9A09G077_ETCLKB 18 +#define R9A09G077_ETCLKC 19 +#define R9A09G077_ETCLKD 20 +#define R9A09G077_ETCLKE 21 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */ diff --git a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h index 70ee883f2386b..09da0ad33be61 100644 --- a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h +++ b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h @@ -26,5 +26,10 @@ #define R9A09G087_CLK_PCLKL 14 #define R9A09G087_SDHI_CLKHS 15 #define R9A09G087_USB_CLK 16 +#define R9A09G087_ETCLKA 17 +#define R9A09G087_ETCLKB 18 +#define R9A09G087_ETCLKC 19 +#define R9A09G087_ETCLKD 20 +#define R9A09G087_ETCLKE 21 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__ */