From: Greg Kroah-Hartman Date: Mon, 12 Dec 2022 07:23:24 +0000 (+0100) Subject: 6.0-stable patches X-Git-Tag: v4.9.336~5 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=11055ab489775c49f119c971718009157fe82569;p=thirdparty%2Fkernel%2Fstable-queue.git 6.0-stable patches added patches: drm-amdgpu-vcn-update-vcn4-fw-shared-data-structure.patch --- diff --git a/queue-6.0/drm-amdgpu-vcn-update-vcn4-fw-shared-data-structure.patch b/queue-6.0/drm-amdgpu-vcn-update-vcn4-fw-shared-data-structure.patch new file mode 100644 index 00000000000..bf63e011dee --- /dev/null +++ b/queue-6.0/drm-amdgpu-vcn-update-vcn4-fw-shared-data-structure.patch @@ -0,0 +1,67 @@ +From 167be8522821fd38636410103e1c154b589cb1d9 Mon Sep 17 00:00:00 2001 +From: Ruijing Dong +Date: Thu, 22 Sep 2022 11:27:52 -0400 +Subject: drm/amdgpu/vcn: update vcn4 fw shared data structure + +From: Ruijing Dong + +commit 167be8522821fd38636410103e1c154b589cb1d9 upstream. + +update VF_RB_SETUP_FLAG, add SMU_DPM_INTERFACE_FLAG, +and corresponding change in VCN4. + +Reviewed-by: Leo Liu +Signed-off-by: Ruijing Dong +Signed-off-by: Alex Deucher +[ Hand modified large dependency of commit aa44beb5f0155 ("drm/amdgpu/vcn: Add sriov VCN v4_0 unified queue support") + This no longer updates VF_RB_SETUP_FLAG, but just adds SMU_DPM_INTERFACE_FLAG. ] +Signed-off-by: Mario Limonciello +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 7 +++++++ + drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++++ + 2 files changed, 11 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h +@@ -161,6 +161,7 @@ + #define AMDGPU_VCN_SW_RING_FLAG (1 << 9) + #define AMDGPU_VCN_FW_LOGGING_FLAG (1 << 10) + #define AMDGPU_VCN_SMU_VERSION_INFO_FLAG (1 << 11) ++#define AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG (1 << 11) + + #define AMDGPU_VCN_IB_FLAG_DECODE_BUFFER 0x00000001 + #define AMDGPU_VCN_CMD_FLAG_MSG_BUFFER 0x00000001 +@@ -170,6 +171,9 @@ + #define VCN_CODEC_DISABLE_MASK_HEVC (1 << 2) + #define VCN_CODEC_DISABLE_MASK_H264 (1 << 3) + ++#define AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU (0) ++#define AMDGPU_VCN_SMU_DPM_INTERFACE_APU (1) ++ + enum fw_queue_mode { + FW_QUEUE_RING_RESET = 1, + FW_QUEUE_DPG_HOLD_OFF = 2, +@@ -323,6 +327,9 @@ struct amdgpu_vcn4_fw_shared { + struct amdgpu_fw_shared_unified_queue_struct sq; + uint8_t pad1[8]; + struct amdgpu_fw_shared_fw_logging fw_log; ++ uint8_t pad2[20]; ++ uint32_t pad3[13]; ++ struct amdgpu_fw_shared_smu_interface_info smu_dpm_interface; + }; + + struct amdgpu_vcn_fwlog { +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c +@@ -132,6 +132,10 @@ static int vcn_v4_0_sw_init(void *handle + fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); + fw_shared->sq.is_enabled = 1; + ++ fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); ++ fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? ++ AMDGPU_VCN_SMU_DPM_INTERFACE_APU : AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU; ++ + if (amdgpu_vcnfw_log) + amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]); + } diff --git a/queue-6.0/series b/queue-6.0/series index 7308a23abb9..fe258666f5e 100644 --- a/queue-6.0/series +++ b/queue-6.0/series @@ -154,3 +154,4 @@ net-thunderbolt-fix-memory-leak-in-tbnet_open.patch net-mvneta-fix-an-out-of-bounds-check.patch macsec-add-missing-attribute-validation-for-offload.patch s390-qeth-fix-use-after-free-in-hsci.patch +drm-amdgpu-vcn-update-vcn4-fw-shared-data-structure.patch