From: Greg Kroah-Hartman Date: Wed, 2 Jul 2014 23:50:49 +0000 (-0700) Subject: 3.14-stable patches X-Git-Tag: v3.4.97~24 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=130ad783cde8fced99ae6961225c8ada298c32fb;p=thirdparty%2Fkernel%2Fstable-queue.git 3.14-stable patches added patches: powerpc-64bit-sendfile-is-capped-at-2gb.patch powerpc-add-at_hwcap2-to-indicate-v.crypto-category-support.patch powerpc-don-t-setup-cpus-with-bad-status.patch powerpc-don-t-skip-epapr-spin-table-cpus.patch powerpc-fix-typo-config_pmac.patch powerpc-fix-typo-config_ppc_cpu.patch powerpc-mm-check-paca-psize-is-up-to-date-for-huge-mappings.patch powerpc-perf-ensure-all-ebb-register-state-is-cleared-on-fork.patch powerpc-pseries-fix-overwritten-pe-state.patch powerpc-serial-use-saner-flags-when-creating-legacy-ports.patch --- diff --git a/queue-3.14/powerpc-64bit-sendfile-is-capped-at-2gb.patch b/queue-3.14/powerpc-64bit-sendfile-is-capped-at-2gb.patch new file mode 100644 index 00000000000..bc21b834517 --- /dev/null +++ b/queue-3.14/powerpc-64bit-sendfile-is-capped-at-2gb.patch @@ -0,0 +1,36 @@ +From 5d73320a96fcce80286f1447864c481b5f0b96fa Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Wed, 4 Jun 2014 10:48:48 +1000 +Subject: powerpc: 64bit sendfile is capped at 2GB + +From: Anton Blanchard + +commit 5d73320a96fcce80286f1447864c481b5f0b96fa upstream. + +commit 8f9c0119d7ba (compat: fs: Generic compat_sys_sendfile +implementation) changed the PowerPC 64bit sendfile call from +sys_sendile64 to sys_sendfile. + +Unfortunately this broke sendfile of lengths greater than 2G because +sys_sendfile caps at MAX_NON_LFS. Restore what we had previously which +fixes the bug. + +Signed-off-by: Anton Blanchard +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/include/asm/systbl.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/powerpc/include/asm/systbl.h ++++ b/arch/powerpc/include/asm/systbl.h +@@ -190,7 +190,7 @@ SYSCALL_SPU(getcwd) + SYSCALL_SPU(capget) + SYSCALL_SPU(capset) + COMPAT_SYS(sigaltstack) +-COMPAT_SYS_SPU(sendfile) ++SYSX_SPU(sys_sendfile64,compat_sys_sendfile,sys_sendfile) + SYSCALL(ni_syscall) + SYSCALL(ni_syscall) + PPC_SYS(vfork) diff --git a/queue-3.14/powerpc-add-at_hwcap2-to-indicate-v.crypto-category-support.patch b/queue-3.14/powerpc-add-at_hwcap2-to-indicate-v.crypto-category-support.patch new file mode 100644 index 00000000000..fcc46bd8101 --- /dev/null +++ b/queue-3.14/powerpc-add-at_hwcap2-to-indicate-v.crypto-category-support.patch @@ -0,0 +1,43 @@ +From dd58a092c4202f2bd490adab7285b3ff77f8e467 Mon Sep 17 00:00:00 2001 +From: Benjamin Herrenschmidt +Date: Tue, 10 Jun 2014 15:04:40 +1000 +Subject: powerpc: Add AT_HWCAP2 to indicate V.CRYPTO category support + +From: Benjamin Herrenschmidt + +commit dd58a092c4202f2bd490adab7285b3ff77f8e467 upstream. + +The Vector Crypto category instructions are supported by current POWER8 +chips, advertise them to userspace using a specific bit to properly +differentiate with chips of the same architecture level that might not +have them. + +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/include/uapi/asm/cputable.h | 1 + + arch/powerpc/kernel/cputable.c | 3 ++- + 2 files changed, 3 insertions(+), 1 deletion(-) + +--- a/arch/powerpc/include/uapi/asm/cputable.h ++++ b/arch/powerpc/include/uapi/asm/cputable.h +@@ -41,5 +41,6 @@ + #define PPC_FEATURE2_EBB 0x10000000 + #define PPC_FEATURE2_ISEL 0x08000000 + #define PPC_FEATURE2_TAR 0x04000000 ++#define PPC_FEATURE2_VEC_CRYPTO 0x02000000 + + #endif /* _UAPI__ASM_POWERPC_CPUTABLE_H */ +--- a/arch/powerpc/kernel/cputable.c ++++ b/arch/powerpc/kernel/cputable.c +@@ -109,7 +109,8 @@ extern void __restore_cpu_e6500(void); + PPC_FEATURE_PSERIES_PERFMON_COMPAT) + #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ + PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \ +- PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR) ++ PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ ++ PPC_FEATURE2_VEC_CRYPTO) + #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_HAS_ALTIVEC_COMP) diff --git a/queue-3.14/powerpc-don-t-setup-cpus-with-bad-status.patch b/queue-3.14/powerpc-don-t-setup-cpus-with-bad-status.patch new file mode 100644 index 00000000000..6c8e0b848e7 --- /dev/null +++ b/queue-3.14/powerpc-don-t-setup-cpus-with-bad-status.patch @@ -0,0 +1,38 @@ +From 59a53afe70fd530040bdc69581f03d880157f15a Mon Sep 17 00:00:00 2001 +From: Michael Neuling +Date: Fri, 6 Jun 2014 14:28:51 +1000 +Subject: powerpc: Don't setup CPUs with bad status + +From: Michael Neuling + +commit 59a53afe70fd530040bdc69581f03d880157f15a upstream. + +OPAL will mark a CPU that is guarded as "bad" in the status property of the CPU +node. + +Unfortunatley Linux doesn't check this property and will put the bad CPU in the +present map. This has caused hangs on booting when we try to unsplit the core. + +This patch checks the CPU is avaliable via this status property before putting +it in the present map. + +Signed-off-by: Michael Neuling +Tested-by: Anton Blanchard +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/kernel/setup-common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/powerpc/kernel/setup-common.c ++++ b/arch/powerpc/kernel/setup-common.c +@@ -458,7 +458,7 @@ void __init smp_setup_cpu_maps(void) + for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { + DBG(" thread %d -> cpu %d (hard id %d)\n", + j, cpu, be32_to_cpu(intserv[j])); +- set_cpu_present(cpu, true); ++ set_cpu_present(cpu, of_device_is_available(dn)); + set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); + set_cpu_possible(cpu, true); + cpu++; diff --git a/queue-3.14/powerpc-don-t-skip-epapr-spin-table-cpus.patch b/queue-3.14/powerpc-don-t-skip-epapr-spin-table-cpus.patch new file mode 100644 index 00000000000..3b0af46643d --- /dev/null +++ b/queue-3.14/powerpc-don-t-skip-epapr-spin-table-cpus.patch @@ -0,0 +1,48 @@ +From 6663a4fa6711050036562ddfd2086edf735fae21 Mon Sep 17 00:00:00 2001 +From: Scott Wood +Date: Tue, 24 Jun 2014 20:15:51 -0500 +Subject: powerpc: Don't skip ePAPR spin-table CPUs + +From: Scott Wood + +commit 6663a4fa6711050036562ddfd2086edf735fae21 upstream. + +Commit 59a53afe70fd530040bdc69581f03d880157f15a "powerpc: Don't setup +CPUs with bad status" broke ePAPR SMP booting. ePAPR says that CPUs +that aren't presently running shall have status of disabled, with +enable-method being used to determine whether the CPU can be enabled. + +Fix by checking for spin-table, which is currently the only supported +enable-method. + +Signed-off-by: Scott Wood +Cc: Michael Neuling +Cc: Emil Medve +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/kernel/setup-common.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +--- a/arch/powerpc/kernel/setup-common.c ++++ b/arch/powerpc/kernel/setup-common.c +@@ -456,9 +456,17 @@ void __init smp_setup_cpu_maps(void) + } + + for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { ++ bool avail; ++ + DBG(" thread %d -> cpu %d (hard id %d)\n", + j, cpu, be32_to_cpu(intserv[j])); +- set_cpu_present(cpu, of_device_is_available(dn)); ++ ++ avail = of_device_is_available(dn); ++ if (!avail) ++ avail = !of_property_match_string(dn, ++ "enable-method", "spin-table"); ++ ++ set_cpu_present(cpu, avail); + set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); + set_cpu_possible(cpu, true); + cpu++; diff --git a/queue-3.14/powerpc-fix-typo-config_pmac.patch b/queue-3.14/powerpc-fix-typo-config_pmac.patch new file mode 100644 index 00000000000..0c379a28342 --- /dev/null +++ b/queue-3.14/powerpc-fix-typo-config_pmac.patch @@ -0,0 +1,33 @@ +From 6e0fdf9af216887e0032c19d276889aad41cad00 Mon Sep 17 00:00:00 2001 +From: Paul Bolle +Date: Tue, 20 May 2014 22:24:58 +0200 +Subject: powerpc: fix typo 'CONFIG_PMAC' + +From: Paul Bolle + +commit 6e0fdf9af216887e0032c19d276889aad41cad00 upstream. + +Commit b0d278b7d3ae ("powerpc/perf_event: Reduce latency of calling +perf_event_do_pending") added a check for CONFIG_PMAC were a check for +CONFIG_PPC_PMAC was clearly intended. + +Fixes: b0d278b7d3ae ("powerpc/perf_event: Reduce latency of calling perf_event_do_pending") +Signed-off-by: Paul Bolle +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/kernel/time.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/powerpc/kernel/time.c ++++ b/arch/powerpc/kernel/time.c +@@ -511,7 +511,7 @@ void timer_interrupt(struct pt_regs * re + may_hard_irq_enable(); + + +-#if defined(CONFIG_PPC32) && defined(CONFIG_PMAC) ++#if defined(CONFIG_PPC32) && defined(CONFIG_PPC_PMAC) + if (atomic_read(&ppc_n_lost_interrupts) != 0) + do_IRQ(regs); + #endif diff --git a/queue-3.14/powerpc-fix-typo-config_ppc_cpu.patch b/queue-3.14/powerpc-fix-typo-config_ppc_cpu.patch new file mode 100644 index 00000000000..7f1af44ba97 --- /dev/null +++ b/queue-3.14/powerpc-fix-typo-config_ppc_cpu.patch @@ -0,0 +1,32 @@ +From b69a1da94f3d1589d1942b5d1b384d8cfaac4500 Mon Sep 17 00:00:00 2001 +From: Paul Bolle +Date: Tue, 20 May 2014 21:59:42 +0200 +Subject: powerpc: fix typo 'CONFIG_PPC_CPU' + +From: Paul Bolle + +commit b69a1da94f3d1589d1942b5d1b384d8cfaac4500 upstream. + +Commit cd64d1697cf0 ("powerpc: mtmsrd not defined") added a check for +CONFIG_PPC_CPU were a check for CONFIG_PPC_FPU was clearly intended. + +Fixes: cd64d1697cf0 ("powerpc: mtmsrd not defined") +Signed-off-by: Paul Bolle +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/lib/sstep.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/powerpc/lib/sstep.c ++++ b/arch/powerpc/lib/sstep.c +@@ -1470,7 +1470,7 @@ int __kprobes emulate_step(struct pt_reg + regs->gpr[rd] = byterev_4(val); + goto ldst_done; + +-#ifdef CONFIG_PPC_CPU ++#ifdef CONFIG_PPC_FPU + case 535: /* lfsx */ + case 567: /* lfsux */ + if (!(regs->msr & MSR_FP)) diff --git a/queue-3.14/powerpc-mm-check-paca-psize-is-up-to-date-for-huge-mappings.patch b/queue-3.14/powerpc-mm-check-paca-psize-is-up-to-date-for-huge-mappings.patch new file mode 100644 index 00000000000..e9155972cc0 --- /dev/null +++ b/queue-3.14/powerpc-mm-check-paca-psize-is-up-to-date-for-huge-mappings.patch @@ -0,0 +1,129 @@ +From 09567e7fd44291bfc08accfdd67ad8f467842332 Mon Sep 17 00:00:00 2001 +From: Michael Ellerman +Date: Wed, 28 May 2014 18:21:17 +1000 +Subject: powerpc/mm: Check paca psize is up to date for huge mappings + +From: Michael Ellerman + +commit 09567e7fd44291bfc08accfdd67ad8f467842332 upstream. + +We have a bug in our hugepage handling which exhibits as an infinite +loop of hash faults. If the fault is being taken in the kernel it will +typically trigger the softlockup detector, or the RCU stall detector. + +The bug is as follows: + + 1. mmap(0xa0000000, ..., MAP_FIXED | MAP_HUGE_TLB | MAP_ANONYMOUS ..) + 2. Slice code converts the slice psize to 16M. + 3. The code on lines 539-540 of slice.c in slice_get_unmapped_area() + synchronises the mm->context with the paca->context. So the paca slice + mask is updated to include the 16M slice. + 3. Either: + * mmap() fails because there are no huge pages available. + * mmap() succeeds and the mapping is then munmapped. + In both cases the slice psize remains at 16M in both the paca & mm. + 4. mmap(0xa0000000, ..., MAP_FIXED | MAP_ANONYMOUS ..) + 5. The slice psize is converted back to 64K. Because of the check on line 539 + of slice.c we DO NOT update the paca->context. The paca slice mask is now + out of sync with the mm slice mask. + 6. User/kernel accesses 0xa0000000. + 7. The SLB miss handler slb_allocate_realmode() **uses the paca slice mask** + to create an SLB entry and inserts it in the SLB. +18. With the 16M SLB entry in place the hardware does a hash lookup, no entry + is found so a data access exception is generated. +19. The data access handler calls do_page_fault() -> handle_mm_fault(). +10. __handle_mm_fault() creates a THP mapping with do_huge_pmd_anonymous_page(). +11. The hardware retries the access, there is still nothing in the hash table + so once again a data access exception is generated. +12. hash_page() calls into __hash_page_thp() and inserts a mapping in the + hash. Although the THP mapping maps 16M the hashing is done using 64K + as the segment page size. +13. hash_page() returns immediately after calling __hash_page_thp(), skipping + over the code at line 1125. Resulting in the mismatch between the + paca->context and mm->context not being detected. +14. The hardware retries the access, the hash it generates using the 16M + SLB entry does NOT match the hash we inserted. +15. We take another data access and go into __hash_page_thp(). +16. We see a valid entry in the hpte_slot_array and so we call updatepp() + which succeeds. +17. Goto 14. + +We could fix this in two ways. The first would be to remove or modify +the check on line 539 of slice.c. + +The second option is to cause the check of paca psize in hash_page() on +line 1125 to also be done for THP pages. + +We prefer the latter, because the check & update of the paca psize is +not done until we know it's necessary. It's also done only on the +current cpu, so we don't need to IPI all other cpus. + +Without further rearranging the code, the simplest fix is to pull out +the code that checks paca psize and call it in two places. Firstly for +THP/hugetlb, and secondly for other mappings as before. + +Thanks to Dave Jones for trinity, which originally found this bug. + +Signed-off-by: Michael Ellerman +Reviewed-by: Aneesh Kumar K.V +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/mm/hash_utils_64.c | 31 ++++++++++++++++++++----------- + 1 file changed, 20 insertions(+), 11 deletions(-) + +--- a/arch/powerpc/mm/hash_utils_64.c ++++ b/arch/powerpc/mm/hash_utils_64.c +@@ -960,6 +960,22 @@ void hash_failure_debug(unsigned long ea + trap, vsid, ssize, psize, lpsize, pte); + } + ++static void check_paca_psize(unsigned long ea, struct mm_struct *mm, ++ int psize, bool user_region) ++{ ++ if (user_region) { ++ if (psize != get_paca_psize(ea)) { ++ get_paca()->context = mm->context; ++ slb_flush_and_rebolt(); ++ } ++ } else if (get_paca()->vmalloc_sllp != ++ mmu_psize_defs[mmu_vmalloc_psize].sllp) { ++ get_paca()->vmalloc_sllp = ++ mmu_psize_defs[mmu_vmalloc_psize].sllp; ++ slb_vmalloc_update(); ++ } ++} ++ + /* Result code is: + * 0 - handled + * 1 - normal page fault +@@ -1081,6 +1097,8 @@ int hash_page(unsigned long ea, unsigned + WARN_ON(1); + } + #endif ++ check_paca_psize(ea, mm, psize, user_region); ++ + goto bail; + } + +@@ -1121,17 +1139,8 @@ int hash_page(unsigned long ea, unsigned + #endif + } + } +- if (user_region) { +- if (psize != get_paca_psize(ea)) { +- get_paca()->context = mm->context; +- slb_flush_and_rebolt(); +- } +- } else if (get_paca()->vmalloc_sllp != +- mmu_psize_defs[mmu_vmalloc_psize].sllp) { +- get_paca()->vmalloc_sllp = +- mmu_psize_defs[mmu_vmalloc_psize].sllp; +- slb_vmalloc_update(); +- } ++ ++ check_paca_psize(ea, mm, psize, user_region); + #endif /* CONFIG_PPC_64K_PAGES */ + + #ifdef CONFIG_PPC_HAS_HASH_64K diff --git a/queue-3.14/powerpc-perf-ensure-all-ebb-register-state-is-cleared-on-fork.patch b/queue-3.14/powerpc-perf-ensure-all-ebb-register-state-is-cleared-on-fork.patch new file mode 100644 index 00000000000..e66fcd3ce83 --- /dev/null +++ b/queue-3.14/powerpc-perf-ensure-all-ebb-register-state-is-cleared-on-fork.patch @@ -0,0 +1,37 @@ +From 3df48c981d5a9610e02e9270b1bc4274fb536710 Mon Sep 17 00:00:00 2001 +From: Michael Ellerman +Date: Tue, 10 Jun 2014 16:46:21 +1000 +Subject: powerpc/perf: Ensure all EBB register state is cleared on fork() + +From: Michael Ellerman + +commit 3df48c981d5a9610e02e9270b1bc4274fb536710 upstream. + +In commit 330a1eb "Core EBB support for 64-bit book3s" I messed up +clear_task_ebb(). It clears some but not all of the task's Event Based +Branch (EBB) registers when we duplicate a task struct. + +That allows a child task to observe the EBBHR & EBBRR of its parent, +which it should not be able to do. + +Fix it by clearing EBBHR & EBBRR. + +Signed-off-by: Michael Ellerman +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/include/asm/switch_to.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/powerpc/include/asm/switch_to.h ++++ b/arch/powerpc/include/asm/switch_to.h +@@ -84,6 +84,8 @@ static inline void clear_task_ebb(struct + { + #ifdef CONFIG_PPC_BOOK3S_64 + /* EBB perf events are not inherited, so clear all EBB state. */ ++ t->thread.ebbrr = 0; ++ t->thread.ebbhr = 0; + t->thread.bescr = 0; + t->thread.mmcr2 = 0; + t->thread.mmcr0 = 0; diff --git a/queue-3.14/powerpc-pseries-fix-overwritten-pe-state.patch b/queue-3.14/powerpc-pseries-fix-overwritten-pe-state.patch new file mode 100644 index 00000000000..eb128948f28 --- /dev/null +++ b/queue-3.14/powerpc-pseries-fix-overwritten-pe-state.patch @@ -0,0 +1,32 @@ +From 54f112a3837d4e7532bbedbbbf27c0de277be510 Mon Sep 17 00:00:00 2001 +From: Gavin Shan +Date: Thu, 24 Apr 2014 18:00:21 +1000 +Subject: powerpc/pseries: Fix overwritten PE state + +From: Gavin Shan + +commit 54f112a3837d4e7532bbedbbbf27c0de277be510 upstream. + +In pseries_eeh_get_state(), EEH_STATE_UNAVAILABLE is always +overwritten by EEH_STATE_NOT_SUPPORT because of the missed +"break" there. The patch fixes the issue. + +Reported-by: Joe Perches +Signed-off-by: Gavin Shan +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/platforms/pseries/eeh_pseries.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/powerpc/platforms/pseries/eeh_pseries.c ++++ b/arch/powerpc/platforms/pseries/eeh_pseries.c +@@ -464,6 +464,7 @@ static int pseries_eeh_get_state(struct + } else { + result = EEH_STATE_NOT_SUPPORT; + } ++ break; + default: + result = EEH_STATE_NOT_SUPPORT; + } diff --git a/queue-3.14/powerpc-serial-use-saner-flags-when-creating-legacy-ports.patch b/queue-3.14/powerpc-serial-use-saner-flags-when-creating-legacy-ports.patch new file mode 100644 index 00000000000..61e2b5fa866 --- /dev/null +++ b/queue-3.14/powerpc-serial-use-saner-flags-when-creating-legacy-ports.patch @@ -0,0 +1,82 @@ +From c4cad90f9e9dcb85afc5e75a02ae3522ed077296 Mon Sep 17 00:00:00 2001 +From: Benjamin Herrenschmidt +Date: Tue, 3 Jun 2014 17:33:41 +1000 +Subject: powerpc/serial: Use saner flags when creating legacy ports + +From: Benjamin Herrenschmidt + +commit c4cad90f9e9dcb85afc5e75a02ae3522ed077296 upstream. + +We had a mix & match of flags used when creating legacy ports +depending on where we found them in the device-tree. Among others +we were missing UPF_SKIP_TEST for some kind of ISA ports which is +a problem as quite a few UARTs out there don't support the loopback +test (such as a lot of BMCs). + +Let's pick the set of flags used by the SoC code and generalize it +which means autoconf, no loopback test, irq maybe shared and fixed +port. + +Sending to stable as the lack of UPF_SKIP_TEST is breaking +serial on some machines so I want this back into distros + +Signed-off-by: Benjamin Herrenschmidt +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/kernel/legacy_serial.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +--- a/arch/powerpc/kernel/legacy_serial.c ++++ b/arch/powerpc/kernel/legacy_serial.c +@@ -48,6 +48,9 @@ static struct of_device_id legacy_serial + static unsigned int legacy_serial_count; + static int legacy_serial_console = -1; + ++static const upf_t legacy_port_flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | ++ UPF_SHARE_IRQ | UPF_FIXED_PORT; ++ + static unsigned int tsi_serial_in(struct uart_port *p, int offset) + { + unsigned int tmp; +@@ -153,8 +156,6 @@ static int __init add_legacy_soc_port(st + { + u64 addr; + const __be32 *addrp; +- upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ +- | UPF_FIXED_PORT; + struct device_node *tsi = of_get_parent(np); + + /* We only support ports that have a clock frequency properly +@@ -185,9 +186,11 @@ static int __init add_legacy_soc_port(st + * IO port value. It will be fixed up later along with the irq + */ + if (tsi && !strcmp(tsi->type, "tsi-bridge")) +- return add_legacy_port(np, -1, UPIO_TSI, addr, addr, NO_IRQ, flags, 0); ++ return add_legacy_port(np, -1, UPIO_TSI, addr, addr, ++ NO_IRQ, legacy_port_flags, 0); + else +- return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0); ++ return add_legacy_port(np, -1, UPIO_MEM, addr, addr, ++ NO_IRQ, legacy_port_flags, 0); + } + + static int __init add_legacy_isa_port(struct device_node *np, +@@ -233,7 +236,7 @@ static int __init add_legacy_isa_port(st + + /* Add port, irq will be dealt with later */ + return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]), +- taddr, NO_IRQ, UPF_BOOT_AUTOCONF, 0); ++ taddr, NO_IRQ, legacy_port_flags, 0); + + } + +@@ -306,7 +309,7 @@ static int __init add_legacy_pci_port(st + * IO port value. It will be fixed up later along with the irq + */ + return add_legacy_port(np, index, iotype, base, addr, NO_IRQ, +- UPF_BOOT_AUTOCONF, np != pci_dev); ++ legacy_port_flags, np != pci_dev); + } + #endif + diff --git a/queue-3.14/series b/queue-3.14/series index ea7f12ff868..86775749f8b 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -34,3 +34,13 @@ nfs-don-t-declare-inode-uptodate-unless-all-attributes-were-checked.patch nfs-use-raw_write_seqcount_begin-end-int-nfs4_reclaim_open_state.patch nfs-populate-net-in-mount-data-when-remounting.patch nfs-fix-cache_validity-check-in-nfs_write_pageuptodate.patch +powerpc-pseries-fix-overwritten-pe-state.patch +powerpc-mm-check-paca-psize-is-up-to-date-for-huge-mappings.patch +powerpc-serial-use-saner-flags-when-creating-legacy-ports.patch +powerpc-64bit-sendfile-is-capped-at-2gb.patch +powerpc-fix-typo-config_pmac.patch +powerpc-perf-ensure-all-ebb-register-state-is-cleared-on-fork.patch +powerpc-fix-typo-config_ppc_cpu.patch +powerpc-don-t-setup-cpus-with-bad-status.patch +powerpc-add-at_hwcap2-to-indicate-v.crypto-category-support.patch +powerpc-don-t-skip-epapr-spin-table-cpus.patch