From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Fri, 20 Jun 2014 20:16:27 +0000 (-0700)
Subject: 3.10-stable patches
X-Git-Tag: v3.4.95~34
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1a87d21b04d929fcc02d441f659b52106b69d09b;p=thirdparty%2Fkernel%2Fstable-queue.git

3.10-stable patches

added patches:
	arm-at91-fix-at91_sysirq_mask_rtc-for-sam9x5-socs.patch
---

diff --git a/queue-3.10/arm-at91-fix-at91_sysirq_mask_rtc-for-sam9x5-socs.patch b/queue-3.10/arm-at91-fix-at91_sysirq_mask_rtc-for-sam9x5-socs.patch
new file mode 100644
index 00000000000..a81dbced3a8
--- /dev/null
+++ b/queue-3.10/arm-at91-fix-at91_sysirq_mask_rtc-for-sam9x5-socs.patch
@@ -0,0 +1,73 @@
+From 9dcc87fec8947308e0111c65dcd881e6aa5b1673 Mon Sep 17 00:00:00 2001
+From: Boris BREZILLON <boris.brezillon@free-electrons.com>
+Date: Fri, 6 Jun 2014 14:36:11 -0700
+Subject: ARM: at91: fix at91_sysirq_mask_rtc for sam9x5 SoCs
+
+From: Boris BREZILLON <boris.brezillon@free-electrons.com>
+
+commit 9dcc87fec8947308e0111c65dcd881e6aa5b1673 upstream.
+
+sam9x5 SoCs have the following errata:
+ "RTC: Interrupt Mask Register cannot be used
+  Interrupt Mask Register read always returns 0."
+
+Hence we should not rely on what IMR claims about already masked IRQs
+and just disable all IRQs.
+
+Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
+Reported-by: Bryan Evenson <bevenson@melinkcorp.com>
+Reviewed-by: Johan Hovold <johan@hovold.com>
+Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
+Cc: Bryan Evenson <bevenson@melinkcorp.com>
+Cc: Andrew Victor <linux@maxim.org.za>
+Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
+Cc: Alessandro Zummo <a.zummo@towertech.it>
+Cc: Mark Roszko <mark.roszko@gmail.com>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-at91/sysirq_mask.c |   22 +++++++++++++---------
+ 1 file changed, 13 insertions(+), 9 deletions(-)
+
+--- a/arch/arm/mach-at91/sysirq_mask.c
++++ b/arch/arm/mach-at91/sysirq_mask.c
+@@ -25,24 +25,28 @@
+ 
+ #include "generic.h"
+ 
+-#define AT91_RTC_IDR	0x24	/* Interrupt Disable Register */
+-#define AT91_RTC_IMR	0x28	/* Interrupt Mask Register */
++#define AT91_RTC_IDR		0x24	/* Interrupt Disable Register */
++#define AT91_RTC_IMR		0x28	/* Interrupt Mask Register */
++#define AT91_RTC_IRQ_MASK	0x1f	/* Available IRQs mask */
+ 
+ void __init at91_sysirq_mask_rtc(u32 rtc_base)
+ {
+ 	void __iomem *base;
+-	u32 mask;
+ 
+ 	base = ioremap(rtc_base, 64);
+ 	if (!base)
+ 		return;
+ 
+-	mask = readl_relaxed(base + AT91_RTC_IMR);
+-	if (mask) {
+-		pr_info("AT91: Disabling rtc irq\n");
+-		writel_relaxed(mask, base + AT91_RTC_IDR);
+-		(void)readl_relaxed(base + AT91_RTC_IMR);	/* flush */
+-	}
++	/*
++	 * sam9x5 SoCs have the following errata:
++	 * "RTC: Interrupt Mask Register cannot be used
++	 *  Interrupt Mask Register read always returns 0."
++	 *
++	 * Hence we're not relying on IMR values to disable
++	 * interrupts.
++	 */
++	writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
++	(void)readl_relaxed(base + AT91_RTC_IMR);	/* flush */
+ 
+ 	iounmap(base);
+ }
diff --git a/queue-3.10/series b/queue-3.10/series
index b9ba6691086..eb03b518960 100644
--- a/queue-3.10/series
+++ b/queue-3.10/series
@@ -24,3 +24,4 @@ rtnetlink-fix-userspace-api-breakage-for-iproute2-v3.9.0.patch
 vxlan-use-dev-needed_headroom-instead-of-dev-hard_header_len.patch
 net-mlx4_core-pass-pci_device_id.driver_data-to-__mlx4_init_one-during-reset.patch
 net-mlx4_core-preserve-pci_dev_data-after-__mlx4_remove_one.patch
+arm-at91-fix-at91_sysirq_mask_rtc-for-sam9x5-socs.patch