From: Michal Simek Date: Thu, 15 Dec 2016 12:22:01 +0000 (+0100) Subject: Merge tag 'v2016.09' into master X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1ba16791e3d25b35d417f37a12deec4fbadb907a;p=thirdparty%2Fu-boot.git Merge tag 'v2016.09' into master Prepare v2016.09 - Fix fpga part in spl_mmc (use mmc_get_blk_desc(mmc) instead of &mmc->block_dev - Fix dependencies in defconfig Signed-off-by: Michal Simek --- 1ba16791e3d25b35d417f37a12deec4fbadb907a diff --cc Kconfig index 2ae065ca813,fdea71efaac..2beae027d51 --- a/Kconfig +++ b/Kconfig @@@ -313,33 -332,34 +332,61 @@@ config SPL_LOAD_FI particular it can handle selecting from multiple device tree and passing the correct one to U-Boot. + config SPL_FIT_IMAGE_POST_PROCESS + bool "Enable post-processing of FIT artifacts after loading by the SPL" + depends on SPL_LOAD_FIT && TI_SECURE_DEVICE + help + Allows doing any sort of manipulation to blobs after they got extracted + from the U-Boot FIT image like stripping off headers or modifying the + size of the blob, verification, authentication, decryption etc. in a + platform or board specific way. In order to use this feature a platform + or board-specific implementation of board_fit_image_post_process() must + be provided. Also, anything done during this post-processing step would + need to be comprehended in how the images were prepared before being + injected into the FIT creation (i.e. the blobs would have been pre- + processed before being added to the FIT image). + + config FIT_IMAGE_POST_PROCESS + bool "Enable post-processing of FIT artifacts after loading by U-Boot" + depends on FIT && TI_SECURE_DEVICE + help + Allows doing any sort of manipulation to blobs after they got extracted + from FIT images like stripping off headers or modifying the size of the + blob, verification, authentication, decryption etc. in a platform or + board specific way. In order to use this feature a platform or board- + specific implementation of board_fit_image_post_process() must be + provided. Also, anything done during this post-processing step would + need to be comprehended in how the images were prepared before being + injected into the FIT creation (i.e. the blobs would have been pre- + processed before being added to the FIT image). + +config SPL_DFU_SUPPORT + bool "Enable SPL with DFU to load binaries to memory device" + depends on USB + help + Currently the SPL does not have capability to load the + binaries or boot images to boot devices like ram,eMMC,SPI,etc. + This feature enables the DFU (Device Firmware Upgarde) in SPL with + RAM memory device support. The ROM code will load and execute + the SPL built with dfu. The user can load binaries (u-boot/kernel) to + selected device partition from host-pc using dfu-utils. + This feature will be useful to flash the binaries to factory + or bare-metal boards using USB interface. + +choice + bool "DFU device selection" + depends on SPL_DFU_SUPPORT + +config SPL_DFU_RAM + bool "RAM device" + depends on SPL_DFU_SUPPORT + help + select RAM/DDR memory device for loading binary images + (u-boot/kernel) to the selected device partition using + DFU and execute the u-boot/kernel from RAM. + +endchoice + config SYS_CLK_FREQ depends on ARC || ARCH_SUNXI int "CPU clock frequency" diff --cc Makefile index 88128ec72a2,1cf15cefd12..1cf15cefd12 mode 100755,100644..100755 --- a/Makefile +++ b/Makefile diff --cc arch/arm/cpu/armv8/zynqmp/Kconfig index a8525ad5d0c,ed3305d7182..91886be6299 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@@ -39,61 -20,8 +39,64 @@@ config ZYNQMP_QSP config ZYNQMP_USB bool "Configure ZynqMP USB" + config SYS_MALLOC_F_LEN + default 0x600 + +config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED + bool "Overwrite SPL bootmode" + depends on SPL + help + Overwrite bootmode selected via boot mode pins to tell SPL what should + be the next boot device. + +config SPL_ZYNQMP_ALT_BOOTMODE + hex + default 0x0 if JTAG_MODE + default 0x1 if QSPI_MODE_24BIT + default 0x2 if QSPI_MODE_32BIT + default 0x3 if SD_MODE + default 0x4 if NAND_MODE + default 0x5 if SD_MODE1 + default 0x6 if EMMC_MODE + default 0x7 if USB_MODE + default 0xa if SW_USBHOST_MODE + default 0xb if SW_SATA_MODE + +choice + prompt "Boot mode" + depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED + default JTAG + +config JTAG_MODE + bool "JTAG_MODE" + +config QSPI_MODE_24BIT + bool "QSPI_MODE_24BIT" + +config QSPI_MODE_32BIT + bool "QSPI_MODE_32BIT" + +config SD_MODE + bool "SD_MODE" + +config SD_MODE1 + bool "SD_MODE1" + +config NAND_MODE + bool "NAND_MODE" + +config EMMC_MODE + bool "EMMC_MODE" + +config USB_MODE + bool "USB" + +config SW_USBHOST_MODE + bool "SW USBHOST_MODE" + +config SW_SATA_MODE + bool "SW SATA_MODE" + +endchoice endif diff --cc common/spl/spl_mmc.c index c3af31d17d5,7c7f32959b2..a5c60b13c1b --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@@ -221,35 -218,6 +221,35 @@@ static int mmc_load_image_raw_os(struc } #endif +#ifdef CONFIG_SPL_FPGA_SUPPORT +static int mmc_load_fpga_image_fat(struct mmc *mmc) +{ + int err; + int devnum = 0; + const fpga_desc *const desc = fpga_get_desc(devnum); + xilinx_desc *desc_xilinx = desc->devdesc; + - err = spl_load_image_fat(&mmc->block_dev, ++ err = spl_load_image_fat(mmc_get_blk_desc(mmc), + CONFIG_SYS_MMCSD_FS_BOOT_PARTITION, + CONFIG_SPL_FPGA_LOAD_ARGS_NAME); + + if (err) { +#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT + printf("spl: error reading image %s, err - %d\n", + CONFIG_SPL_FPGA_LOAD_ARGS_NAME, err); +#endif + return -1; + } +#ifdef CONFIG_SPL_FPGA_BIT + return fpga_loadbitstream(devnum, (char *)spl_image.load_addr, + desc_xilinx->size, BIT_FULL); +#else + return fpga_load(devnum, (const void *)spl_image.load_addr, + desc_xilinx->size, BIT_FULL); +#endif +} +#endif + #ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION int spl_mmc_do_fs_boot(struct mmc *mmc) { diff --cc configs/xilinx_zynqmp_ep_defconfig index b0f7ae44743,5f285d8150d..5843171cdb6 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@@ -2,12 -2,6 +2,7 @@@ CONFIG_ARM= CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_I2C=y - CONFIG_DM_GPIO=y +CONFIG_ZYNQMP_QSPI=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" @@@ -49,16 -43,18 +45,22 @@@ CONFIG_CMD_FS_GENERIC= CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_BLK=y + CONFIG_DM_GPIO=y + CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y + CONFIG_DM_MMC_OPS=y CONFIG_ZYNQ_SDHCI=y CONFIG_NAND_ARASAN=y ++CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y diff --cc configs/xilinx_zynqmp_mini_emmc_defconfig index 64b64c6b14d,00000000000..e78e99afaf2 mode 100644,000000..100644 --- a/configs/xilinx_zynqmp_mini_emmc_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc_defconfig @@@ -1,41 -1,0 +1,43 @@@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc" +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="MINI_EMMC" +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_MMC=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_OF_EMBED=y +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set - CONFIG_CMD_MMC=y ++CONFIG_BLK=y +CONFIG_DM_MMC=y ++CONFIG_DM_MMC_OPS=y +CONFIG_ZYNQ_SDHCI=y +# CONFIG_EFI_LOADER is not set diff --cc configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 7753c4f67cf,059db84e314..586de8843bd --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@@ -2,12 -2,6 +2,7 @@@ CONFIG_ARM= CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_I2C=y - CONFIG_DM_GPIO=y +CONFIG_ZYNQMP_QSPI=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" @@@ -41,10 -34,15 +37,16 @@@ CONFIG_CMD_FS_GENERIC= CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_BLK=y + CONFIG_DM_GPIO=y + CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y + CONFIG_DM_MMC_OPS=y CONFIG_ZYNQ_SDHCI=y ++CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --cc configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig index 578353feb74,00000000000..c8a86bf4f16 mode 100644,000000..100644 --- a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig @@@ -1,67 -1,0 +1,69 @@@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm017_dc3" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_I2C=y - CONFIG_DM_GPIO=y +CONFIG_ZYNQMP_USB=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3" +CONFIG_SPL=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm017 dc3" +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_BLK=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_DM_MMC=y ++CONFIG_DM_MMC_OPS=y +CONFIG_ZYNQ_SDHCI=y +CONFIG_NAND_ARASAN=y +CONFIG_DM_ETH=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03FD +CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --cc configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index 89b521c9130,3ac22cb087d..40c149c07c1 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@@ -1,10 -1,7 +1,6 @@@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_I2C=y - CONFIG_DM_GPIO=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4" CONFIG_SPL=y diff --cc configs/xilinx_zynqmp_zcu100_defconfig index 799c483583c,00000000000..76593207a08 mode 100644,000000..100644 --- a/configs/xilinx_zynqmp_zcu100_defconfig +++ b/configs/xilinx_zynqmp_zcu100_defconfig @@@ -1,71 -1,0 +1,73 @@@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu100" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_GPIO=y +CONFIG_ZYNQMP_QSPI=y +CONFIG_ZYNQMP_USB=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100" +CONFIG_SPL=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU100 RevB" +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_BLK=y ++CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y ++CONFIG_DM_MMC_OPS=y +CONFIG_ZYNQ_SDHCI=y ++CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03FD +CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --cc configs/xilinx_zynqmp_zcu100_revA_defconfig index aa1415dcec0,00000000000..66a16eed41e mode 100644,000000..100644 --- a/configs/xilinx_zynqmp_zcu100_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu100_revA_defconfig @@@ -1,72 -1,0 +1,74 @@@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu100" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_GPIO=y +CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/zynqmp-zcu100-revA/regs.txt" +CONFIG_ZYNQMP_QSPI=y +CONFIG_ZYNQMP_USB=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revA" +CONFIG_SPL=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU100 RevA" +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_BLK=y ++CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y ++CONFIG_DM_MMC_OPS=y +CONFIG_ZYNQ_SDHCI=y ++CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03FD +CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --cc configs/xilinx_zynqmp_zcu102_defconfig index 4616406bdca,07e29fbe4c6..c7357c2c927 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@@ -2,12 -2,6 +2,8 @@@ CONFIG_ARM= CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_GPIO=y +CONFIG_PMUFW_INIT_FILE="board/xilinx/zynqmp/pmufw.bin" +CONFIG_ZYNQMP_QSPI=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102" @@@ -41,9 -34,13 +38,14 @@@ CONFIG_CMD_FS_GENERIC= CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_BLK=y + CONFIG_DM_GPIO=y CONFIG_DM_MMC=y + CONFIG_DM_MMC_OPS=y CONFIG_ZYNQ_SDHCI=y ++CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --cc configs/xilinx_zynqmp_zcu102_revB_defconfig index 07b2ed3fd27,72679db144b..ebc0caf9c28 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@@ -2,11 -2,6 +2,7 @@@ CONFIG_ARM= CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_GPIO=y +CONFIG_ZYNQMP_QSPI=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB" @@@ -40,9 -34,13 +37,14 @@@ CONFIG_CMD_FS_GENERIC= CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y + CONFIG_BLK=y + CONFIG_DM_GPIO=y CONFIG_DM_MMC=y + CONFIG_DM_MMC_OPS=y CONFIG_ZYNQ_SDHCI=y ++CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --cc configs/xilinx_zynqmp_zcu106_defconfig index 7f809782cc3,00000000000..aa204d79770 mode 100644,000000..100644 --- a/configs/xilinx_zynqmp_zcu106_defconfig +++ b/configs/xilinx_zynqmp_zcu106_defconfig @@@ -1,71 -1,0 +1,73 @@@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu106" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 - CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_DM=y - CONFIG_DM_SPI_FLASH=y - CONFIG_DM_GPIO=y +CONFIG_ZYNQMP_QSPI=y +CONFIG_ZYNQMP_USB=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu106" +CONFIG_SPL=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU106" +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_BLK=y ++CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y ++CONFIG_DM_MMC_OPS=y +CONFIG_ZYNQ_SDHCI=y ++CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_ETH=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03FD +CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --cc configs/zynq_zc702_RSA_defconfig index 7d23a5bb859,00000000000..e4e00fd3ac8 mode 100644,000000..100644 --- a/configs/zynq_zc702_RSA_defconfig +++ b/configs/zynq_zc702_RSA_defconfig @@@ -1,60 -1,0 +1,61 @@@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="zynq_zc70x" +CONFIG_ARCH_ZYNQ=y ++CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702" +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_NO_FLASH=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Zynq> " +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_ZYNQ_AES=y +CONFIG_CMD_ZYNQ_RSA=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_ZYNQ_SDHCI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03fd +CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --cc drivers/clk/Kconfig index 97b7c8b872a,8f3b96a9736..98fb16a2337 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@@ -20,14 -20,9 +20,16 @@@ config SPL_CL setting up clocks within SPL, and allows the same drivers to be used as U-Boot proper. +config CLK_ZYNQMP + bool "Enable clock driver support for ZynqMP" + depends on ARCH_ZYNQMP + help + This clock driver adds support for clock realted settings for + ZynqMP platform. + + source "drivers/clk/tegra/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/exynos/Kconfig" + source "drivers/clk/at91/Kconfig" endmenu diff --cc drivers/clk/Makefile index 182e9de56c1,778d7486f06..86f773cc653 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@@ -11,6 -10,8 +10,9 @@@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip obj-$(CONFIG_SANDBOX) += clk_sandbox.o obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o obj-$(CONFIG_MACH_PIC32) += clk_pic32.o +obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o + + obj-y += tegra/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_EXYNOS) += exynos/ + obj-$(CONFIG_CLK_AT91) += at91/ diff --cc drivers/mtd/nand/Makefile index ebf19b41843,1df9273cdd1..d8bdc9cbaa1 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@@ -66,7 -66,7 +66,8 @@@ obj-$(CONFIG_TEGRA_NAND) += tegra_nand. obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o obj-$(CONFIG_NAND_PLAT) += nand_plat.o +obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o + obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o else # minimal SPL drivers diff --cc include/configs/xilinx_zynqmp.h index a315e9a3cbc,02f0e4c9a9a..cffa69593da --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@@ -330,15 -200,8 +327,14 @@@ #define CONFIG_SCSI #endif +#define CONFIG_ARM_SMC + +#define CONFIG_FPGA_ZYNQMPPL +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA + #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) - #define CONFIG_CMD_BOOTI #define CONFIG_CMD_UNZIP #define CONFIG_BOARD_EARLY_INIT_R diff --cc include/configs/xilinx_zynqmp_ep.h index 6f220a2d71a,44434aab7bf..3eb977fec31 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@@ -14,9 -14,10 +14,10 @@@ #define __CONFIG_ZYNQMP_EP_H #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 -#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9) +#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9) #define CONFIG_ZYNQ_EEPROM #define CONFIG_AHCI + #define CONFIG_SATA_CEVA #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ ZYNQMP_USB1_XHCI_BASEADDR}