From: Stephen Boyd Date: Sat, 13 Sep 2025 21:33:10 +0000 (-0700) Subject: Merge tag 'renesas-clk-for-v6.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel... X-Git-Tag: v6.18-rc1~50^2~7^3 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1ef1b8b9666d9615b1a09bf6faea913a0bbc2c69;p=thirdparty%2Fkernel%2Flinux.git Merge tag 'renesas-clk-for-v6.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas Pull Renesas clk driver updates from Geert Uytterhoeven: - Add Ethernet clocks on Renesas RZ/T2H and RZ/N2H - Add USB3.0 clocks and resets on Renesas RZ/G3E - Add I3C clocks and resets on Renesas RZ/V2H and RZ/V2N - Add USB and remaining serial (SCI) clocks and resets on Renesas RZ/T2H and RZ/N2H - Add I3C and PCIe clocks and resets on Renesas RZ/G3S - Add DMAC and PWM (GPT) clocks and resets on Renesas RZ/G3E - Add Module Stop (MSTOP) support on RZ/G2L and Renesas RZ/G2UL - Convert from clk_ops::round_rate() to clk_ops::determine_rate() * tag 'renesas-clk-for-v6.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (27 commits) clk: renesas: r9a09g05[67]: Reduce differences clk: renesas: r9a09g047: Add USB3.0 clocks/resets clk: renesas: cpg-mssr: Fix memory leak in cpg_mssr_reserved_init() clk: renesas: r9a09g056: Add clock and reset entries for I3C clk: renesas: r9a09g057: Add clock and reset entries for I3C dt-bindings: clock: renesas,r9a09g047-cpg: Add USB3.0 core clocks clk: renesas: r9a09g077: Add Ethernet Subsystem core and module clocks clk: renesas: rzv2h: Simplify polling condition in __rzv2h_cpg_assert() clk: renesas: rzv2h: Re-assert reset on deassert timeout clk: renesas: rzg2l: Re-assert reset on deassert timeout clk: renesas: rzg2l: Simplify rzg2l_cpg_assert() and rzg2l_cpg_deassert() dt-bindings: clock: renesas,r9a09g077/87: Add Ethernet clock IDs clk: renesas: r9a09g047: Add GPT clocks and resets clk: renesas: r9a09g077: Add module clocks for SCI1-SCI5 clk: renesas: rzv2h: remove round_rate() in favor of determine_rate() clk: renesas: rzg2l: convert from round_rate() to determine_rate() clk: renesas: r9a07g04[34]: Use tabs instead of spaces clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL clk: renesas: r9a07g044: Add MSTOP for RZ/G2L clk: renesas: r9a08g045: Add MSTOP for GPIO ... --- 1ef1b8b9666d9615b1a09bf6faea913a0bbc2c69