From: Greg Kroah-Hartman Date: Mon, 2 Dec 2019 16:26:35 +0000 (+0100) Subject: 4.19-stable patches X-Git-Tag: v5.4.2~50 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1f17ad488404e3a2162fa93a7e118bc5bb2f8933;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: clk-at91-fix-update-bit-maps-on-cfg_mor-write.patch clk-at91-generated-set-audio_pll_allowed-in-at91_clk_register_generated.patch usb-dwc2-use-a-longer-core-rest-timeout-in-dwc2_core_reset.patch --- diff --git a/queue-4.19/clk-at91-fix-update-bit-maps-on-cfg_mor-write.patch b/queue-4.19/clk-at91-fix-update-bit-maps-on-cfg_mor-write.patch new file mode 100644 index 00000000000..5e3509b1742 --- /dev/null +++ b/queue-4.19/clk-at91-fix-update-bit-maps-on-cfg_mor-write.patch @@ -0,0 +1,38 @@ +From 263eaf8f172d9f44e15d6aca85fe40ec18d2c477 Mon Sep 17 00:00:00 2001 +From: Eugen Hristev +Date: Mon, 9 Sep 2019 15:30:31 +0000 +Subject: clk: at91: fix update bit maps on CFG_MOR write + +From: Eugen Hristev + +commit 263eaf8f172d9f44e15d6aca85fe40ec18d2c477 upstream. + +The regmap update bits call was not selecting the proper mask, considering +the bits which was updating. +Update the mask from call to also include OSCBYPASS. +Removed MOSCEN which was not updated. + +Fixes: 1bdf02326b71 ("clk: at91: make use of syscon/regmap internally") +Signed-off-by: Eugen Hristev +Link: https://lkml.kernel.org/r/1568042692-11784-1-git-send-email-eugen.hristev@microchip.com +Acked-by: Alexandre Belloni +Reviewed-by: Claudiu Beznea +Signed-off-by: Stephen Boyd +Signed-off-by: Lee Jones +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/at91/clk-main.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/at91/clk-main.c ++++ b/drivers/clk/at91/clk-main.c +@@ -162,7 +162,7 @@ at91_clk_register_main_osc(struct regmap + if (bypass) + regmap_update_bits(regmap, + AT91_CKGR_MOR, MOR_KEY_MASK | +- AT91_PMC_MOSCEN, ++ AT91_PMC_OSCBYPASS, + AT91_PMC_OSCBYPASS | AT91_PMC_KEY); + + hw = &osc->hw; diff --git a/queue-4.19/clk-at91-generated-set-audio_pll_allowed-in-at91_clk_register_generated.patch b/queue-4.19/clk-at91-generated-set-audio_pll_allowed-in-at91_clk_register_generated.patch new file mode 100644 index 00000000000..c6353ac8e94 --- /dev/null +++ b/queue-4.19/clk-at91-generated-set-audio_pll_allowed-in-at91_clk_register_generated.patch @@ -0,0 +1,91 @@ +From c1e4580a1d0ff510d56268c1fc7fcfeec366fe70 Mon Sep 17 00:00:00 2001 +From: Alexandre Belloni +Date: Tue, 16 Oct 2018 16:21:43 +0200 +Subject: clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated() + +From: Alexandre Belloni + +commit c1e4580a1d0ff510d56268c1fc7fcfeec366fe70 upstream. + +Set gck->audio_pll_allowed in at91_clk_register_generated. This makes it +easier to do it from code that is not parsing device tree. + +Also, this fixes an issue where the resulting clk_hw can be dereferenced +before being tested for error. + +Fixes: 1a1a36d72e3d ("clk: at91: clk-generated: make gclk determine audio_pll rate") +Signed-off-by: Alexandre Belloni +Signed-off-by: Stephen Boyd +Signed-off-by: Lee Jones +Signed-off-by: Greg Kroah-Hartman +--- + drivers/clk/at91/clk-generated.c | 28 ++++++++++------------------ + 1 file changed, 10 insertions(+), 18 deletions(-) + +--- a/drivers/clk/at91/clk-generated.c ++++ b/drivers/clk/at91/clk-generated.c +@@ -284,7 +284,7 @@ static void clk_generated_startup(struct + static struct clk_hw * __init + at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, + const char *name, const char **parent_names, +- u8 num_parents, u8 id, ++ u8 num_parents, u8 id, bool pll_audio, + const struct clk_range *range) + { + struct clk_generated *gck; +@@ -308,6 +308,7 @@ at91_clk_register_generated(struct regma + gck->regmap = regmap; + gck->lock = lock; + gck->range = *range; ++ gck->audio_pll_allowed = pll_audio; + + clk_generated_startup(gck); + hw = &gck->hw; +@@ -333,7 +334,6 @@ static void __init of_sama5d2_clk_genera + struct device_node *gcknp; + struct clk_range range = CLK_RANGE(0, 0); + struct regmap *regmap; +- struct clk_generated *gck; + + num_parents = of_clk_get_parent_count(np); + if (num_parents == 0 || num_parents > GENERATED_SOURCE_MAX) +@@ -350,6 +350,8 @@ static void __init of_sama5d2_clk_genera + return; + + for_each_child_of_node(np, gcknp) { ++ bool pll_audio = false; ++ + if (of_property_read_u32(gcknp, "reg", &id)) + continue; + +@@ -362,24 +364,14 @@ static void __init of_sama5d2_clk_genera + of_at91_get_clk_range(gcknp, "atmel,clk-output-range", + &range); + ++ if (of_device_is_compatible(np, "atmel,sama5d2-clk-generated") && ++ (id == GCK_ID_I2S0 || id == GCK_ID_I2S1 || ++ id == GCK_ID_CLASSD)) ++ pll_audio = true; ++ + hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, name, + parent_names, num_parents, +- id, &range); +- +- gck = to_clk_generated(hw); +- +- if (of_device_is_compatible(np, +- "atmel,sama5d2-clk-generated")) { +- if (gck->id == GCK_ID_SSC0 || gck->id == GCK_ID_SSC1 || +- gck->id == GCK_ID_I2S0 || gck->id == GCK_ID_I2S1 || +- gck->id == GCK_ID_CLASSD) +- gck->audio_pll_allowed = true; +- else +- gck->audio_pll_allowed = false; +- } else { +- gck->audio_pll_allowed = false; +- } +- ++ id, pll_audio, &range); + if (IS_ERR(hw)) + continue; + diff --git a/queue-4.19/series b/queue-4.19/series index 2adf5be325f..e36ad5a6e0b 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -264,3 +264,6 @@ mtd-remove-a-debug-trace-in-mtdpart.c.patch mm-gup-add-missing-refcount-overflow-checks-on-s390.patch kvm-nvmx-rename-enter_vmx_non_root_mode-to-nested_vmx_enter_non_root_mode.patch kvm-nvmx-assimilate-nested_vmx_entry_failure-into-nested_vmx_enter_non_root_mode.patch +clk-at91-fix-update-bit-maps-on-cfg_mor-write.patch +clk-at91-generated-set-audio_pll_allowed-in-at91_clk_register_generated.patch +usb-dwc2-use-a-longer-core-rest-timeout-in-dwc2_core_reset.patch diff --git a/queue-4.19/usb-dwc2-use-a-longer-core-rest-timeout-in-dwc2_core_reset.patch b/queue-4.19/usb-dwc2-use-a-longer-core-rest-timeout-in-dwc2_core_reset.patch new file mode 100644 index 00000000000..354501aee81 --- /dev/null +++ b/queue-4.19/usb-dwc2-use-a-longer-core-rest-timeout-in-dwc2_core_reset.patch @@ -0,0 +1,40 @@ +From 6689f0f4bb14e50917ba42eb9b41c25e0184970c Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Sun, 7 Jul 2019 16:22:01 +0200 +Subject: usb: dwc2: use a longer core rest timeout in dwc2_core_reset() + +From: Mathias Kresin + +commit 6689f0f4bb14e50917ba42eb9b41c25e0184970c upstream. + +Testing on different generations of Lantiq MIPS SoC based boards, showed +that it takes up to 1500 us until the core reset bit is cleared. + +The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the +same timeout to fix wrong hang detections and make the driver work for +Lantiq MIPS SoCs. + +At least till kernel 4.14 the hanging reset only caused a warning but +the driver was probed successful. With kernel 4.19 errors out with +EBUSY. + +Cc: linux-stable # 4.19+ +Signed-off-by: Mathias Kresin +Signed-off-by: Felipe Balbi +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/usb/dwc2/core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/usb/dwc2/core.c ++++ b/drivers/usb/dwc2/core.c +@@ -524,7 +524,7 @@ int dwc2_core_reset(struct dwc2_hsotg *h + greset |= GRSTCTL_CSFTRST; + dwc2_writel(hsotg, greset, GRSTCTL); + +- if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 50)) { ++ if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 10000)) { + dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL GRSTCTL_CSFTRST\n", + __func__); + return -EBUSY;