From: Sasha Levin Date: Wed, 21 Jul 2021 10:46:15 +0000 (-0400) Subject: Fixes for 5.13 X-Git-Tag: v5.4.135~42 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1fddcc8e3e7101f9a4d6a33b164602b9d25e3c0d;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.13 Signed-off-by: Sasha Levin --- diff --git a/queue-5.13/arch-arm64-boot-dts-marvell-fix-nand-partitioning-sc.patch b/queue-5.13/arch-arm64-boot-dts-marvell-fix-nand-partitioning-sc.patch new file mode 100644 index 00000000000..2560c2b24a6 --- /dev/null +++ b/queue-5.13/arch-arm64-boot-dts-marvell-fix-nand-partitioning-sc.patch @@ -0,0 +1,34 @@ +From b3607659c3511e8a4381722c235ea3662a5e6230 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 9 Feb 2021 15:46:07 +0200 +Subject: arch/arm64/boot/dts/marvell: fix NAND partitioning scheme + +From: Konstantin Porotchkin + +[ Upstream commit e3850467bf8c82de4a052619136839fe8054b774 ] + +Eliminate 1MB gap between Linux and filesystem partitions. + +Signed-off-by: Konstantin Porotchkin +Signed-off-by: Gregory CLEMENT +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/marvell/cn9130-db.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dts b/arch/arm64/boot/dts/marvell/cn9130-db.dts +index 2c2af001619b..9758609541c7 100644 +--- a/arch/arm64/boot/dts/marvell/cn9130-db.dts ++++ b/arch/arm64/boot/dts/marvell/cn9130-db.dts +@@ -260,7 +260,7 @@ + }; + partition@200000 { + label = "Linux"; +- reg = <0x200000 0xd00000>; ++ reg = <0x200000 0xe00000>; + }; + partition@1000000 { + label = "Filesystem"; +-- +2.30.2 + diff --git a/queue-5.13/arm-brcmstb-dts-fix-nand-nodes-names.patch b/queue-5.13/arm-brcmstb-dts-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..b6f5ce32df7 --- /dev/null +++ b/queue-5.13/arm-brcmstb-dts-fix-nand-nodes-names.patch @@ -0,0 +1,55 @@ +From 6f1234d69a119826b6a5f30799a2d27717eff97f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:49 +0200 +Subject: ARM: brcmstb: dts: fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit 9a800ce1aada6e0f56b78e4713f4858c8990c1f7 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 4 ++-- + arch/arm/boot/dts/bcm7445.dtsi | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts +index 8313b7cad542..f92d2cf85972 100644 +--- a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts ++++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts +@@ -14,10 +14,10 @@ + }; + }; + +-&nand { ++&nand_controller { + status = "okay"; + +- nandcs@1 { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; +diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi +index 58f67c9b830b..5ac2042515b8 100644 +--- a/arch/arm/boot/dts/bcm7445.dtsi ++++ b/arch/arm/boot/dts/bcm7445.dtsi +@@ -148,7 +148,7 @@ + reg-names = "aon-ctrl", "aon-sram"; + }; + +- nand: nand@3e2800 { ++ nand_controller: nand-controller@3e2800 { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +-- +2.30.2 + diff --git a/queue-5.13/arm-cygnus-dts-fix-nand-nodes-names.patch b/queue-5.13/arm-cygnus-dts-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..8fdb8af40a4 --- /dev/null +++ b/queue-5.13/arm-cygnus-dts-fix-nand-nodes-names.patch @@ -0,0 +1,85 @@ +From f73763474739dbf1ad27c488a5c6ceb59b348f34 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:50 +0200 +Subject: ARM: Cygnus: dts: fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit e256b48a3b07ee1ae4bfa60abbf509ba8e386862 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +- + arch/arm/boot/dts/bcm911360_entphn.dts | 4 ++-- + arch/arm/boot/dts/bcm958300k.dts | 4 ++-- + arch/arm/boot/dts/bcm958305k.dts | 4 ++-- + 4 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi +index 0025c88f660c..8ecb7861ce10 100644 +--- a/arch/arm/boot/dts/bcm-cygnus.dtsi ++++ b/arch/arm/boot/dts/bcm-cygnus.dtsi +@@ -460,7 +460,7 @@ + status = "disabled"; + }; + +- nand: nand@18046000 { ++ nand_controller: nand-controller@18046000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x18046000 0x600>, <0xf8105408 0x600>, + <0x18046f00 0x20>; +diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts +index b2d323f4a5ab..a76c74b44bba 100644 +--- a/arch/arm/boot/dts/bcm911360_entphn.dts ++++ b/arch/arm/boot/dts/bcm911360_entphn.dts +@@ -82,8 +82,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@1 { ++&nand_controller { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts +index b4a1392bd5a6..dda3e11b711f 100644 +--- a/arch/arm/boot/dts/bcm958300k.dts ++++ b/arch/arm/boot/dts/bcm958300k.dts +@@ -60,8 +60,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@1 { ++&nand_controller { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts +index 3378683321d3..ea3c6b88b313 100644 +--- a/arch/arm/boot/dts/bcm958305k.dts ++++ b/arch/arm/boot/dts/bcm958305k.dts +@@ -68,8 +68,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@1 { ++&nand_controller { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch b/queue-5.13/arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch new file mode 100644 index 00000000000..ec7ec29ffb6 --- /dev/null +++ b/queue-5.13/arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch @@ -0,0 +1,133 @@ +From af1b2260b0408d9feadb0217c4bd5674cae62218 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:54 +0300 +Subject: ARM: dts: am335x: align GPIO hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit fb97f63106f3174992a22fe5e42dda96a0810750 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am335x-boneblack-wireless.dts | 2 +- + arch/arm/boot/dts/am335x-boneblue.dts | 2 +- + arch/arm/boot/dts/am335x-bonegreen-wireless.dts | 4 ++-- + arch/arm/boot/dts/am335x-icev2.dts | 4 ++-- + arch/arm/boot/dts/am335x-shc.dts | 8 ++++---- + 5 files changed, 10 insertions(+), 10 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts +index 86cad9912906..80116646a3fe 100644 +--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts ++++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts +@@ -101,7 +101,7 @@ + }; + + &gpio3 { +- ls_buf_en { ++ ls-buf-en-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; +diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts +index 69acaf4ea0f3..0afcc2ee0b63 100644 +--- a/arch/arm/boot/dts/am335x-boneblue.dts ++++ b/arch/arm/boot/dts/am335x-boneblue.dts +@@ -436,7 +436,7 @@ + }; + + &gpio3 { +- ls_buf_en { ++ ls-buf-en-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; +diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts +index 7615327d906a..74db0fc39397 100644 +--- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts ++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts +@@ -101,7 +101,7 @@ + }; + + &gpio1 { +- ls_buf_en { ++ ls-buf-en-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + output-high; +@@ -118,7 +118,7 @@ + /* an external pulldown on U21 pin 4. */ + + &gpio3 { +- bt_aud_in { ++ bt-aud-in-hog { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-low; +diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts +index e923d065304d..5e598ac96dcc 100644 +--- a/arch/arm/boot/dts/am335x-icev2.dts ++++ b/arch/arm/boot/dts/am335x-icev2.dts +@@ -458,14 +458,14 @@ + }; + + &gpio3 { +- p4 { ++ pr1-mii-ctl-hog { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PR1_MII_CTRL"; + }; + +- p10 { ++ mux-mii-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */ +diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts +index 1eaa26533466..2bfe60d32783 100644 +--- a/arch/arm/boot/dts/am335x-shc.dts ++++ b/arch/arm/boot/dts/am335x-shc.dts +@@ -140,14 +140,14 @@ + }; + + &gpio1 { +- hmtc_rst { ++ hmtc-rst-hog { + gpio-hog; + gpios = <24 GPIO_ACTIVE_LOW>; + output-high; + line-name = "homematic_reset"; + }; + +- hmtc_prog { ++ hmtc-prog-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_LOW>; + output-high; +@@ -156,14 +156,14 @@ + }; + + &gpio3 { +- zgb_rst { ++ zgb-rst-hog { + gpio-hog; + gpios = <18 GPIO_ACTIVE_LOW>; + output-low; + line-name = "zigbee_reset"; + }; + +- zgb_boot { ++ zgb-boot-hog { + gpio-hog; + gpios = <19 GPIO_ACTIVE_HIGH>; + output-high; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-am335x-fix-ti-no-reset-on-init-flag-for-gpio.patch b/queue-5.13/arm-dts-am335x-fix-ti-no-reset-on-init-flag-for-gpio.patch new file mode 100644 index 00000000000..bb9809e5bb6 --- /dev/null +++ b/queue-5.13/arm-dts-am335x-fix-ti-no-reset-on-init-flag-for-gpio.patch @@ -0,0 +1,97 @@ +From 28f6c6013e6837a9621fd7dea640471b573c1bfe Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 May 2021 01:24:11 +0300 +Subject: ARM: dts: am335x: fix ti,no-reset-on-init flag for gpios + +From: Grygorii Strashko + +[ Upstream commit d7d30b8fcd111e9feb171023c0e0c8d855582dcb ] + +The ti,no-reset-on-init flag need to be at the interconnect target module +level for the modules that have it defined. +The ti-sysc driver handles this case, but produces warning, not a critical +issue. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am335x-baltos.dtsi | 4 ++-- + arch/arm/boot/dts/am335x-evmsk.dts | 2 +- + arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi | 2 +- + arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi | 2 +- + arch/arm/boot/dts/am33xx-l4.dtsi | 2 +- + 5 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-baltos.dtsi b/arch/arm/boot/dts/am335x-baltos.dtsi +index 3ea286180382..1103a2cb836f 100644 +--- a/arch/arm/boot/dts/am335x-baltos.dtsi ++++ b/arch/arm/boot/dts/am335x-baltos.dtsi +@@ -393,10 +393,10 @@ + status = "okay"; + }; + +-&gpio0 { ++&gpio0_target { + ti,no-reset-on-init; + }; + +-&gpio3 { ++&gpio3_target { + ti,no-reset-on-init; + }; +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index d5f8d5e2eb5d..45bf0273ecd8 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -646,7 +646,7 @@ + status = "okay"; + }; + +-&gpio0 { ++&gpio0_target { + ti,no-reset-on-init; + }; + +diff --git a/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi b/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi +index 4e90f9c23d2e..8121a199607c 100644 +--- a/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi ++++ b/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi +@@ -150,7 +150,7 @@ + status = "okay"; + }; + +-&gpio0 { ++&gpio0_target { + ti,no-reset-on-init; + }; + +diff --git a/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi b/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi +index 98d8ed4ad967..39e5d2ce600a 100644 +--- a/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi ++++ b/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi +@@ -353,7 +353,7 @@ + status = "okay"; + }; + +-&gpio0 { ++&gpio0_target { + ti,no-reset-on-init; + }; + +diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi +index 039a9ab4c7ea..dcce5e3e001e 100644 +--- a/arch/arm/boot/dts/am33xx-l4.dtsi ++++ b/arch/arm/boot/dts/am33xx-l4.dtsi +@@ -1789,7 +1789,7 @@ + }; + }; + +- target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */ ++ gpio3_target: target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0xae000 0x4>, + <0xae010 0x4>, +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch b/queue-5.13/arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch new file mode 100644 index 00000000000..fcc4c7b45ff --- /dev/null +++ b/queue-5.13/arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch @@ -0,0 +1,58 @@ +From 4504a77ba07834a5f2765574adc614eea46b4b4d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:55 +0300 +Subject: ARM: dts: am437x: align gpio hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit bd551acdde3ad40da1a97391abd6e0db7852bf66 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am437x-gp-evm.dts | 4 ++-- + arch/arm/boot/dts/am43x-epos-evm.dts | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts +index 6e4d05d649e9..45cbc7fb557a 100644 +--- a/arch/arm/boot/dts/am437x-gp-evm.dts ++++ b/arch/arm/boot/dts/am437x-gp-evm.dts +@@ -786,7 +786,7 @@ + pinctrl-0 = <&gpio0_pins>; + status = "okay"; + +- p23 { ++ sel-emmc-nand-hog { + gpio-hog; + gpios = <23 GPIO_ACTIVE_HIGH>; + /* SelEMMCorNAND selects between eMMC and NAND: +@@ -819,7 +819,7 @@ + status = "okay"; + ti,no-reset-on-init; + +- p8 { ++ sel-lcd-hdmi-hog { + /* + * SelLCDorHDMI selects between display and audio paths: + * Low: HDMI display with audio via HDMI +diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts +index 8b696107eef8..aae0af10a5b1 100644 +--- a/arch/arm/boot/dts/am43x-epos-evm.dts ++++ b/arch/arm/boot/dts/am43x-epos-evm.dts +@@ -725,7 +725,7 @@ + pinctrl-0 = <&display_mux_pins>; + status = "okay"; + +- p1 { ++ sel-lcd-hdmi-hog { + /* + * SelLCDorHDMI selects between display and audio paths: + * Low: HDMI display with audio via HDMI +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch b/queue-5.13/arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch new file mode 100644 index 00000000000..7f0d7879958 --- /dev/null +++ b/queue-5.13/arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch @@ -0,0 +1,58 @@ +From 89e8d92dc87f35381998214aad15a5667a9ea0b7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 May 2021 01:24:10 +0300 +Subject: ARM: dts: am437x-gp-evm: fix ti,no-reset-on-init flag for gpios + +From: Grygorii Strashko + +[ Upstream commit 2566d5b8c1670f7d7a44cc1426d254147ec5c421 ] + +The ti,no-reset-on-init flag need to be at the interconnect target module +level for the modules that have it defined. +The ti-sysc driver handles this case, but produces warning, not a critical +issue. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am437x-gp-evm.dts | 5 ++++- + arch/arm/boot/dts/am437x-l4.dtsi | 2 +- + 2 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts +index 45cbc7fb557a..e2677682b540 100644 +--- a/arch/arm/boot/dts/am437x-gp-evm.dts ++++ b/arch/arm/boot/dts/am437x-gp-evm.dts +@@ -813,11 +813,14 @@ + status = "okay"; + }; + ++&gpio5_target { ++ ti,no-reset-on-init; ++}; ++ + &gpio5 { + pinctrl-names = "default"; + pinctrl-0 = <&display_mux_pins>; + status = "okay"; +- ti,no-reset-on-init; + + sel-lcd-hdmi-hog { + /* +diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi +index e217ffc09770..a6f19ae7d3e6 100644 +--- a/arch/arm/boot/dts/am437x-l4.dtsi ++++ b/arch/arm/boot/dts/am437x-l4.dtsi +@@ -2070,7 +2070,7 @@ + }; + }; + +- target-module@22000 { /* 0x48322000, ap 116 64.0 */ ++ gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x22000 0x4>, + <0x22010 0x4>, +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch b/queue-5.13/arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch new file mode 100644 index 00000000000..0da9b7ecb6f --- /dev/null +++ b/queue-5.13/arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch @@ -0,0 +1,66 @@ +From 0a69b773f5912b7a3b43da908e0a996ea6a39623 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 May 2021 01:24:09 +0300 +Subject: ARM: dts: am57xx-cl-som-am57x: fix ti,no-reset-on-init flag for gpios + +From: Grygorii Strashko + +[ Upstream commit b644c5e01c870056e13a096e14b9a92075c8f682 ] + +The ti,no-reset-on-init flag need to be at the interconnect target module +level for the modules that have it defined. +The ti-sysc driver handles this case, but produces warning, not a critical +issue. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 5 ++--- + arch/arm/boot/dts/dra7-l4.dtsi | 4 ++-- + 2 files changed, 4 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +index 0d5fe2bfb683..39eba2bc36dd 100644 +--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts ++++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +@@ -610,12 +610,11 @@ + >; + }; + +-&gpio3 { +- status = "okay"; ++&gpio3_target { + ti,no-reset-on-init; + }; + +-&gpio2 { ++&gpio2_target { + status = "okay"; + ti,no-reset-on-init; + }; +diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi +index 648d23f7f748..06e26182eabf 100644 +--- a/arch/arm/boot/dts/dra7-l4.dtsi ++++ b/arch/arm/boot/dts/dra7-l4.dtsi +@@ -1343,7 +1343,7 @@ + }; + }; + +- target-module@55000 { /* 0x48055000, ap 13 0e.0 */ ++ gpio2_target: target-module@55000 { /* 0x48055000, ap 13 0e.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x55000 0x4>, + <0x55010 0x4>, +@@ -1376,7 +1376,7 @@ + }; + }; + +- target-module@57000 { /* 0x48057000, ap 15 06.0 */ ++ gpio3_target: target-module@57000 { /* 0x48057000, ap 15 06.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x57000 0x4>, + <0x57010 0x4>, +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-aspeed-everest-fix-cable-card-pca-chips.patch b/queue-5.13/arm-dts-aspeed-everest-fix-cable-card-pca-chips.patch new file mode 100644 index 00000000000..a69cc8d4083 --- /dev/null +++ b/queue-5.13/arm-dts-aspeed-everest-fix-cable-card-pca-chips.patch @@ -0,0 +1,222 @@ +From c3fd6e2219a82a330ccbfb9f060a4fb21ebbddeb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 30 Apr 2021 13:59:58 -0500 +Subject: ARM: dts: aspeed: Everest: Fix cable card PCA chips + +From: Santosh Puranik + +[ Upstream commit 010da3daf9278ed03d38b7dcb0422f1a7df1bdd3 ] + +Correct two PCA chips which were placed on the wrong I2C bus and +address. + +Signed-off-by: Eddie James +Signed-off-by: Santosh Puranik +Signed-off-by: Joel Stanley +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 168 +++++++++---------- + 1 file changed, 83 insertions(+), 85 deletions(-) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +index 3295c8c7c05c..27af28c8847d 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +@@ -353,10 +353,47 @@ + + &i2c1 { + status = "okay"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; + +- pca2: pca9552@61 { ++&i2c3 { ++ status = "okay"; ++ ++ eeprom@54 { ++ compatible = "atmel,24c128"; ++ reg = <0x54>; ++ }; ++ ++ power-supply@68 { ++ compatible = "ibm,cffps"; ++ reg = <0x68>; ++ }; ++ ++ power-supply@69 { ++ compatible = "ibm,cffps"; ++ reg = <0x69>; ++ }; ++ ++ power-supply@6a { ++ compatible = "ibm,cffps"; ++ reg = <0x6a>; ++ }; ++ ++ power-supply@6b { ++ compatible = "ibm,cffps"; ++ reg = <0x6b>; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ ++ pca2: pca9552@65 { + compatible = "nxp,pca9552"; +- reg = <0x61>; ++ reg = <0x65>; + #address-cells = <1>; + #size-cells = <0>; + +@@ -424,12 +461,54 @@ + reg = <9>; + type = ; + }; ++ }; + ++ i2c-switch@70 { ++ compatible = "nxp,pca9546"; ++ reg = <0x70>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ i2c-mux-idle-disconnect; ++ ++ i2c4mux0chn0: i2c@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ eeprom@52 { ++ compatible = "atmel,24c64"; ++ reg = <0x52>; ++ }; ++ }; ++ ++ i2c4mux0chn1: i2c@1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <1>; ++ eeprom@50 { ++ compatible = "atmel,24c64"; ++ reg = <0x50>; ++ }; ++ }; ++ ++ i2c4mux0chn2: i2c@2 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <2>; ++ eeprom@51 { ++ compatible = "atmel,24c64"; ++ reg = <0x51>; ++ }; ++ }; + }; ++}; + +- pca3: pca9552@62 { ++&i2c5 { ++ status = "okay"; ++ ++ pca3: pca9552@66 { + compatible = "nxp,pca9552"; +- reg = <0x62>; ++ reg = <0x66>; + #address-cells = <1>; + #size-cells = <0>; + +@@ -512,87 +591,6 @@ + + }; + +-}; +- +-&i2c2 { +- status = "okay"; +-}; +- +-&i2c3 { +- status = "okay"; +- +- eeprom@54 { +- compatible = "atmel,24c128"; +- reg = <0x54>; +- }; +- +- power-supply@68 { +- compatible = "ibm,cffps"; +- reg = <0x68>; +- }; +- +- power-supply@69 { +- compatible = "ibm,cffps"; +- reg = <0x69>; +- }; +- +- power-supply@6a { +- compatible = "ibm,cffps"; +- reg = <0x6a>; +- }; +- +- power-supply@6b { +- compatible = "ibm,cffps"; +- reg = <0x6b>; +- }; +-}; +- +-&i2c4 { +- status = "okay"; +- +- i2c-switch@70 { +- compatible = "nxp,pca9546"; +- reg = <0x70>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "okay"; +- i2c-mux-idle-disconnect; +- +- i2c4mux0chn0: i2c@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- eeprom@52 { +- compatible = "atmel,24c64"; +- reg = <0x52>; +- }; +- }; +- +- i2c4mux0chn1: i2c@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- eeprom@50 { +- compatible = "atmel,24c64"; +- reg = <0x50>; +- }; +- }; +- +- i2c4mux0chn2: i2c@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- eeprom@51 { +- compatible = "atmel,24c64"; +- reg = <0x51>; +- }; +- }; +- }; +-}; +- +-&i2c5 { +- status = "okay"; +- + i2c-switch@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-bcm283x-fix-up-gpio-led-node-names.patch b/queue-5.13/arm-dts-bcm283x-fix-up-gpio-led-node-names.patch new file mode 100644 index 00000000000..82d38e85860 --- /dev/null +++ b/queue-5.13/arm-dts-bcm283x-fix-up-gpio-led-node-names.patch @@ -0,0 +1,262 @@ +From 17eb9a807dd0bc9fd4d7b2cd42ae7347db0f651c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 6 Jun 2021 14:16:15 +0200 +Subject: ARM: dts: bcm283x: Fix up GPIO LED node names + +From: Stefan Wahren + +[ Upstream commit 5f30dacf37bc93308e91e4d0fc94681ca73f0f91 ] + +Fix the node names for the GPIO LEDs to conform to the standard node +name led-.. + +Signed-off-by: Stefan Wahren +Link: https://lore.kernel.org/r/1622981777-5023-6-git-send-email-stefan.wahren@i2se.com +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 4 ++-- + arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 4 ++-- + arch/arm/boot/dts/bcm2835-rpi-a.dts | 2 +- + arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 4 ++-- + arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 2 +- + arch/arm/boot/dts/bcm2835-rpi-b.dts | 2 +- + arch/arm/boot/dts/bcm2835-rpi-cm1.dtsi | 2 +- + arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 2 +- + arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 4 ++-- + arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 4 ++-- + arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 4 ++-- + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 2 +- + arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi | 2 +- + 15 files changed, 21 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +index 3b4ab947492a..27d2f859adfc 100644 +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -29,11 +29,11 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; + }; + +- pwr { ++ led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +index 6c8ce39833bf..40b9405f1a8e 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +@@ -14,11 +14,11 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + }; + +- pwr { ++ led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "keep"; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts +index 17fdd48346ff..11edb581dbaf 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts +@@ -14,7 +14,7 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +index b0355c229cdc..1b435c64bd9c 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +@@ -15,11 +15,11 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + }; + +- pwr { ++ led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "keep"; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +index 33b3b5c02521..a23c25c00eea 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +@@ -15,7 +15,7 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts +index 2b69957e0113..1b63d6b19750 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts +@@ -15,7 +15,7 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-cm1.dtsi b/arch/arm/boot/dts/bcm2835-rpi-cm1.dtsi +index 58059c2ce129..e4e6b6abbfc1 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-cm1.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi-cm1.dtsi +@@ -5,7 +5,7 @@ + + / { + leds { +- act { ++ led-act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts +index f65448c01e31..33b2b77aa47d 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts +@@ -23,7 +23,7 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +index 6dd93c6f4966..6f9b3a908f28 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +@@ -18,7 +18,7 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index d94357b21f7e..87ddcad76083 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -4,7 +4,7 @@ + leds { + compatible = "gpio-leds"; + +- act { ++ led-act { + label = "ACT"; + default-state = "keep"; + linux,default-trigger = "heartbeat"; +diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +index 0455a680394a..d8af8eeac7b6 100644 +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -15,11 +15,11 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + }; + +- pwr { ++ led-pwr { + label = "PWR"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + default-state = "keep"; +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts +index 28be0332c1c8..77099a7871b0 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts +@@ -19,11 +19,11 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; + }; + +- pwr { ++ led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts +index 37343148643d..61010266ca9a 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts +@@ -20,11 +20,11 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; + }; + +- pwr { ++ led-pwr { + label = "PWR"; + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +index 054ecaa355c9..dd4a48604097 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -20,7 +20,7 @@ + }; + + leds { +- act { ++ led-act { + gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>; + }; + }; +diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi b/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi +index 925cb37c22f0..828a20561b96 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi ++++ b/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi +@@ -14,7 +14,7 @@ + * Since there is no upstream GPIO driver yet, + * remove the incomplete node. + */ +- /delete-node/ act; ++ /delete-node/ led-act; + }; + + reg_3v3: fixed-regulator { +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-bcm283x-fix-up-mmc-node-names.patch b/queue-5.13/arm-dts-bcm283x-fix-up-mmc-node-names.patch new file mode 100644 index 00000000000..08e0ccb455c --- /dev/null +++ b/queue-5.13/arm-dts-bcm283x-fix-up-mmc-node-names.patch @@ -0,0 +1,50 @@ +From aaaa33eb03f14631d9a5fefd6c6a1f7a9c322ccb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 6 Jun 2021 14:16:11 +0200 +Subject: ARM: dts: bcm283x: Fix up MMC node names + +From: Stefan Wahren + +[ Upstream commit f230c32349eb0a43a012a81c08a7f13859b86cbb ] + +Fix the node names for the MMC/SD card controller to conform +to the standard node name mmc@.. + +Signed-off-by: Stefan Wahren +Link: https://lore.kernel.org/r/1622981777-5023-2-git-send-email-stefan.wahren@i2se.com +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm2711.dtsi | 2 +- + arch/arm/boot/dts/bcm283x.dtsi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi +index 720beec54d61..d872064db761 100644 +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -413,7 +413,7 @@ + ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>; + dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>; + +- emmc2: emmc2@7e340000 { ++ emmc2: mmc@7e340000 { + compatible = "brcm,bcm2711-emmc2"; + reg = <0x0 0x7e340000 0x100>; + interrupts = ; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index b83a864e2e8b..0f3be55201a5 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -420,7 +420,7 @@ + status = "disabled"; + }; + +- sdhci: sdhci@7e300000 { ++ sdhci: mmc@7e300000 { + compatible = "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-bcm5301x-fix-nand-nodes-names.patch b/queue-5.13/arm-dts-bcm5301x-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..1f4af44dd17 --- /dev/null +++ b/queue-5.13/arm-dts-bcm5301x-fix-nand-nodes-names.patch @@ -0,0 +1,115 @@ +From 90223db1545a49d1890c3f87dd01225fe90e082e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:48 +0200 +Subject: ARM: dts: BCM5301X: Fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit b660269cba748dfd07eb5551a88ff34d5ea0b86e ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 4 ++-- + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 4 ++-- + arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 4 ++-- + arch/arm/boot/dts/bcm5301x.dtsi | 2 +- + arch/arm/boot/dts/bcm953012k.dts | 4 ++-- + arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- + 6 files changed, 10 insertions(+), 10 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts +index 8636600385fd..c81944cd6d0b 100644 +--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts ++++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts +@@ -24,8 +24,8 @@ + reg = <0x00000000 0x08000000>; + }; + +- nand: nand@18028000 { +- nandcs@0 { ++ nand_controller: nand-controller@18028000 { ++ nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; +diff --git a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +index e635a15041dd..a6e2aeb28675 100644 +--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts ++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +@@ -25,8 +25,8 @@ + <0x88000000 0x08000000>; + }; + +- nand: nand@18028000 { +- nandcs@0 { ++ nand_controller: nand-controller@18028000 { ++ nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; +diff --git a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi +index 925a7c9ce5b7..be9a00ff752d 100644 +--- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi ++++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi +@@ -6,8 +6,8 @@ + */ + + / { +- nand@18028000 { +- nandcs: nandcs@0 { ++ nand-controller@18028000 { ++ nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + #address-cells = <1>; +diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi +index 86872e12c355..bf595269ed7f 100644 +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -501,7 +501,7 @@ + reg = <0x18004000 0x14>; + }; + +- nand: nand@18028000 { ++ nand_controller: nand-controller@18028000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; + reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; + reg-names = "nand", "iproc-idm", "iproc-ext"; +diff --git a/arch/arm/boot/dts/bcm953012k.dts b/arch/arm/boot/dts/bcm953012k.dts +index 046c59fb4846..de40bd59a5fa 100644 +--- a/arch/arm/boot/dts/bcm953012k.dts ++++ b/arch/arm/boot/dts/bcm953012k.dts +@@ -49,8 +49,8 @@ + }; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +index 8060178b365d..a5a64d17d9ea 100644 +--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi ++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +@@ -306,7 +306,7 @@ + interrupt-names = "nand"; + status = "okay"; + +- nandcs: nandcs@0 { ++ nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-bcm5301x-fix-pinmux-subnodes-names.patch b/queue-5.13/arm-dts-bcm5301x-fix-pinmux-subnodes-names.patch new file mode 100644 index 00000000000..de04a9db202 --- /dev/null +++ b/queue-5.13/arm-dts-bcm5301x-fix-pinmux-subnodes-names.patch @@ -0,0 +1,64 @@ +From 9acb8a2dfbefceb59855825d82be5e64e4c7cafc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 21 Apr 2021 11:00:06 +0200 +Subject: ARM: dts: BCM5301X: Fix pinmux subnodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit bb95d7d440fefd104c593d9cb20da6d34a474e97 ] + +This matches pinmux-node.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm47094.dtsi | 2 +- + arch/arm/boot/dts/bcm5301x.dtsi | 6 +++--- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm47094.dtsi b/arch/arm/boot/dts/bcm47094.dtsi +index 2a8f7312d1be..6282363313e1 100644 +--- a/arch/arm/boot/dts/bcm47094.dtsi ++++ b/arch/arm/boot/dts/bcm47094.dtsi +@@ -11,7 +11,7 @@ + &pinctrl { + compatible = "brcm,bcm4709-pinmux"; + +- pinmux_mdio: mdio { ++ pinmux_mdio: mdio-pins { + groups = "mdio_grp"; + function = "mdio"; + }; +diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi +index bf595269ed7f..f92089290ccd 100644 +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -458,18 +458,18 @@ + function = "spi"; + }; + +- pinmux_i2c: i2c { ++ pinmux_i2c: i2c-pins { + groups = "i2c_grp"; + function = "i2c"; + }; + +- pinmux_pwm: pwm { ++ pinmux_pwm: pwm-pins { + groups = "pwm0_grp", "pwm1_grp", + "pwm2_grp", "pwm3_grp"; + function = "pwm"; + }; + +- pinmux_uart1: uart1 { ++ pinmux_uart1: uart1-pins { + groups = "uart1_grp"; + function = "uart1"; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-bcm63xx-fix-nand-nodes-names.patch b/queue-5.13/arm-dts-bcm63xx-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..65ca30b522a --- /dev/null +++ b/queue-5.13/arm-dts-bcm63xx-fix-nand-nodes-names.patch @@ -0,0 +1,55 @@ +From fe89586760076ca634de953640b0738863146841 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:52 +0200 +Subject: ARM: dts: BCM63xx: Fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit 75e2f012f6e34b93124d1d86eaa8f27df48e9ea0 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm63138.dtsi | 2 +- + arch/arm/boot/dts/bcm963138dvt.dts | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi +index 9c0325cf9e22..cca49a2e2d62 100644 +--- a/arch/arm/boot/dts/bcm63138.dtsi ++++ b/arch/arm/boot/dts/bcm63138.dtsi +@@ -203,7 +203,7 @@ + status = "disabled"; + }; + +- nand: nand@2000 { ++ nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand"; +diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts +index 5b177274f182..df5c8ab90627 100644 +--- a/arch/arm/boot/dts/bcm963138dvt.dts ++++ b/arch/arm/boot/dts/bcm963138dvt.dts +@@ -31,10 +31,10 @@ + status = "okay"; + }; + +-&nand { ++&nand_controller { + status = "okay"; + +- nandcs@0 { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <4>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch b/queue-5.13/arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch new file mode 100644 index 00000000000..f16e88a12fd --- /dev/null +++ b/queue-5.13/arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch @@ -0,0 +1,78 @@ +From 37a2834931ba79ce06f82a7e8d54f9205fbefe24 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 May 2021 09:54:06 +0200 +Subject: ARM: dts: dra7x-evm: Align GPIO hog names with dt-schema + +From: Geert Uytterhoeven + +[ Upstream commit 0c149400c2f676e7b4cc68e517db29005a7a38c7 ] + +The dt-schema for nxp,pcf8575 expects GPIO hogs node names to end with a +'hog' suffix. + +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Laurent Pinchart +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/dra7-evm.dts | 2 +- + arch/arm/boot/dts/dra71-evm.dts | 2 +- + arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- + arch/arm/boot/dts/dra76-evm.dts | 2 +- + 4 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index 38530dbb89a0..3dcb6e1f49bc 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -366,7 +366,7 @@ + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; +- p1 { ++ hdmi-audio-hog { + /* vin6_sel_s0: high: VIN6, low: audio */ + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts +index 6d2cca6b4488..a64364443031 100644 +--- a/arch/arm/boot/dts/dra71-evm.dts ++++ b/arch/arm/boot/dts/dra71-evm.dts +@@ -187,7 +187,7 @@ + }; + + &pcf_hdmi { +- p0 { ++ hdmi-i2c-disable-hog { + /* + * PM_OEn to High: Disable routing I2C3 to PM_I2C + * With this PM_SEL(p3) should not matter +diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi +index b65b2dd094d0..f2384277d5dc 100644 +--- a/arch/arm/boot/dts/dra72-evm-common.dtsi ++++ b/arch/arm/boot/dts/dra72-evm-common.dtsi +@@ -268,7 +268,7 @@ + */ + lines-initial-states = <0x0f2b>; + +- p1 { ++ hdmi-audio-hog { + /* vin6_sel_s0: high: VIN6, low: audio */ + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts +index 9bd01ae40b1d..df47ea59c9c4 100644 +--- a/arch/arm/boot/dts/dra76-evm.dts ++++ b/arch/arm/boot/dts/dra76-evm.dts +@@ -381,7 +381,7 @@ + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; +- p1 { ++ hdmi-audio-hog { + /* vin6_sel_s0: high: VIN6, low: audio */ + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-exynos-align-broadcom-wifi-with-dtschema.patch b/queue-5.13/arm-dts-exynos-align-broadcom-wifi-with-dtschema.patch new file mode 100644 index 00000000000..0b08fcfb9d0 --- /dev/null +++ b/queue-5.13/arm-dts-exynos-align-broadcom-wifi-with-dtschema.patch @@ -0,0 +1,81 @@ +From b4409cafd9f543ccd89f3a459f8d175134c2f638 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 May 2021 09:59:37 -0400 +Subject: ARM: dts: exynos: align Broadcom WiFi with dtschema + +From: Krzysztof Kozlowski + +[ Upstream commit cc29e39412b9a78b43f7dfa09d739f8ba9fa7984 ] + +The Broadcom BCM4329 family dtschema expects devices to be compatible +also with brcm,bcm4329-fmac: + + arch/arm/boot/dts/exynos3250-rinato.dt.yaml: wifi@1: compatible: 'oneOf' conditional failed, one must be fixed: + ['brcm,bcm4334-fmac'] is too short + 'brcm,bcm4329-fmac' was expected + +Signed-off-by: Krzysztof Kozlowski +Link: https://lore.kernel.org/r/20210505135941.59898-1-krzysztof.kozlowski@canonical.com +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/exynos3250-rinato.dts | 2 +- + arch/arm/boot/dts/exynos4210-i9100.dts | 2 +- + arch/arm/boot/dts/exynos4210-trats.dts | 2 +- + arch/arm/boot/dts/exynos4210-universal_c210.dts | 2 +- + 4 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts +index c52b9cf4f74c..f6ba5e426040 100644 +--- a/arch/arm/boot/dts/exynos3250-rinato.dts ++++ b/arch/arm/boot/dts/exynos3250-rinato.dts +@@ -653,7 +653,7 @@ + mmc-pwrseq = <&wlan_pwrseq>; + + brcmf: wifi@1 { +- compatible = "brcm,bcm4334-fmac"; ++ compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + interrupt-parent = <&gpx1>; +diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts +index 525ff3d2fac3..db70f62cc08f 100644 +--- a/arch/arm/boot/dts/exynos4210-i9100.dts ++++ b/arch/arm/boot/dts/exynos4210-i9100.dts +@@ -806,7 +806,7 @@ + pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>; + + brcmf: wifi@1 { +- compatible = "brcm,bcm4330-fmac"; ++ compatible = "brcm,bcm4330-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + interrupt-parent = <&gpx2>; +diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts +index d2406c9146b8..3eb8df319246 100644 +--- a/arch/arm/boot/dts/exynos4210-trats.dts ++++ b/arch/arm/boot/dts/exynos4210-trats.dts +@@ -521,7 +521,7 @@ + pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>; + + brcmf: wifi@1 { +- compatible = "brcm,bcm4330-fmac"; ++ compatible = "brcm,bcm4330-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + interrupt-parent = <&gpx2>; +diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts +index dd44ad2c6ad6..f052853244a4 100644 +--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts ++++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts +@@ -614,7 +614,7 @@ + pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>; + + brcmf: wifi@1 { +- compatible = "brcm,bcm4330-fmac"; ++ compatible = "brcm,bcm4330-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&gpx2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-gemini-add-device_type-on-pci.patch b/queue-5.13/arm-dts-gemini-add-device_type-on-pci.patch new file mode 100644 index 00000000000..142c4706930 --- /dev/null +++ b/queue-5.13/arm-dts-gemini-add-device_type-on-pci.patch @@ -0,0 +1,33 @@ +From 610f7dee2157d1dd85039211c169514d9fbf60be Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 May 2021 18:52:28 +0000 +Subject: ARM: dts: gemini: add device_type on pci + +From: Corentin Labbe + +[ Upstream commit 483f3645b3f7acfd1c78a19d51b80c0656161974 ] + +Fixes DT warning on pci node by adding the missing device_type. + +Signed-off-by: Corentin Labbe +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/gemini.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi +index 065ed10a79fa..07448c03dac9 100644 +--- a/arch/arm/boot/dts/gemini.dtsi ++++ b/arch/arm/boot/dts/gemini.dtsi +@@ -286,6 +286,7 @@ + clock-names = "PCLK", "PCICLK"; + pinctrl-names = "default"; + pinctrl-0 = <&pci_default_pins>; ++ device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-gemini-rename-mdio-to-the-right-name.patch b/queue-5.13/arm-dts-gemini-rename-mdio-to-the-right-name.patch new file mode 100644 index 00000000000..6fb3cb4ff7f --- /dev/null +++ b/queue-5.13/arm-dts-gemini-rename-mdio-to-the-right-name.patch @@ -0,0 +1,90 @@ +From 01f4feced0611858ff2150facd26f389e88f27f8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 28 Apr 2021 17:48:30 +0000 +Subject: ARM: dts: gemini: rename mdio to the right name + +From: Corentin Labbe + +[ Upstream commit fc5b59b945b546e27977e99a5ca6fe61179ff0d2 ] + +ethernet-phy is not the right name for mdio, fix it. + +Signed-off-by: Corentin Labbe +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/gemini-dlink-dns-313.dts | 2 +- + arch/arm/boot/dts/gemini-nas4220b.dts | 2 +- + arch/arm/boot/dts/gemini-rut1xx.dts | 2 +- + arch/arm/boot/dts/gemini-wbd111.dts | 2 +- + arch/arm/boot/dts/gemini-wbd222.dts | 2 +- + 5 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts +index c6f3d90e3e90..b8acc6eaaa6d 100644 +--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts ++++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts +@@ -140,7 +140,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + /* Uses MDC and MDIO */ + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ +diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts +index 43c45f7e1e0a..13112a8a5dd8 100644 +--- a/arch/arm/boot/dts/gemini-nas4220b.dts ++++ b/arch/arm/boot/dts/gemini-nas4220b.dts +@@ -62,7 +62,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts +index 08091d2a64e1..0ebda4efd9d0 100644 +--- a/arch/arm/boot/dts/gemini-rut1xx.dts ++++ b/arch/arm/boot/dts/gemini-rut1xx.dts +@@ -56,7 +56,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts +index 3a2761dd460f..5602ba8f30f2 100644 +--- a/arch/arm/boot/dts/gemini-wbd111.dts ++++ b/arch/arm/boot/dts/gemini-wbd111.dts +@@ -68,7 +68,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts +index 52b4dbc0c072..a4a260c36d75 100644 +--- a/arch/arm/boot/dts/gemini-wbd222.dts ++++ b/arch/arm/boot/dts/gemini-wbd222.dts +@@ -67,7 +67,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-hurricane-2-fix-nand-nodes-names.patch b/queue-5.13/arm-dts-hurricane-2-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..88a29986547 --- /dev/null +++ b/queue-5.13/arm-dts-hurricane-2-fix-nand-nodes-names.patch @@ -0,0 +1,37 @@ +From 231a5653e67028596763d14215dacab5c7da9f12 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:53 +0200 +Subject: ARM: dts: Hurricane 2: Fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit a4528d9029e2eda16e4fc9b9da1de1fbec10ab26 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm-hr2.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/bcm-hr2.dtsi b/arch/arm/boot/dts/bcm-hr2.dtsi +index e8df458aad39..84cda16f68a2 100644 +--- a/arch/arm/boot/dts/bcm-hr2.dtsi ++++ b/arch/arm/boot/dts/bcm-hr2.dtsi +@@ -179,7 +179,7 @@ + status = "disabled"; + }; + +- nand: nand@26000 { ++ nand_controller: nand-controller@26000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x26000 0x600>, + <0x11b408 0x600>, +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch b/queue-5.13/arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch new file mode 100644 index 00000000000..e848578c17f --- /dev/null +++ b/queue-5.13/arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch @@ -0,0 +1,49 @@ +From d6e1cf3958e160aa65aa8a2b6491c70fc5e20563 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 12 Apr 2021 08:24:50 +0200 +Subject: ARM: dts: imx6: phyFLEX: Fix UART hardware flow control + +From: Primoz Fiser + +[ Upstream commit 14cdc1f243d79e0b46be150502b7dba9c5a6bdfd ] + +Serial interface uart3 on phyFLEX board is capable of 5-wire connection +including signals RTS and CTS for hardware flow control. + +Fix signals UART3_CTS_B and UART3_RTS_B padmux assignments and add +missing property "uart-has-rtscts" to allow serial interface to be +configured and used with the hardware flow control. + +Signed-off-by: Primoz Fiser +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +index 7bd658b7bdda..f3236204cb5a 100644 +--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +@@ -322,8 +322,8 @@ + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 +- MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1 +- MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1 + >; + }; + +@@ -410,6 +410,7 @@ + &uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; ++ uart-has-rtscts; + status = "disabled"; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-imx6dl-riotboard-configure-phy-clock-and-set.patch b/queue-5.13/arm-dts-imx6dl-riotboard-configure-phy-clock-and-set.patch new file mode 100644 index 00000000000..7bf4edfb5cb --- /dev/null +++ b/queue-5.13/arm-dts-imx6dl-riotboard-configure-phy-clock-and-set.patch @@ -0,0 +1,37 @@ +From 720650599e6112b3d8cdc5f295cf1f6339ad2c85 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 11 May 2021 06:30:39 +0200 +Subject: ARM: dts: imx6dl-riotboard: configure PHY clock and set proper EEE + value + +From: Oleksij Rempel + +[ Upstream commit 723de6a4126b2474a8106e943749e1554012dad6 ] + +Without SoC specific PHY fixups the network interface on this board will +fail to work. Provide missing DT properties to make it work again. + +Signed-off-by: Oleksij Rempel +Reviewed-by: Andrew Lunn +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx6dl-riotboard.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts +index 065d3ab0f50a..e7d9bfbfd0e4 100644 +--- a/arch/arm/boot/dts/imx6dl-riotboard.dts ++++ b/arch/arm/boot/dts/imx6dl-riotboard.dts +@@ -106,6 +106,8 @@ + reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <1000>; ++ qca,smarteee-tw-us-1g = <24>; ++ qca,clk-out-frequency = <125000000>; + }; + }; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-omap2-replace-underscores-in-sub-mailbox-nod.patch b/queue-5.13/arm-dts-omap2-replace-underscores-in-sub-mailbox-nod.patch new file mode 100644 index 00000000000..fae2bcd01eb --- /dev/null +++ b/queue-5.13/arm-dts-omap2-replace-underscores-in-sub-mailbox-nod.patch @@ -0,0 +1,212 @@ +From 42a8583cf592cbcb2a70b150b140fde4b823bacf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 May 2021 12:36:45 -0500 +Subject: ARM: dts: OMAP2+: Replace underscores in sub-mailbox node names + +From: Suman Anna + +[ Upstream commit 9e7f5ee1137397def6580461e27e5efcb68183ee ] + +A number of sub-mailbox node names in various OMAP2+ dts files are +currently using underscores. This is not adhering to the node name +convention, fix all of these to use hiphens. + +These nodes are already using the prefix mbox, so they will be in +compliance with the sub-mailbox node name convention being added in +the OMAP Mailbox YAML binding as well. + +Signed-off-by: Suman Anna +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 8 ++++---- + arch/arm/boot/dts/dm816x.dtsi | 2 +- + arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi | 6 +++--- + arch/arm/boot/dts/dra72x.dtsi | 6 +++--- + arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi | 2 +- + arch/arm/boot/dts/dra74x.dtsi | 8 ++++---- + arch/arm/boot/dts/omap4-l4.dtsi | 4 ++-- + arch/arm/boot/dts/omap5-l4.dtsi | 4 ++-- + 8 files changed, 20 insertions(+), 20 deletions(-) + +diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +index 39eba2bc36dd..aed81568a297 100644 +--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts ++++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +@@ -454,20 +454,20 @@ + + &mailbox5 { + status = "okay"; +- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { ++ mbox_ipu1_ipc3x: mbox-ipu1-ipc3x { + status = "okay"; + }; +- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { ++ mbox_dsp1_ipc3x: mbox-dsp1-ipc3x { + status = "okay"; + }; + }; + + &mailbox6 { + status = "okay"; +- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { ++ mbox_ipu2_ipc3x: mbox-ipu2-ipc3x { + status = "okay"; + }; +- mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { ++ mbox_dsp2_ipc3x: mbox-dsp2-ipc3x { + status = "okay"; + }; + }; +diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi +index 3551a64963f8..1825d912b8ab 100644 +--- a/arch/arm/boot/dts/dm816x.dtsi ++++ b/arch/arm/boot/dts/dm816x.dtsi +@@ -351,7 +351,7 @@ + #mbox-cells = <1>; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; +- mbox_dsp: mbox_dsp { ++ mbox_dsp: mbox-dsp { + ti,mbox-tx = <3 0 0>; + ti,mbox-rx = <0 0 0>; + }; +diff --git a/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi b/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi +index a25749a1c365..a5bdc6431d8d 100644 +--- a/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi ++++ b/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi +@@ -5,17 +5,17 @@ + + &mailbox5 { + status = "okay"; +- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { ++ mbox_ipu1_ipc3x: mbox-ipu1-ipc3x { + status = "okay"; + }; +- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { ++ mbox_dsp1_ipc3x: mbox-dsp1-ipc3x { + status = "okay"; + }; + }; + + &mailbox6 { + status = "okay"; +- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { ++ mbox_ipu2_ipc3x: mbox-ipu2-ipc3x { + status = "okay"; + }; + }; +diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi +index f3e934ef7d3e..90617261373c 100644 +--- a/arch/arm/boot/dts/dra72x.dtsi ++++ b/arch/arm/boot/dts/dra72x.dtsi +@@ -77,12 +77,12 @@ + }; + + &mailbox5 { +- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { ++ mbox_ipu1_ipc3x: mbox-ipu1-ipc3x { + ti,mbox-tx = <6 2 2>; + ti,mbox-rx = <4 2 2>; + status = "disabled"; + }; +- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { ++ mbox_dsp1_ipc3x: mbox-dsp1-ipc3x { + ti,mbox-tx = <5 2 2>; + ti,mbox-rx = <1 2 2>; + status = "disabled"; +@@ -90,7 +90,7 @@ + }; + + &mailbox6 { +- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { ++ mbox_ipu2_ipc3x: mbox-ipu2-ipc3x { + ti,mbox-tx = <6 2 2>; + ti,mbox-rx = <4 2 2>; + status = "disabled"; +diff --git a/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi b/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi +index b1147a4b77f9..3256631510c5 100644 +--- a/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi ++++ b/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi +@@ -6,7 +6,7 @@ + #include "dra7-ipu-dsp-common.dtsi" + + &mailbox6 { +- mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { ++ mbox_dsp2_ipc3x: mbox-dsp2-ipc3x { + status = "okay"; + }; + }; +diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi +index b4e07d99ffde..cfb39dde4930 100644 +--- a/arch/arm/boot/dts/dra74x.dtsi ++++ b/arch/arm/boot/dts/dra74x.dtsi +@@ -145,12 +145,12 @@ + }; + + &mailbox5 { +- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { ++ mbox_ipu1_ipc3x: mbox-ipu1-ipc3x { + ti,mbox-tx = <6 2 2>; + ti,mbox-rx = <4 2 2>; + status = "disabled"; + }; +- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { ++ mbox_dsp1_ipc3x: mbox-dsp1-ipc3x { + ti,mbox-tx = <5 2 2>; + ti,mbox-rx = <1 2 2>; + status = "disabled"; +@@ -158,12 +158,12 @@ + }; + + &mailbox6 { +- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { ++ mbox_ipu2_ipc3x: mbox-ipu2-ipc3x { + ti,mbox-tx = <6 2 2>; + ti,mbox-rx = <4 2 2>; + status = "disabled"; + }; +- mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { ++ mbox_dsp2_ipc3x: mbox-dsp2-ipc3x { + ti,mbox-tx = <5 2 2>; + ti,mbox-rx = <1 2 2>; + status = "disabled"; +diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi +index 99721673d7af..46b8f9efd413 100644 +--- a/arch/arm/boot/dts/omap4-l4.dtsi ++++ b/arch/arm/boot/dts/omap4-l4.dtsi +@@ -600,11 +600,11 @@ + #mbox-cells = <1>; + ti,mbox-num-users = <3>; + ti,mbox-num-fifos = <8>; +- mbox_ipu: mbox_ipu { ++ mbox_ipu: mbox-ipu { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; +- mbox_dsp: mbox_dsp { ++ mbox_dsp: mbox-dsp { + ti,mbox-tx = <3 0 0>; + ti,mbox-rx = <2 0 0>; + }; +diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi +index b148b289e830..06cc3a19ddaa 100644 +--- a/arch/arm/boot/dts/omap5-l4.dtsi ++++ b/arch/arm/boot/dts/omap5-l4.dtsi +@@ -616,11 +616,11 @@ + #mbox-cells = <1>; + ti,mbox-num-users = <3>; + ti,mbox-num-fifos = <8>; +- mbox_ipu: mbox_ipu { ++ mbox_ipu: mbox-ipu { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; +- mbox_dsp: mbox_dsp { ++ mbox_dsp: mbox-dsp { + ti,mbox-tx = <3 0 0>; + ti,mbox-rx = <2 0 0>; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch b/queue-5.13/arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch new file mode 100644 index 00000000000..5d254501f19 --- /dev/null +++ b/queue-5.13/arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch @@ -0,0 +1,49 @@ +From 46443d5c8a373d884373a6f1f0e7000cc96c47fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:56 +0300 +Subject: ARM: dts: omap3: align gpio hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit cfb4ab3b5df86c6001127346d8331f5e87012f91 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/omap3-evm-processor-common.dtsi | 2 +- + arch/arm/boot/dts/omap3-gta04a5.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi +index b4109f48ec18..e6ba30a21166 100644 +--- a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi ++++ b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi +@@ -195,7 +195,7 @@ + * for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V. + */ + &gpio2 { +- en_usb2_port { ++ en-usb2-port-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */ + output-low; +diff --git a/arch/arm/boot/dts/omap3-gta04a5.dts b/arch/arm/boot/dts/omap3-gta04a5.dts +index fd84bbf3b9cc..9ce8d81250aa 100644 +--- a/arch/arm/boot/dts/omap3-gta04a5.dts ++++ b/arch/arm/boot/dts/omap3-gta04a5.dts +@@ -37,7 +37,7 @@ + }; + + &gpio5 { +- irda_en { ++ irda-en-hog { + gpio-hog; + gpios = <(175-160) GPIO_ACTIVE_HIGH>; + output-high; /* activate gpio_175 to disable IrDA receiver */ +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-omap5-board-common-align-gpio-hog-names-with.patch b/queue-5.13/arm-dts-omap5-board-common-align-gpio-hog-names-with.patch new file mode 100644 index 00000000000..e8052755015 --- /dev/null +++ b/queue-5.13/arm-dts-omap5-board-common-align-gpio-hog-names-with.patch @@ -0,0 +1,35 @@ +From 76aebf402bc59c2d308ed10188c067d0d154b65c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:57 +0300 +Subject: ARM: dts: omap5-board-common: align gpio hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit 4823117cb80eedf31ddbc126b9bd92e707bd9a26 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/omap5-board-common.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi +index d8f13626cfd1..45435bb88c89 100644 +--- a/arch/arm/boot/dts/omap5-board-common.dtsi ++++ b/arch/arm/boot/dts/omap5-board-common.dtsi +@@ -149,7 +149,7 @@ + + &gpio8 { + /* TI trees use GPIO instead of msecure, see also muxing */ +- p234 { ++ msecure-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch b/queue-5.13/arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch new file mode 100644 index 00000000000..da2ebe7cce9 --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch @@ -0,0 +1,71 @@ +From 4f2b2079ed3f200bb2bbc1eb6832b0ebf4d7ac05 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 May 2021 11:02:29 +0200 +Subject: ARM: dts: rockchip: Fix IOMMU nodes properties on rk322x + +From: Benjamin Gaignard + +[ Upstream commit 6b023929666f0be5df75f5e0278d1b70effadf42 ] + +Add '#" to iommu-cells properties. +Remove useless interrupt-names properties + +Signed-off-by: Benjamin Gaignard +Link: https://lore.kernel.org/r/20210507090232.233049-4-benjamin.gaignard@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk322x.dtsi | 10 +++------- + 1 file changed, 3 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi +index 9f02ba7a0cc2..25f83f2f5618 100644 +--- a/arch/arm/boot/dts/rk322x.dtsi ++++ b/arch/arm/boot/dts/rk322x.dtsi +@@ -558,10 +558,9 @@ + compatible = "rockchip,iommu"; + reg = <0x20020800 0x100>; + interrupts = ; +- interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "iface"; +- iommu-cells = <0>; ++ #iommu-cells = <0>; + status = "disabled"; + }; + +@@ -569,10 +568,9 @@ + compatible = "rockchip,iommu"; + reg = <0x20030480 0x40>, <0x200304c0 0x40>; + interrupts = ; +- interrupt-names = "vdec_mmu"; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; + clock-names = "aclk", "iface"; +- iommu-cells = <0>; ++ #iommu-cells = <0>; + status = "disabled"; + }; + +@@ -602,7 +600,6 @@ + compatible = "rockchip,iommu"; + reg = <0x20053f00 0x100>; + interrupts = ; +- interrupt-names = "vop_mmu"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; +@@ -623,10 +620,9 @@ + compatible = "rockchip,iommu"; + reg = <0x20070800 0x100>; + interrupts = ; +- interrupt-names = "iep_mmu"; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; +- iommu-cells = <0>; ++ #iommu-cells = <0>; + status = "disabled"; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch b/queue-5.13/arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch new file mode 100644 index 00000000000..204029d7824 --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch @@ -0,0 +1,57 @@ +From e3a7f5586a030bf51fa4689d9a8fd95c170dea33 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 26 Jan 2021 12:02:20 +0100 +Subject: ARM: dts: rockchip: fix pinctrl sleep nodename for rk3036-kylin and + rk3288 + +From: Johan Jonker + +[ Upstream commit dfbfb86a43f9a5bbd166d88bca9e07ee4e1bff31 ] + +A test with the command below aimed at powerpc generates +notifications in the Rockchip ARM tree. + +Fix pinctrl "sleep" nodename by renaming it to "suspend" +for rk3036-kylin and rk3288 + +make ARCH=arm dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210126110221.10815-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3036-kylin.dts | 2 +- + arch/arm/boot/dts/rk3288.dtsi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts +index 7154b827ea2f..e817eba8c622 100644 +--- a/arch/arm/boot/dts/rk3036-kylin.dts ++++ b/arch/arm/boot/dts/rk3036-kylin.dts +@@ -390,7 +390,7 @@ + }; + }; + +- sleep { ++ suspend { + global_pwroff: global-pwroff { + rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>; + }; +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 05557ad02b33..24b903240cb3 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -1582,7 +1582,7 @@ + drive-strength = <12>; + }; + +- sleep { ++ suspend { + global_pwroff: global-pwroff { + rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch b/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch new file mode 100644 index 00000000000..2f1bc9cf67b --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch @@ -0,0 +1,56 @@ +From ff885b89cb79d32c0e023e4aae0b71a1da722ca2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:38 +0200 +Subject: ARM: dts: rockchip: Fix power-controller node names for rk3066a + +From: Elaine Zhang + +[ Upstream commit f2948781a72f0d8cf2adf31758c357f2f35e6c79 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3066a.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi +index 252750c97f97..bbc3bff50856 100644 +--- a/arch/arm/boot/dts/rk3066a.dtsi ++++ b/arch/arm/boot/dts/rk3066a.dtsi +@@ -755,7 +755,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- pd_vio@RK3066_PD_VIO { ++ power-domain@RK3066_PD_VIO { + reg = ; + clocks = <&cru ACLK_LCDC0>, + <&cru ACLK_LCDC1>, +@@ -782,7 +782,7 @@ + <&qos_rga>; + }; + +- pd_video@RK3066_PD_VIDEO { ++ power-domain@RK3066_PD_VIDEO { + reg = ; + clocks = <&cru ACLK_VDPU>, + <&cru ACLK_VEPU>, +@@ -791,7 +791,7 @@ + pm_qos = <&qos_vpu>; + }; + +- pd_gpu@RK3066_PD_GPU { ++ power-domain@RK3066_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch-30401 b/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch-30401 new file mode 100644 index 00000000000..b98a982b5f6 --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch-30401 @@ -0,0 +1,56 @@ +From 32827b08ed8c5a83e98354f11c5c3da906113d3b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:39 +0200 +Subject: ARM: dts: rockchip: Fix power-controller node names for rk3188 + +From: Elaine Zhang + +[ Upstream commit d3bcbcd396175ac26aa54919c0b31c7d2878fc24 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-3-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3188.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi +index 2c08ae60e4a1..b6bde9d12c2b 100644 +--- a/arch/arm/boot/dts/rk3188.dtsi ++++ b/arch/arm/boot/dts/rk3188.dtsi +@@ -699,7 +699,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- pd_vio@RK3188_PD_VIO { ++ power-domain@RK3188_PD_VIO { + reg = ; + clocks = <&cru ACLK_LCDC0>, + <&cru ACLK_LCDC1>, +@@ -721,7 +721,7 @@ + <&qos_rga>; + }; + +- pd_video@RK3188_PD_VIDEO { ++ power-domain@RK3188_PD_VIDEO { + reg = ; + clocks = <&cru ACLK_VDPU>, + <&cru ACLK_VEPU>, +@@ -730,7 +730,7 @@ + pm_qos = <&qos_vpu>; + }; + +- pd_gpu@RK3188_PD_GPU { ++ power-domain@RK3188_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch-9690 b/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch-9690 new file mode 100644 index 00000000000..009949b2a02 --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-power-controller-node-names-for.patch-9690 @@ -0,0 +1,65 @@ +From 431cde92588e3686aa660f52cb8df27bb0911aa7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:40 +0200 +Subject: ARM: dts: rockchip: Fix power-controller node names for rk3288 + +From: Elaine Zhang + +[ Upstream commit 970cdc53cb1afa73602028c103dbfb6a230080be ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-4-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3288.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 1e6594f8a293..d6dbfbd99568 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -765,7 +765,7 @@ + * *_HDMI HDMI + * *_MIPI_* MIPI + */ +- pd_vio@RK3288_PD_VIO { ++ power-domain@RK3288_PD_VIO { + reg = ; + clocks = <&cru ACLK_IEP>, + <&cru ACLK_ISP>, +@@ -807,7 +807,7 @@ + * Note: The following 3 are HEVC(H.265) clocks, + * and on the ACLK_HEVC_NIU (NOC). + */ +- pd_hevc@RK3288_PD_HEVC { ++ power-domain@RK3288_PD_HEVC { + reg = ; + clocks = <&cru ACLK_HEVC>, + <&cru SCLK_HEVC_CABAC>, +@@ -821,7 +821,7 @@ + * (video endecoder & decoder) clocks that on the + * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). + */ +- pd_video@RK3288_PD_VIDEO { ++ power-domain@RK3288_PD_VIDEO { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; +@@ -832,7 +832,7 @@ + * Note: ACLK_GPU is the GPU clock, + * and on the ACLK_GPU_NIU (NOC). + */ +- pd_gpu@RK3288_PD_GPU { ++ power-domain@RK3288_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu_r>, +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-supply-properties-in-io-domains.patch b/queue-5.13/arm-dts-rockchip-fix-supply-properties-in-io-domains.patch new file mode 100644 index 00000000000..bd311208a2c --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-supply-properties-in-io-domains.patch @@ -0,0 +1,55 @@ +From dbccb38580a2802074189be68f8b41bd50ddec3e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 6 Jun 2021 20:16:32 +0200 +Subject: ARM: dts: rockchip: fix supply properties in io-domains nodes + +From: Johan Jonker + +[ Upstream commit f07edc41220b14ce057a4e6d7161b30688ddb8a2 ] + +A test with rockchip-io-domain.yaml gives notifications +for supply properties in io-domains nodes. +Fix them all into ".*-supply$" format. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210606181632.13371-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +- + arch/arm/boot/dts/rk3288-vyasa.dts | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi +index 44bb5e6f83b1..76363b8afcb9 100644 +--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi ++++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi +@@ -218,7 +218,7 @@ + flash0-supply = <&vcc_flash>; + flash1-supply = <&vccio_pmu>; + gpio30-supply = <&vccio_pmu>; +- gpio1830 = <&vcc_io>; ++ gpio1830-supply = <&vcc_io>; + lcdc-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vcc_18>; +diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts +index aa50f8ed4ca0..b156a83eb7d7 100644 +--- a/arch/arm/boot/dts/rk3288-vyasa.dts ++++ b/arch/arm/boot/dts/rk3288-vyasa.dts +@@ -379,10 +379,10 @@ + audio-supply = <&vcc_18>; + bb-supply = <&vcc_io>; + dvp-supply = <&vcc_io>; +- flash0-suuply = <&vcc_18>; ++ flash0-supply = <&vcc_18>; + flash1-supply = <&vcc_lan>; + gpio30-supply = <&vcc_io>; +- gpio1830 = <&vcc_io>; ++ gpio1830-supply = <&vcc_io>; + lcdc-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vcc_18>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-the-timer-clocks-order.patch b/queue-5.13/arm-dts-rockchip-fix-the-timer-clocks-order.patch new file mode 100644 index 00000000000..abad62e7ff4 --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-the-timer-clocks-order.patch @@ -0,0 +1,65 @@ +From d9125ec98ab37bbea1fd2136b563667eb6b34090 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 May 2021 08:11:35 -0300 +Subject: ARM: dts: rockchip: Fix the timer clocks order + +From: Ezequiel Garcia + +[ Upstream commit 7b46d674ac000b101fdad92cf16cc11d90b72f86 ] + +Fixed order is the device-tree convention. +The timer driver currently gets clocks by name, +so no changes are needed there. + +Signed-off-by: Ezequiel Garcia +Link: https://lore.kernel.org/r/20210506111136.3941-3-ezequiel@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3188.dtsi | 8 ++++---- + arch/arm/boot/dts/rk3288.dtsi | 4 ++-- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi +index 2298a8d840ba..2c08ae60e4a1 100644 +--- a/arch/arm/boot/dts/rk3188.dtsi ++++ b/arch/arm/boot/dts/rk3188.dtsi +@@ -150,16 +150,16 @@ + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x2000e000 0x20>; + interrupts = ; +- clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>; +- clock-names = "timer", "pclk"; ++ clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>; ++ clock-names = "pclk", "timer"; + }; + + timer6: timer@200380a0 { + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x200380a0 0x20>; + interrupts = ; +- clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>; +- clock-names = "timer", "pclk"; ++ clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>; ++ clock-names = "pclk", "timer"; + }; + + i2s0: i2s@1011a000 { +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 24b903240cb3..1e6594f8a293 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -196,8 +196,8 @@ + compatible = "rockchip,rk3288-timer"; + reg = <0x0 0xff810000 0x0 0x20>; + interrupts = ; +- clocks = <&xin24m>, <&cru PCLK_TIMER>; +- clock-names = "timer", "pclk"; ++ clocks = <&cru PCLK_TIMER>, <&xin24m>; ++ clock-names = "pclk", "timer"; + }; + + display-subsystem { +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-rockchip-fix-thermal-sensor-cells-o-rk322x.patch b/queue-5.13/arm-dts-rockchip-fix-thermal-sensor-cells-o-rk322x.patch new file mode 100644 index 00000000000..95b79c84a86 --- /dev/null +++ b/queue-5.13/arm-dts-rockchip-fix-thermal-sensor-cells-o-rk322x.patch @@ -0,0 +1,36 @@ +From 7ab821577bb817f1f216f91b0c83b5800695b604 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 May 2021 14:55:11 -0300 +Subject: ARM: dts: rockchip: Fix thermal sensor cells o rk322x + +From: Ezequiel Garcia + +[ Upstream commit d5c24e20daf09587cbc221d40be1ba92673e8d94 ] + +The number of cells to be used with a thermal sensor specifier +must be "1". Fix this. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20210506175514.168365-2-ezequiel@collabora.com +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk322x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi +index 208f21245095..9f02ba7a0cc2 100644 +--- a/arch/arm/boot/dts/rk322x.dtsi ++++ b/arch/arm/boot/dts/rk322x.dtsi +@@ -517,7 +517,7 @@ + pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_pin>; +- #thermal-sensor-cells = <0>; ++ #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-drop-unused-linux-wakeup-from-touchscr.patch b/queue-5.13/arm-dts-stm32-drop-unused-linux-wakeup-from-touchscr.patch new file mode 100644 index 00000000000..c59136dbaec --- /dev/null +++ b/queue-5.13/arm-dts-stm32-drop-unused-linux-wakeup-from-touchscr.patch @@ -0,0 +1,41 @@ +From 3e640514f685dacd2b36511cdc9f10793616dde1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 10 Jun 2021 02:25:50 +0200 +Subject: ARM: dts: stm32: Drop unused linux,wakeup from touchscreen node on + DHCOM SoM + +From: Marek Vasut + +[ Upstream commit 5247a50c8b53ca214a488da648e1bb35c35c2597 ] + +Fix the following dtbs_check warning: +touchscreen@38: 'linux,wakeup' does not match any of the regexes: 'pinctrl-[0-9]+' + +Signed-off-by: Marek Vasut +Cc: Alexandre Torgue +Cc: Patrice Chotard +Cc: Patrick Delaunay +Cc: kernel@dh-electronics.com +Cc: linux-stm32@st-md-mailman.stormreply.com +To: linux-arm-kernel@lists.infradead.org +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi +index b8c8f0b284c3..c5ea08fec535 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi +@@ -187,7 +187,6 @@ + reg = <0x38>; + interrupt-parent = <&gpiog>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ +- linux,wakeup; + }; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch b/queue-5.13/arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch new file mode 100644 index 00000000000..ecc5c174aa7 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch @@ -0,0 +1,129 @@ +From 61e27caa98c306bae06a47bd5613d8e880f8c1ec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:25 +0200 +Subject: ARM: dts: stm32: fix gpio-keys node on STM32 MCU boards + +From: Alexandre Torgue + +[ Upstream commit bf24b91f4baf7e421c770a1d9c7d381b10206ac9 ] + +Fix following warning observed with "make dtbs_check W=1" command. +It concerns f429 eval and disco boards, f769 disco board. + +Warning (unit_address_vs_reg): /gpio_keys/button@0: node has a unit name, +but no reg or ranges property + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32429i-eval.dts | 8 +++----- + arch/arm/boot/dts/stm32746g-eval.dts | 6 ++---- + arch/arm/boot/dts/stm32f429-disco.dts | 6 ++---- + arch/arm/boot/dts/stm32f469-disco.dts | 6 ++---- + arch/arm/boot/dts/stm32f769-disco.dts | 6 ++---- + 5 files changed, 11 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts +index 7e10ae744c9d..9ac1ffe53413 100644 +--- a/arch/arm/boot/dts/stm32429i-eval.dts ++++ b/arch/arm/boot/dts/stm32429i-eval.dts +@@ -119,17 +119,15 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "Wake up"; + linux,code = ; + gpios = <&gpioa 0 0>; + }; +- button@1 { ++ button-1 { + label = "Tamper"; + linux,code = ; + gpios = <&gpioc 13 0>; +diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts +index ca8c192449ee..327613fd9666 100644 +--- a/arch/arm/boot/dts/stm32746g-eval.dts ++++ b/arch/arm/boot/dts/stm32746g-eval.dts +@@ -81,12 +81,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "Wake up"; + linux,code = ; + gpios = <&gpioc 13 0>; +diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts +index 3dc068b91ca1..075ac57d0bf4 100644 +--- a/arch/arm/boot/dts/stm32f429-disco.dts ++++ b/arch/arm/boot/dts/stm32f429-disco.dts +@@ -81,12 +81,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "User"; + linux,code = ; + gpios = <&gpioa 0 0>; +diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts +index 2e1b3bbbe4b5..8c982ae79f43 100644 +--- a/arch/arm/boot/dts/stm32f469-disco.dts ++++ b/arch/arm/boot/dts/stm32f469-disco.dts +@@ -104,12 +104,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "User"; + linux,code = ; + gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts +index 0ce7fbc20fa4..be943b701980 100644 +--- a/arch/arm/boot/dts/stm32f769-disco.dts ++++ b/arch/arm/boot/dts/stm32f769-disco.dts +@@ -75,12 +75,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "User"; + linux,code = ; + gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch b/queue-5.13/arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch new file mode 100644 index 00000000000..8649d4d1cb9 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch @@ -0,0 +1,36 @@ +From 99b4957704fb6e1aa6ca6f072d0846280e7b900b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:30 +0200 +Subject: ARM: dts: stm32: fix i2c node name on stm32f746 to prevent warnings + +From: Alexandre Torgue + +[ Upstream commit ad0ed10ba5792064fc3accbf8f0341152a57eecb ] + +Replace upper case by lower case in i2c nodes name. + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32f746.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi +index 72c1b76684b6..014b416f57e6 100644 +--- a/arch/arm/boot/dts/stm32f746.dtsi ++++ b/arch/arm/boot/dts/stm32f746.dtsi +@@ -360,9 +360,9 @@ + status = "disabled"; + }; + +- i2c3: i2c@40005C00 { ++ i2c3: i2c@40005c00 { + compatible = "st,stm32f7-i2c"; +- reg = <0x40005C00 0x400>; ++ reg = <0x40005c00 0x400>; + interrupts = <72>, + <73>; + resets = <&rcc STM32F7_APB1_RESET(I2C3)>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-ltdc-pinctrl-on-microdev2.0-of7.patch b/queue-5.13/arm-dts-stm32-fix-ltdc-pinctrl-on-microdev2.0-of7.patch new file mode 100644 index 00000000000..386b938ac95 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-ltdc-pinctrl-on-microdev2.0-of7.patch @@ -0,0 +1,36 @@ +From 4bad9a8cee37cd616bd3495e9ad029a058e2d82d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:37 +0200 +Subject: ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7 + +From: Alexandre Torgue + +[ Upstream commit 11aaf2a0f8f070e87833775965950157bf57e49a ] + +It prevents the following warning: + + pin-controller@50002000: 'ltdc' does not match any of the regexes: +'-[0-9]*$', '^gpio@[0-9a-f]*$', 'pinctrl-[0-9]+' + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + .../boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts +index 674b2d330dc4..5670b23812a2 100644 +--- a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts ++++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts +@@ -89,7 +89,7 @@ + }; + + &pinctrl { +- ltdc_pins: ltdc { ++ ltdc_pins: ltdc-0 { + pins { + pinmux = , /* LTDC_B2 */ + , /* LTDC_R6 */ +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch b/queue-5.13/arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch new file mode 100644 index 00000000000..c17bc40c83e --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch @@ -0,0 +1,36 @@ +From f1191b864306d48b79ae463abde10619ce14355e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:26 +0200 +Subject: ARM: dts: stm32: fix RCC node name on stm32f429 MCU + +From: Alexandre Torgue + +[ Upstream commit e4b948415a89a219d13e454011cdcf9e63ecc529 ] + +This prevent warning observed with "make dtbs_check W=1" + +Warning (simple_bus_reg): /soc/rcc@40023810: simple-bus unit address format +error, expected "40023800" + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32f429.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi +index f6530d724d00..41e0087bdbf9 100644 +--- a/arch/arm/boot/dts/stm32f429.dtsi ++++ b/arch/arm/boot/dts/stm32f429.dtsi +@@ -709,7 +709,7 @@ + status = "disabled"; + }; + +- rcc: rcc@40023810 { ++ rcc: rcc@40023800 { + #reset-cells = <1>; + #clock-cells = <2>; + compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-stm32mp157c-odyssey-card-detect-pi.patch b/queue-5.13/arm-dts-stm32-fix-stm32mp157c-odyssey-card-detect-pi.patch new file mode 100644 index 00000000000..8128b0c7375 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-stm32mp157c-odyssey-card-detect-pi.patch @@ -0,0 +1,40 @@ +From 7610d3a24d3ed3b51ac3d05beb353f943533e7b1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 10 Apr 2021 21:35:21 +0200 +Subject: ARM: dts: stm32: fix stm32mp157c-odyssey card detect pin +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Grzegorz Szymaszek + +[ Upstream commit 0171b07373cc8c2815ca5fa79a7308fdefa54ca4 ] + +The microSD card detect pin is physically connected to the MPU pin PI3. +The Device Tree configuration of the card detect pin was wrong—it was +set to pin PB7 instead. If such configuration was used, the kernel would +hang on “Waiting for root device” when booting from a microSD card. + +Signed-off-by: Grzegorz Szymaszek +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp157c-odyssey.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/stm32mp157c-odyssey.dts +index a7ffec8f1516..be1dd5e9e744 100644 +--- a/arch/arm/boot/dts/stm32mp157c-odyssey.dts ++++ b/arch/arm/boot/dts/stm32mp157c-odyssey.dts +@@ -64,7 +64,7 @@ + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; +- cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; ++ cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-stpmic-node-for-stm32mp1-boards.patch b/queue-5.13/arm-dts-stm32-fix-stpmic-node-for-stm32mp1-boards.patch new file mode 100644 index 00000000000..7ce99968901 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-stpmic-node-for-stm32mp1-boards.patch @@ -0,0 +1,162 @@ +From a6abecc98d3f579d61896632a3cbf294543ac47f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:33 +0200 +Subject: ARM: dts: stm32: fix stpmic node for stm32mp1 boards + +From: Alexandre Torgue + +[ Upstream commit 4bf4abe19089245b7b12f35e5cafb5477b3e2c48 ] + +On some STM32 MP15 boards, stpmic node is not correct which generates +warnings running "make dtbs_check W=1" command. Issues are: + +-"regulator-active-discharge" is not a boolean but an uint32. +-"regulator-over-current-protection" is not a valid entry for vref_ddr. +-LDO4 has a fixed voltage (3v3) so min/max entries are not allowed. + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp157a-stinger96.dtsi | 7 ++----- + arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi | 5 +---- + arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 5 +---- + arch/arm/boot/dts/stm32mp15xx-osd32.dtsi | 7 ++----- + 4 files changed, 6 insertions(+), 18 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi b/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi +index 113c48b2ef93..a4b14ef3caee 100644 +--- a/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi ++++ b/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi +@@ -184,8 +184,6 @@ + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; + interrupts = ; + }; + +@@ -208,7 +206,6 @@ + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; +- regulator-over-current-protection; + }; + + bst_out: boost { +@@ -219,13 +216,13 @@ + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; +- regulator-active-discharge; ++ regulator-active-discharge = <1>; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; +- regulator-active-discharge; ++ regulator-active-discharge = <1>; + }; + }; + +diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi +index b5601d270c8f..2d9461006810 100644 +--- a/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi ++++ b/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi +@@ -173,8 +173,6 @@ + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; + interrupts = ; + }; + +@@ -197,7 +195,6 @@ + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; +- regulator-over-current-protection; + }; + + bst_out: boost { +@@ -213,7 +210,7 @@ + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; +- regulator-active-discharge; ++ regulator-active-discharge = <1>; + }; + }; + +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +index 8f4fd3a06a31..2af0a6752674 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +@@ -333,8 +333,6 @@ + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; + interrupts = ; + }; + +@@ -356,7 +354,6 @@ + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; +- regulator-over-current-protection; + }; + + bst_out: boost { +@@ -372,7 +369,7 @@ + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; +- regulator-active-discharge; ++ regulator-active-discharge = <1>; + }; + }; + +diff --git a/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi +index 713485a95795..6706d8311a66 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-osd32.dtsi +@@ -146,8 +146,6 @@ + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; + interrupts = ; + }; + +@@ -171,7 +169,6 @@ + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; +- regulator-over-current-protection; + }; + + bst_out: boost { +@@ -182,13 +179,13 @@ + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; +- regulator-active-discharge; ++ regulator-active-discharge = <1>; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; +- regulator-active-discharge; ++ regulator-active-discharge = <1>; + }; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-the-odyssey-som-emmc-vqmmc-supply.patch b/queue-5.13/arm-dts-stm32-fix-the-odyssey-som-emmc-vqmmc-supply.patch new file mode 100644 index 00000000000..3d2bd19430f --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-the-odyssey-som-emmc-vqmmc-supply.patch @@ -0,0 +1,40 @@ +From 0ccfeab01bdd0f560054f9712d81d9f48ccb9d73 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 3 Jun 2021 17:40:48 +0200 +Subject: ARM: dts: stm32: fix the Odyssey SoM eMMC VQMMC supply +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Grzegorz Szymaszek + +[ Upstream commit f493162319788802b6a49634f7268e691b4c10ec ] + +The Seeed SoM-STM32MP157C device tree had the eMMC’s (SDMMC2) VQMMC +supply set to v3v3 (buck4), the same as the VMMC supply. That was +incorrect, as on the SoM, the VQMMC supply is provided from vdd (buck3) +instead. + +Signed-off-by: Grzegorz Szymaszek +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi +index 6cf49a0a9e69..b5601d270c8f 100644 +--- a/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi ++++ b/arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi +@@ -269,7 +269,7 @@ + st,neg-edge; + bus-width = <8>; + vmmc-supply = <&v3v3>; +- vqmmc-supply = <&v3v3>; ++ vqmmc-supply = <&vdd>; + mmc-ddr-3_3v; + status = "okay"; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch b/queue-5.13/arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch new file mode 100644 index 00000000000..4bad935894c --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch @@ -0,0 +1,128 @@ +From 80ef590eb6056deb71798f7d323332e029de3c9f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:27 +0200 +Subject: ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings + +From: Alexandre Torgue + +[ Upstream commit 2388f14d8747f8304e26ee870790e188c9431efd ] + +Prevent warning seen with "make dtbs_check W=1" command: + +Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary +address-cells/size-cells without "ranges" or child "reg" property + +Reviewed-by: Fabrice Gasnier +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32f429.dtsi | 8 -------- + arch/arm/boot/dts/stm32f746.dtsi | 8 -------- + arch/arm/boot/dts/stm32h743.dtsi | 4 ---- + 3 files changed, 20 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi +index 41e0087bdbf9..8748d5850298 100644 +--- a/arch/arm/boot/dts/stm32f429.dtsi ++++ b/arch/arm/boot/dts/stm32f429.dtsi +@@ -283,8 +283,6 @@ + }; + + timers13: timers@40001c00 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40001C00 0x400>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>; +@@ -299,8 +297,6 @@ + }; + + timers14: timers@40002000 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40002000 0x400>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>; +@@ -633,8 +629,6 @@ + }; + + timers10: timers@40014400 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014400 0x400>; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>; +@@ -649,8 +643,6 @@ + }; + + timers11: timers@40014800 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014800 0x400>; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>; +diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi +index e1df603fc981..72c1b76684b6 100644 +--- a/arch/arm/boot/dts/stm32f746.dtsi ++++ b/arch/arm/boot/dts/stm32f746.dtsi +@@ -265,8 +265,6 @@ + }; + + timers13: timers@40001c00 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40001C00 0x400>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>; +@@ -281,8 +279,6 @@ + }; + + timers14: timers@40002000 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40002000 0x400>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>; +@@ -531,8 +527,6 @@ + }; + + timers10: timers@40014400 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014400 0x400>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>; +@@ -547,8 +541,6 @@ + }; + + timers11: timers@40014800 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014800 0x400>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>; +diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi +index 05ecdf9ff03a..6e42ca2dada2 100644 +--- a/arch/arm/boot/dts/stm32h743.dtsi ++++ b/arch/arm/boot/dts/stm32h743.dtsi +@@ -485,8 +485,6 @@ + }; + + lptimer4: timer@58002c00 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58002c00 0x400>; + clocks = <&rcc LPTIM4_CK>; +@@ -501,8 +499,6 @@ + }; + + lptimer5: timer@58003000 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58003000 0x400>; + clocks = <&rcc LPTIM5_CK>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-fix-touchscreen-node-on-dhcom-pdk2.patch b/queue-5.13/arm-dts-stm32-fix-touchscreen-node-on-dhcom-pdk2.patch new file mode 100644 index 00000000000..f5777137d5e --- /dev/null +++ b/queue-5.13/arm-dts-stm32-fix-touchscreen-node-on-dhcom-pdk2.patch @@ -0,0 +1,42 @@ +From 2666427bb61f282d9573c62762871dfa56b9b8f4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 26 Apr 2021 17:00:13 +0200 +Subject: ARM: dts: stm32: Fix touchscreen node on dhcom-pdk2 + +From: Marek Vasut + +[ Upstream commit 4b5fadef3fc2ab8863ffdf31eed6a745b1bf6e61 ] + +Fix make dtbs_check warning: +arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml:0:0: /soc/i2c@40015000/polytouch@38: failed to match any schema with compatible: ['edt,edt-ft5x06'] + +Signed-off-by: Marek Vasut +Cc: Alexandre Torgue +Cc: Patrice Chotard +Cc: Patrick Delaunay +Cc: linux-stm32@st-md-mailman.stormreply.com +To: linux-arm-kernel@lists.infradead.org +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi +index 0fbf9913e8df..b8c8f0b284c3 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi +@@ -182,8 +182,8 @@ + + }; + +- polytouch@38 { +- compatible = "edt,edt-ft5x06"; ++ touchscreen@38 { ++ compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&gpiog>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch b/queue-5.13/arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch new file mode 100644 index 00000000000..fc6ca15dae7 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch @@ -0,0 +1,53 @@ +From bd83779eb53a531c2e41cdcd10d8da734aceee81 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:31 +0200 +Subject: ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15 + +From: Alexandre Torgue + +[ Upstream commit fb1406335c067be074eab38206cf9abfdce2fb0b ] + +It fixes the following warning seen running "make dtbs_check W=1" + +Warning (simple_bus_reg): /soc/stmmac-axi-config: missing or empty +reg/ranges property + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp151.dtsi | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi +index fcd3230c469b..23234f950de6 100644 +--- a/arch/arm/boot/dts/stm32mp151.dtsi ++++ b/arch/arm/boot/dts/stm32mp151.dtsi +@@ -1416,12 +1416,6 @@ + status = "disabled"; + }; + +- stmmac_axi_config_0: stmmac-axi-config { +- snps,wr_osr_lmt = <0x7>; +- snps,rd_osr_lmt = <0x7>; +- snps,blen = <0 0 0 0 16 8 4>; +- }; +- + ethernet0: ethernet@5800a000 { + compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; + reg = <0x5800a000 0x2000>; +@@ -1447,6 +1441,12 @@ + snps,axi-config = <&stmmac_axi_config_0>; + snps,tso; + status = "disabled"; ++ ++ stmmac_axi_config_0: stmmac-axi-config { ++ snps,wr_osr_lmt = <0x7>; ++ snps,rd_osr_lmt = <0x7>; ++ snps,blen = <0 0 0 0 16 8 4>; ++ }; + }; + + usbh_ohci: usb@5800c000 { +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-remove-extra-size-cells-on-dhcom-pdk2.patch b/queue-5.13/arm-dts-stm32-remove-extra-size-cells-on-dhcom-pdk2.patch new file mode 100644 index 00000000000..f15d67c865a --- /dev/null +++ b/queue-5.13/arm-dts-stm32-remove-extra-size-cells-on-dhcom-pdk2.patch @@ -0,0 +1,50 @@ +From c7af210b000d9038c33a0bae2ddc58844e0dc253 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 26 Apr 2021 17:00:12 +0200 +Subject: ARM: dts: stm32: Remove extra size-cells on dhcom-pdk2 + +From: Marek Vasut + +[ Upstream commit 28b9a4679d8074512f12967497c161b992eb3b75 ] + +Fix make dtbs_check warning: +arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml: gpio-keys-polled: '#address-cells' is a dependency of '#size-cells' +arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml: gpio-keys: '#address-cells' is a dependency of '#size-cells' + +Signed-off-by: Marek Vasut +Cc: Alexandre Torgue +Cc: Patrice Chotard +Cc: Patrick Delaunay +Cc: linux-stm32@st-md-mailman.stormreply.com +To: linux-arm-kernel@lists.infradead.org + +Signed-off-by: Marek Vasut +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi +index 5523f4138fd6..0fbf9913e8df 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi +@@ -34,7 +34,6 @@ + + gpio-keys-polled { + compatible = "gpio-keys-polled"; +- #size-cells = <0>; + poll-interval = <20>; + + /* +@@ -60,7 +59,6 @@ + + gpio-keys { + compatible = "gpio-keys"; +- #size-cells = <0>; + + button-1 { + label = "TA2-GPIO-B"; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-rename-eth-n-to-ethernet-n-on-dhcom-so.patch b/queue-5.13/arm-dts-stm32-rename-eth-n-to-ethernet-n-on-dhcom-so.patch new file mode 100644 index 00000000000..57c95a04622 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-rename-eth-n-to-ethernet-n-on-dhcom-so.patch @@ -0,0 +1,41 @@ +From 128f54fac2578b9c0d1be9a0400c6a3c44472303 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 10 Jun 2021 02:25:51 +0200 +Subject: ARM: dts: stm32: Rename eth@N to ethernet@N on DHCOM SoM + +From: Marek Vasut + +[ Upstream commit b586250df24226f8a257e11e1f5953054c54fd35 ] + +Fix the following dtbs_check warning: +eth@1,0: $nodename:0: 'eth@1,0' does not match '^ethernet(@.*)?$' + +Signed-off-by: Marek Vasut +Cc: Alexandre Torgue +Cc: Patrice Chotard +Cc: Patrick Delaunay +Cc: kernel@dh-electronics.com +Cc: linux-stm32@st-md-mailman.stormreply.com +To: linux-arm-kernel@lists.infradead.org +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +index 31d08423a32f..c3e3466dacaa 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +@@ -150,7 +150,7 @@ + pinctrl-1 = <&fmc_sleep_pins_b>; + status = "okay"; + +- ksz8851: ks8851mll@1,0 { ++ ksz8851: ethernet@1,0 { + compatible = "micrel,ks8851-mll"; + reg = <1 0x0 0x2>, <1 0x2 0x20000>; + interrupt-parent = <&gpioc>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-stm32-rename-spi-flash-mx66l51235l-n-to-flas.patch b/queue-5.13/arm-dts-stm32-rename-spi-flash-mx66l51235l-n-to-flas.patch new file mode 100644 index 00000000000..1c831d03387 --- /dev/null +++ b/queue-5.13/arm-dts-stm32-rename-spi-flash-mx66l51235l-n-to-flas.patch @@ -0,0 +1,56 @@ +From debf7ea2b5976805180d9a5b59621917676af143 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 10 Jun 2021 02:25:52 +0200 +Subject: ARM: dts: stm32: Rename spi-flash/mx66l51235l@N to flash@N on DHCOM + SoM + +From: Marek Vasut + +[ Upstream commit 9b8a9b389d8464e1ca5a4e92c6a4422844ad4ef3 ] + +Fix the following dtbs_check warning: +spi-flash@0: $nodename:0: 'spi-flash@0' does not match '^flash(@.*)?$' + +Signed-off-by: Marek Vasut +Cc: Alexandre Torgue +Cc: Patrice Chotard +Cc: Patrick Delaunay +Cc: kernel@dh-electronics.com +Cc: linux-stm32@st-md-mailman.stormreply.com +To: linux-arm-kernel@lists.infradead.org +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 2 +- + arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +index c3e3466dacaa..8f4fd3a06a31 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +@@ -437,7 +437,7 @@ + #size-cells = <0>; + status = "okay"; + +- flash0: mx66l51235l@0 { ++ flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; +diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi +index 013ae369791d..2b0ac605549d 100644 +--- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi ++++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi +@@ -198,7 +198,7 @@ + #size-cells = <0>; + status = "okay"; + +- flash0: spi-flash@0 { ++ flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-ux500-fix-interrupt-cells.patch b/queue-5.13/arm-dts-ux500-fix-interrupt-cells.patch new file mode 100644 index 00000000000..2032f6e7423 --- /dev/null +++ b/queue-5.13/arm-dts-ux500-fix-interrupt-cells.patch @@ -0,0 +1,126 @@ +From ec2e244485fb80a941b90c80d8e51befd63318f6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 01:03:16 +0200 +Subject: ARM: dts: ux500: Fix interrupt cells + +From: Sebastian Reichel + +[ Upstream commit e4ff0112a03c2e353c8457cd33c88feb89dfec41 ] + +Fix interrupt cells in DT AB8500/AB8505 source files. The +compiled DTB files will stay the same. + +Signed-off-by: Sebastian Reichel +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/ste-ab8500.dtsi | 26 +++++++++++++------------- + arch/arm/boot/dts/ste-ab8505.dtsi | 22 +++++++++++----------- + 2 files changed, 24 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/boot/dts/ste-ab8500.dtsi b/arch/arm/boot/dts/ste-ab8500.dtsi +index a16a00fb5fa5..f78b41002490 100644 +--- a/arch/arm/boot/dts/ste-ab8500.dtsi ++++ b/arch/arm/boot/dts/ste-ab8500.dtsi +@@ -42,15 +42,15 @@ + + ab8500-rtc { + compatible = "stericsson,ab8500-rtc"; +- interrupts = <17 IRQ_TYPE_LEVEL_HIGH +- 18 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, ++ <18 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "60S", "ALARM"; + }; + + gpadc: ab8500-gpadc { + compatible = "stericsson,ab8500-gpadc"; +- interrupts = <32 IRQ_TYPE_LEVEL_HIGH +- 39 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <32 IRQ_TYPE_LEVEL_HIGH>, ++ <39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "HW_CONV_END", "SW_CONV_END"; + vddadc-supply = <&ab8500_ldo_tvout_reg>; + #address-cells = <1>; +@@ -219,13 +219,13 @@ + + ab8500_usb { + compatible = "stericsson,ab8500-usb"; +- interrupts = < 90 IRQ_TYPE_LEVEL_HIGH +- 96 IRQ_TYPE_LEVEL_HIGH +- 14 IRQ_TYPE_LEVEL_HIGH +- 15 IRQ_TYPE_LEVEL_HIGH +- 79 IRQ_TYPE_LEVEL_HIGH +- 74 IRQ_TYPE_LEVEL_HIGH +- 75 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <90 IRQ_TYPE_LEVEL_HIGH>, ++ <96 IRQ_TYPE_LEVEL_HIGH>, ++ <14 IRQ_TYPE_LEVEL_HIGH>, ++ <15 IRQ_TYPE_LEVEL_HIGH>, ++ <79 IRQ_TYPE_LEVEL_HIGH>, ++ <74 IRQ_TYPE_LEVEL_HIGH>, ++ <75 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ID_WAKEUP_R", + "ID_WAKEUP_F", + "VBUS_DET_F", +@@ -242,8 +242,8 @@ + + ab8500-ponkey { + compatible = "stericsson,ab8500-poweron-key"; +- interrupts = <6 IRQ_TYPE_LEVEL_HIGH +- 7 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>, ++ <7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ONKEY_DBF", "ONKEY_DBR"; + }; + +diff --git a/arch/arm/boot/dts/ste-ab8505.dtsi b/arch/arm/boot/dts/ste-ab8505.dtsi +index cc045b2fc217..3380afa74c14 100644 +--- a/arch/arm/boot/dts/ste-ab8505.dtsi ++++ b/arch/arm/boot/dts/ste-ab8505.dtsi +@@ -39,8 +39,8 @@ + + ab8500-rtc { + compatible = "stericsson,ab8500-rtc"; +- interrupts = <17 IRQ_TYPE_LEVEL_HIGH +- 18 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, ++ <18 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "60S", "ALARM"; + }; + +@@ -182,13 +182,13 @@ + + ab8500_usb: ab8500_usb { + compatible = "stericsson,ab8500-usb"; +- interrupts = < 90 IRQ_TYPE_LEVEL_HIGH +- 96 IRQ_TYPE_LEVEL_HIGH +- 14 IRQ_TYPE_LEVEL_HIGH +- 15 IRQ_TYPE_LEVEL_HIGH +- 79 IRQ_TYPE_LEVEL_HIGH +- 74 IRQ_TYPE_LEVEL_HIGH +- 75 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <90 IRQ_TYPE_LEVEL_HIGH>, ++ <96 IRQ_TYPE_LEVEL_HIGH>, ++ <14 IRQ_TYPE_LEVEL_HIGH>, ++ <15 IRQ_TYPE_LEVEL_HIGH>, ++ <79 IRQ_TYPE_LEVEL_HIGH>, ++ <74 IRQ_TYPE_LEVEL_HIGH>, ++ <75 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ID_WAKEUP_R", + "ID_WAKEUP_F", + "VBUS_DET_F", +@@ -205,8 +205,8 @@ + + ab8500-ponkey { + compatible = "stericsson,ab8500-poweron-key"; +- interrupts = <6 IRQ_TYPE_LEVEL_HIGH +- 7 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>, ++ <7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ONKEY_DBF", "ONKEY_DBR"; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-ux500-fix-orientation-of-accelerometer.patch b/queue-5.13/arm-dts-ux500-fix-orientation-of-accelerometer.patch new file mode 100644 index 00000000000..aadb5a7767c --- /dev/null +++ b/queue-5.13/arm-dts-ux500-fix-orientation-of-accelerometer.patch @@ -0,0 +1,35 @@ +From 33f8b5db2a11b9cd01dc29d6d05c8369fad36d9b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 15 May 2021 02:02:34 +0200 +Subject: ARM: dts: ux500: Fix orientation of accelerometer + +From: Linus Walleij + +[ Upstream commit 4beba4011995a2c44ee27e1d358dc32e6b9211b3 ] + +This adds a mounting matrix to the accelerometer +on the TVK1281618 R3. + +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi b/arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi +index 70f058352efc..511e097cc33e 100644 +--- a/arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi ++++ b/arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi +@@ -89,6 +89,9 @@ + <19 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&accel_tvk_mode>; ++ mount-matrix = "0", "-1", "0", ++ "-1", "0", "0", ++ "0", "0", "-1"; + }; + magnetometer@1e { + compatible = "st,lsm303dlm-magn"; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-ux500-fix-orientation-of-janice-acceleromete.patch b/queue-5.13/arm-dts-ux500-fix-orientation-of-janice-acceleromete.patch new file mode 100644 index 00000000000..d47e9255845 --- /dev/null +++ b/queue-5.13/arm-dts-ux500-fix-orientation-of-janice-acceleromete.patch @@ -0,0 +1,39 @@ +From 163a923693633dd168bf74d1a79ccc7d52c4094a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 May 2021 01:14:29 +0200 +Subject: ARM: dts: ux500: Fix orientation of Janice accelerometer + +From: Linus Walleij + +[ Upstream commit e409c1e1d5cb164361229e3a3f084e4a32544fb6 ] + +This fixes up the axis on the Janice accelerometer to give +the right orientation according to tests. + +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/ste-ux500-samsung-janice.dts | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts +index eaf8039d10ad..25af066f6f3a 100644 +--- a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts ++++ b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts +@@ -583,10 +583,9 @@ + accelerometer@08 { + compatible = "bosch,bma222"; + reg = <0x08>; +- /* FIXME: no idea about this */ +- mount-matrix = "1", "0", "0", +- "0", "1", "0", +- "0", "0", "1"; ++ mount-matrix = "0", "1", "0", ++ "-1", "0", "0", ++ "0", "0", "-1"; + vddio-supply = <&ab8500_ldo_aux2_reg>; // 1.8V + vdd-supply = <&ab8500_ldo_aux1_reg>; // 3V + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-ux500-fix-some-compatible-strings.patch b/queue-5.13/arm-dts-ux500-fix-some-compatible-strings.patch new file mode 100644 index 00000000000..271973f2171 --- /dev/null +++ b/queue-5.13/arm-dts-ux500-fix-some-compatible-strings.patch @@ -0,0 +1,88 @@ +From 29cecee7bc2644124d19f8ded5f6196224c21556 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 18 Mar 2021 09:27:58 +0100 +Subject: ARM: dts: ux500: Fix some compatible strings + +From: Linus Walleij + +[ Upstream commit 59ba546d1662c4beb738725965041f350afe24b4 ] + +The Golden and Skomer phones have BCM4334 WLAN+BT chips, +so make the compatible strings reflect the new available +bindings for these. + +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/ste-ux500-samsung-golden.dts | 3 ++- + arch/arm/boot/dts/ste-ux500-samsung-janice.dts | 4 ++-- + arch/arm/boot/dts/ste-ux500-samsung-skomer.dts | 3 ++- + 3 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts +index 0d43ee6583cf..40df7c61bf69 100644 +--- a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts ++++ b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts +@@ -121,7 +121,7 @@ + #size-cells = <0>; + + wifi@1 { +- compatible = "brcm,bcm4329-fmac"; ++ compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + /* GPIO216 (WLAN_HOST_WAKE) */ +@@ -162,6 +162,7 @@ + pinctrl-1 = <&u0_a_1_sleep>; + + bluetooth { ++ /* BCM4334B0 actually */ + compatible = "brcm,bcm4330-bt"; + /* GPIO222 (BT_VREG_ON) */ + shutdown-gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts +index f24369873ce2..eaf8039d10ad 100644 +--- a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts ++++ b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts +@@ -401,8 +401,7 @@ + status = "okay"; + + wifi@1 { +- /* Actually BRCM4330 */ +- compatible = "brcm,bcm4329-fmac"; ++ compatible = "brcm,bcm4330-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + /* GPIO216 WL_HOST_WAKE */ + interrupt-parent = <&gpio6>; +@@ -436,6 +435,7 @@ + status = "okay"; + + bluetooth { ++ /* BCM4330B1 actually */ + compatible = "brcm,bcm4330-bt"; + /* GPIO222 rail BT_VREG_EN to BT_REG_ON */ + shutdown-gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts b/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts +index d28a00757d0b..94afd7a0fe1f 100644 +--- a/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts ++++ b/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts +@@ -211,7 +211,7 @@ + #size-cells = <0>; + + wifi@1 { +- compatible = "brcm,bcm4329-fmac"; ++ compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + /* GPIO216 WL_HOST_WAKE */ + interrupt-parent = <&gpio6>; +@@ -247,6 +247,7 @@ + + /* FIXME: not quite working yet, probably needs regulators */ + bluetooth { ++ /* BCM4334B0 actually */ + compatible = "brcm,bcm4330-bt"; + shutdown-gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; +-- +2.30.2 + diff --git a/queue-5.13/arm-dts-ux500-rename-gpio-controller-node.patch b/queue-5.13/arm-dts-ux500-rename-gpio-controller-node.patch new file mode 100644 index 00000000000..fad19b62817 --- /dev/null +++ b/queue-5.13/arm-dts-ux500-rename-gpio-controller-node.patch @@ -0,0 +1,92 @@ +From 2c4576d3fecfcf974caac29012a65e864152d269 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 01:03:17 +0200 +Subject: ARM: dts: ux500: Rename gpio-controller node + +From: Sebastian Reichel + +[ Upstream commit 4917b702818872fdf2a9973705af3aa7d3d1f19e ] + +Rename the AB8500 gpio controller node from ab8500-gpio to +ab8500-gpiocontroller, since -gpio is a common suffix for +gpio consumers. + +Signed-off-by: Sebastian Reichel +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/ste-ab8500.dtsi | 2 +- + arch/arm/boot/dts/ste-ab8505.dtsi | 2 +- + arch/arm/boot/dts/ste-href-ab8500.dtsi | 2 +- + arch/arm/boot/dts/ste-href.dtsi | 2 +- + arch/arm/boot/dts/ste-snowball.dts | 2 +- + 5 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/ste-ab8500.dtsi b/arch/arm/boot/dts/ste-ab8500.dtsi +index f78b41002490..d0fe3f9aa183 100644 +--- a/arch/arm/boot/dts/ste-ab8500.dtsi ++++ b/arch/arm/boot/dts/ste-ab8500.dtsi +@@ -34,7 +34,7 @@ + #clock-cells = <1>; + }; + +- ab8500_gpio: ab8500-gpio { ++ ab8500_gpio: ab8500-gpiocontroller { + compatible = "stericsson,ab8500-gpio"; + gpio-controller; + #gpio-cells = <2>; +diff --git a/arch/arm/boot/dts/ste-ab8505.dtsi b/arch/arm/boot/dts/ste-ab8505.dtsi +index 3380afa74c14..0defc15b9bbc 100644 +--- a/arch/arm/boot/dts/ste-ab8505.dtsi ++++ b/arch/arm/boot/dts/ste-ab8505.dtsi +@@ -31,7 +31,7 @@ + #clock-cells = <1>; + }; + +- ab8505_gpio: ab8505-gpio { ++ ab8505_gpio: ab8505-gpiocontroller { + compatible = "stericsson,ab8505-gpio"; + gpio-controller; + #gpio-cells = <2>; +diff --git a/arch/arm/boot/dts/ste-href-ab8500.dtsi b/arch/arm/boot/dts/ste-href-ab8500.dtsi +index 4946743de7b9..3ccb7b5c7162 100644 +--- a/arch/arm/boot/dts/ste-href-ab8500.dtsi ++++ b/arch/arm/boot/dts/ste-href-ab8500.dtsi +@@ -9,7 +9,7 @@ + soc { + prcmu@80157000 { + ab8500 { +- ab8500-gpio { ++ ab8500-gpiocontroller { + /* Hog a few default settings */ + pinctrl-names = "default"; + pinctrl-0 = <&gpio2_default_mode>, +diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi +index 13d216192904..c97e8d29004f 100644 +--- a/arch/arm/boot/dts/ste-href.dtsi ++++ b/arch/arm/boot/dts/ste-href.dtsi +@@ -209,7 +209,7 @@ + + prcmu@80157000 { + ab8500 { +- ab8500-gpio { ++ ab8500-gpiocontroller { + }; + + ab8500_usb { +diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts +index b344b3748143..40f1d7c9c1d4 100644 +--- a/arch/arm/boot/dts/ste-snowball.dts ++++ b/arch/arm/boot/dts/ste-snowball.dts +@@ -376,7 +376,7 @@ + + prcmu@80157000 { + ab8500 { +- ab8500-gpio { ++ ab8500-gpiocontroller { + /* + * AB8500 GPIOs are numbered starting from 1, so the first + * index 0 is what in the datasheet is called "GPIO1", and +-- +2.30.2 + diff --git a/queue-5.13/arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch b/queue-5.13/arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch new file mode 100644 index 00000000000..0cda3254ee9 --- /dev/null +++ b/queue-5.13/arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch @@ -0,0 +1,44 @@ +From dd0ea45ae6fb63fcd8c4630c59afdc3b94e83fa7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 24 Apr 2021 14:37:28 +0200 +Subject: ARM: imx: pm-imx5: Fix references to imx5_cpu_suspend_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jonathan Neuschäfer + +[ Upstream commit 89b759469d525f4d5f9c29cd3b1f490311c67f85 ] + +The name of the struct, as defined in arch/arm/mach-imx/pm-imx5.c, +is imx5_cpu_suspend_info. + +Signed-off-by: Jonathan Neuschäfer +Reviewed-by: Fabio Estevam +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/mach-imx/suspend-imx53.S | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-imx/suspend-imx53.S b/arch/arm/mach-imx/suspend-imx53.S +index 41b8aad65363..46570ec2fbcf 100644 +--- a/arch/arm/mach-imx/suspend-imx53.S ++++ b/arch/arm/mach-imx/suspend-imx53.S +@@ -28,11 +28,11 @@ + * ^ + * ^ + * imx53_suspend code +- * PM_INFO structure(imx53_suspend_info) ++ * PM_INFO structure(imx5_cpu_suspend_info) + * ======================== low address ======================= + */ + +-/* Offsets of members of struct imx53_suspend_info */ ++/* Offsets of members of struct imx5_cpu_suspend_info */ + #define SUSPEND_INFO_MX53_M4IF_V_OFFSET 0x0 + #define SUSPEND_INFO_MX53_IOMUXC_V_OFFSET 0x4 + #define SUSPEND_INFO_MX53_IO_COUNT_OFFSET 0x8 +-- +2.30.2 + diff --git a/queue-5.13/arm-nsp-dts-fix-nand-nodes-names.patch b/queue-5.13/arm-nsp-dts-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..8e1fae860f9 --- /dev/null +++ b/queue-5.13/arm-nsp-dts-fix-nand-nodes-names.patch @@ -0,0 +1,165 @@ +From afa67a3c5ba9a3fc7a57673dd17bcb38ebd279bb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:51 +0200 +Subject: ARM: NSP: dts: fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit 0484594be733d5cdf976f55a2d4e8d887f351b69 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 2 +- + arch/arm/boot/dts/bcm958522er.dts | 4 ++-- + arch/arm/boot/dts/bcm958525er.dts | 4 ++-- + arch/arm/boot/dts/bcm958525xmc.dts | 4 ++-- + arch/arm/boot/dts/bcm958622hr.dts | 4 ++-- + arch/arm/boot/dts/bcm958623hr.dts | 4 ++-- + arch/arm/boot/dts/bcm958625hr.dts | 4 ++-- + arch/arm/boot/dts/bcm958625k.dts | 4 ++-- + arch/arm/boot/dts/bcm988312hr.dts | 4 ++-- + 9 files changed, 17 insertions(+), 17 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi +index b4d2cc70afb1..748df7955ae6 100644 +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -269,7 +269,7 @@ + dma-coherent; + }; + +- nand: nand@26000 { ++ nand_controller: nand-controller@26000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x026000 0x600>, + <0x11b408 0x600>, +diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts +index 5443fc079e6e..1f73885ec274 100644 +--- a/arch/arm/boot/dts/bcm958522er.dts ++++ b/arch/arm/boot/dts/bcm958522er.dts +@@ -74,8 +74,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts +index e1e3c26cef19..b6b9ca8b0972 100644 +--- a/arch/arm/boot/dts/bcm958525er.dts ++++ b/arch/arm/boot/dts/bcm958525er.dts +@@ -74,8 +74,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts +index f161ba2e7e5e..ecf426f6ad5d 100644 +--- a/arch/arm/boot/dts/bcm958525xmc.dts ++++ b/arch/arm/boot/dts/bcm958525xmc.dts +@@ -90,8 +90,8 @@ + }; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts +index 83cb877d63db..8ca18da981ad 100644 +--- a/arch/arm/boot/dts/bcm958622hr.dts ++++ b/arch/arm/boot/dts/bcm958622hr.dts +@@ -78,8 +78,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts +index 4e106ce1384a..9747378db531 100644 +--- a/arch/arm/boot/dts/bcm958623hr.dts ++++ b/arch/arm/boot/dts/bcm958623hr.dts +@@ -78,8 +78,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts +index cda6cc281e18..0f92b773afb8 100644 +--- a/arch/arm/boot/dts/bcm958625hr.dts ++++ b/arch/arm/boot/dts/bcm958625hr.dts +@@ -89,8 +89,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts +index ffbff0014c65..9e984ca0e6df 100644 +--- a/arch/arm/boot/dts/bcm958625k.dts ++++ b/arch/arm/boot/dts/bcm958625k.dts +@@ -68,8 +68,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts +index 3fd39c479a3c..5475dab8181d 100644 +--- a/arch/arm/boot/dts/bcm988312hr.dts ++++ b/arch/arm/boot/dts/bcm988312hr.dts +@@ -74,8 +74,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +-- +2.30.2 + diff --git a/queue-5.13/arm-omap2-block-suspend-for-am3-and-am4-if-pm-is-not.patch b/queue-5.13/arm-omap2-block-suspend-for-am3-and-am4-if-pm-is-not.patch new file mode 100644 index 00000000000..55e0b1a5d39 --- /dev/null +++ b/queue-5.13/arm-omap2-block-suspend-for-am3-and-am4-if-pm-is-not.patch @@ -0,0 +1,94 @@ +From 58bbabcf141627953ca6129175f046cde67e528f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 12:33:11 +0300 +Subject: ARM: OMAP2+: Block suspend for am3 and am4 if PM is not configured + +From: Tony Lindgren + +[ Upstream commit 093a474ce10d8ea3db3ef2922aca5a38f34bab1b ] + +If the PM related modules are not loaded and PM firmware not configured, +the system suspend fails to resume. Let's fix this by adding initial +platform_suspend_ops to block suspend and warn about missing modules. + +When pm33xx and wkup_m3_ipc have been loaded and m3 coprocessor booted +with it's firmware, pm33xx sets up working platform_suspend_ops. Note +that we need to configure at least PM_SUSPEND_STANDBY to have +suspend_set_ops(). + +Cc: Dave Gerlach +Cc: Suman Anna +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/mach-omap2/pm33xx-core.c | 40 +++++++++++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + +diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c +index 56f2c0bcae5a..bf0d25fd2cea 100644 +--- a/arch/arm/mach-omap2/pm33xx-core.c ++++ b/arch/arm/mach-omap2/pm33xx-core.c +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -324,6 +325,44 @@ static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void) + return NULL; + } + ++#ifdef CONFIG_SUSPEND ++/* ++ * Block system suspend initially. Later on pm33xx sets up it's own ++ * platform_suspend_ops after probe. That depends also on loaded ++ * wkup_m3_ipc and booted am335x-pm-firmware.elf. ++ */ ++static int amx3_suspend_block(suspend_state_t state) ++{ ++ pr_warn("PM not initialized for pm33xx, wkup_m3_ipc, or am335x-pm-firmware.elf\n"); ++ ++ return -EINVAL; ++} ++ ++static int amx3_pm_valid(suspend_state_t state) ++{ ++ switch (state) { ++ case PM_SUSPEND_STANDBY: ++ return 1; ++ default: ++ return 0; ++ } ++} ++ ++static const struct platform_suspend_ops amx3_blocked_pm_ops = { ++ .begin = amx3_suspend_block, ++ .valid = amx3_pm_valid, ++}; ++ ++static void __init amx3_block_suspend(void) ++{ ++ suspend_set_ops(&amx3_blocked_pm_ops); ++} ++#else ++static inline void amx3_block_suspend(void) ++{ ++} ++#endif /* CONFIG_SUSPEND */ ++ + int __init amx3_common_pm_init(void) + { + struct am33xx_pm_platform_data *pdata; +@@ -337,6 +376,7 @@ int __init amx3_common_pm_init(void) + devinfo.size_data = sizeof(*pdata); + devinfo.id = -1; + platform_device_register_full(&devinfo); ++ amx3_block_suspend(); + + return 0; + } +-- +2.30.2 + diff --git a/queue-5.13/arm-tegra-nexus7-correct-3v3-regulator-gpio-of-pm269.patch b/queue-5.13/arm-tegra-nexus7-correct-3v3-regulator-gpio-of-pm269.patch new file mode 100644 index 00000000000..422e251ab17 --- /dev/null +++ b/queue-5.13/arm-tegra-nexus7-correct-3v3-regulator-gpio-of-pm269.patch @@ -0,0 +1,37 @@ +From 272686cc15a8090410ea6ba67498acdb7df40241 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 May 2021 23:26:00 +0300 +Subject: ARM: tegra: nexus7: Correct 3v3 regulator GPIO of PM269 variant + +From: Dmitry Osipenko + +[ Upstream commit c4dd6066bc304649e3159f1c7a08ece25d537e00 ] + +The 3v3 regulator GPIO is GP6 and not GP7, which is the DDR regulator. +Both regulators are always-on, nevertheless the DT model needs to be +corrected, fix it. + +Reported-by: Svyatoslav Ryhel +Signed-off-by: Dmitry Osipenko +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/tegra30-asus-nexus7-grouper-ti-pmic.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-ti-pmic.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-ti-pmic.dtsi +index b97da45ebdb4..e1325ee0a3c4 100644 +--- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-ti-pmic.dtsi ++++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-ti-pmic.dtsi +@@ -144,7 +144,7 @@ + }; + + vdd_3v3_sys: regulator@1 { +- gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; ++ gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm-tegra-wm8903-fix-polarity-of-headphones-detectio.patch b/queue-5.13/arm-tegra-wm8903-fix-polarity-of-headphones-detectio.patch new file mode 100644 index 00000000000..f73b4bf3cb7 --- /dev/null +++ b/queue-5.13/arm-tegra-wm8903-fix-polarity-of-headphones-detectio.patch @@ -0,0 +1,136 @@ +From 48300b6447cf677d1964b96d4bc79633ca157b9e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 May 2021 23:25:55 +0300 +Subject: ARM: tegra: wm8903: Fix polarity of headphones-detection GPIO in + device-trees + +From: Dmitry Osipenko + +[ Upstream commit 5f45da704de425d74abd75feaa928fc8a3df03ba ] + +All Tegra boards which use WM8903 audio codec are specifying a wrong +polarity for the headphones detection GPIO. The kernel driver hardcodes +the polarity to active-low, which is the correct polarity, so we can fix +the device-trees safely. + +Signed-off-by: Dmitry Osipenko +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 2 +- + arch/arm/boot/dts/tegra20-harmony.dts | 2 +- + arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +- + arch/arm/boot/dts/tegra20-plutux.dts | 2 +- + arch/arm/boot/dts/tegra20-seaboard.dts | 2 +- + arch/arm/boot/dts/tegra20-tec.dts | 2 +- + arch/arm/boot/dts/tegra20-ventana.dts | 2 +- + arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- + 8 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +index 2298fc034183..14cd3238355b 100644 +--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts ++++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +@@ -1030,7 +1030,7 @@ + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; +- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; ++ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>; + nvidia,headset; + +diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts +index 86494cb4d5a1..ae4312eedcbd 100644 +--- a/arch/arm/boot/dts/tegra20-harmony.dts ++++ b/arch/arm/boot/dts/tegra20-harmony.dts +@@ -748,7 +748,7 @@ + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) +- GPIO_ACTIVE_HIGH>; ++ GPIO_ACTIVE_LOW>; + nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) + GPIO_ACTIVE_HIGH>; + nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) +diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts +index a348ca30e522..b31c9bca16e6 100644 +--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts ++++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts +@@ -84,7 +84,7 @@ + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; +- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; ++ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, +diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts +index 378f23b2958b..5811b7006a9b 100644 +--- a/arch/arm/boot/dts/tegra20-plutux.dts ++++ b/arch/arm/boot/dts/tegra20-plutux.dts +@@ -52,7 +52,7 @@ + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; +- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; ++ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, +diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts +index c24d4a37613e..92d494b8c3d2 100644 +--- a/arch/arm/boot/dts/tegra20-seaboard.dts ++++ b/arch/arm/boot/dts/tegra20-seaboard.dts +@@ -911,7 +911,7 @@ + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; +- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; ++ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, +diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts +index 44ced60315de..10ff09d86efa 100644 +--- a/arch/arm/boot/dts/tegra20-tec.dts ++++ b/arch/arm/boot/dts/tegra20-tec.dts +@@ -61,7 +61,7 @@ + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) +- GPIO_ACTIVE_HIGH>; ++ GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, +diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts +index 99a356c1ccec..5a2578b3707f 100644 +--- a/arch/arm/boot/dts/tegra20-ventana.dts ++++ b/arch/arm/boot/dts/tegra20-ventana.dts +@@ -709,7 +709,7 @@ + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; +- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; ++ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) + GPIO_ACTIVE_HIGH>; + nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) +diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi +index 2dff14b87f3e..d9dd11569d4b 100644 +--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi ++++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi +@@ -630,7 +630,7 @@ + + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) +- GPIO_ACTIVE_HIGH>; ++ GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA30_CLK_PLL_A>, + <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-imx8-conn-fix-enet-clock-setting.patch b/queue-5.13/arm64-dts-imx8-conn-fix-enet-clock-setting.patch new file mode 100644 index 00000000000..7000573fc4f --- /dev/null +++ b/queue-5.13/arm64-dts-imx8-conn-fix-enet-clock-setting.patch @@ -0,0 +1,113 @@ +From 4ce7f780a02e44297f5921a56e09ba12f901600c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 May 2021 11:12:48 +0800 +Subject: arm64: dts: imx8: conn: fix enet clock setting + +From: Dong Aisheng + +[ Upstream commit dfda1fd16aa71c839e4002109b0cd15f61105ebb ] + +enet_clk_ref actually is sourced from internal gpr clocks +which needs a default rate. Also update enet lpcg clock +output names to be more straightforward. + +Cc: Abel Vesa +Cc: Stephen Boyd +Signed-off-by: Dong Aisheng +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + .../boot/dts/freescale/imx8-ss-conn.dtsi | 50 ++++++++++++------- + 1 file changed, 32 insertions(+), 18 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +index e1e81ca0ca69..a79f42a9618e 100644 +--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +@@ -77,9 +77,12 @@ conn_subsys: bus@5b000000 { + ; + clocks = <&enet0_lpcg IMX_LPCG_CLK_4>, + <&enet0_lpcg IMX_LPCG_CLK_2>, +- <&enet0_lpcg IMX_LPCG_CLK_1>, ++ <&enet0_lpcg IMX_LPCG_CLK_3>, + <&enet0_lpcg IMX_LPCG_CLK_0>; + clock-names = "ipg", "ahb", "enet_clk_ref", "ptp"; ++ assigned-clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, ++ <&clk IMX_SC_R_ENET_0 IMX_SC_C_CLKDIV>; ++ assigned-clock-rates = <250000000>, <125000000>; + fsl,num-tx-queues=<3>; + fsl,num-rx-queues=<3>; + power-domains = <&pd IMX_SC_R_ENET_0>; +@@ -94,9 +97,12 @@ conn_subsys: bus@5b000000 { + ; + clocks = <&enet1_lpcg IMX_LPCG_CLK_4>, + <&enet1_lpcg IMX_LPCG_CLK_2>, +- <&enet1_lpcg IMX_LPCG_CLK_1>, ++ <&enet1_lpcg IMX_LPCG_CLK_3>, + <&enet1_lpcg IMX_LPCG_CLK_0>; + clock-names = "ipg", "ahb", "enet_clk_ref", "ptp"; ++ assigned-clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, ++ <&clk IMX_SC_R_ENET_1 IMX_SC_C_CLKDIV>; ++ assigned-clock-rates = <250000000>, <125000000>; + fsl,num-tx-queues=<3>; + fsl,num-rx-queues=<3>; + power-domains = <&pd IMX_SC_R_ENET_1>; +@@ -152,15 +158,19 @@ conn_subsys: bus@5b000000 { + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, +- <&conn_axi_clk>, <&conn_ipg_clk>, <&conn_ipg_clk>; ++ <&conn_axi_clk>, ++ <&clk IMX_SC_R_ENET_0 IMX_SC_C_TXCLK>, ++ <&conn_ipg_clk>, ++ <&conn_ipg_clk>; + clock-indices = , , +- , , +- ; +- clock-output-names = "enet0_ipg_root_clk", +- "enet0_tx_clk", +- "enet0_ahb_clk", +- "enet0_ipg_clk", +- "enet0_ipg_s_clk"; ++ , , ++ , ; ++ clock-output-names = "enet0_lpcg_timer_clk", ++ "enet0_lpcg_txc_sampling_clk", ++ "enet0_lpcg_ahb_clk", ++ "enet0_lpcg_rgmii_txc_clk", ++ "enet0_lpcg_ipg_clk", ++ "enet0_lpcg_ipg_s_clk"; + power-domains = <&pd IMX_SC_R_ENET_0>; + }; + +@@ -170,15 +180,19 @@ conn_subsys: bus@5b000000 { + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, +- <&conn_axi_clk>, <&conn_ipg_clk>, <&conn_ipg_clk>; ++ <&conn_axi_clk>, ++ <&clk IMX_SC_R_ENET_1 IMX_SC_C_TXCLK>, ++ <&conn_ipg_clk>, ++ <&conn_ipg_clk>; + clock-indices = , , +- , , +- ; +- clock-output-names = "enet1_ipg_root_clk", +- "enet1_tx_clk", +- "enet1_ahb_clk", +- "enet1_ipg_clk", +- "enet1_ipg_s_clk"; ++ , , ++ , ; ++ clock-output-names = "enet1_lpcg_timer_clk", ++ "enet1_lpcg_txc_sampling_clk", ++ "enet1_lpcg_ahb_clk", ++ "enet1_lpcg_rgmii_txc_clk", ++ "enet1_lpcg_ipg_clk", ++ "enet1_lpcg_ipg_s_clk"; + power-domains = <&pd IMX_SC_R_ENET_1>; + }; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-imx8mn-beacon-som-assign-pmic-clock.patch b/queue-5.13/arm64-dts-imx8mn-beacon-som-assign-pmic-clock.patch new file mode 100644 index 00000000000..766ce90cf1c --- /dev/null +++ b/queue-5.13/arm64-dts-imx8mn-beacon-som-assign-pmic-clock.patch @@ -0,0 +1,36 @@ +From 1de639680e84e4d0f4f53db5b2ca747116ff2b87 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 28 Apr 2021 08:00:58 -0500 +Subject: arm64: dts: imx8mn-beacon-som: Assign PMIC clock + +From: Adam Ford + +[ Upstream commit 1de3aa8611d21d6be546ca1cd13ee05bdd650018 ] + +The PMIC throws an errors because the clock isn't assigned to it. +Fix this by assigning the clocks info. + +Signed-off-by: Adam Ford +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi +index c35eeaff958f..54eaf3d6055b 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi +@@ -120,6 +120,9 @@ + interrupt-parent = <&gpio1>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + rohm,reset-snvs-powered; ++ #clock-cells = <0>; ++ clocks = <&osc_32k 0>; ++ clock-output-names = "clk-32k-out"; + + regulators { + buck1_reg: BUCK1 { +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-imx8mq-assign-pcie-clocks.patch b/queue-5.13/arm64-dts-imx8mq-assign-pcie-clocks.patch new file mode 100644 index 00000000000..b0ea7503ad1 --- /dev/null +++ b/queue-5.13/arm64-dts-imx8mq-assign-pcie-clocks.patch @@ -0,0 +1,67 @@ +From 16114205fd9b000825e403c0924ce0e7c8ff7cc7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 8 May 2021 00:12:13 +0200 +Subject: arm64: dts: imx8mq: assign PCIe clocks + +From: Lucas Stach + +[ Upstream commit 15a5261e4d052bf85c7fba24dbe0e9a7c8c05925 ] + +This fixes multiple issues with the current non-existent PCIe clock setup: + +The controller can run at up to 250MHz, so use a parent that provides this +clock. + +The PHY needs an exact 100MHz reference clock to function if the PCIe +refclock is not fed in via the refclock pads. While this mode is not +supported (yet) in the driver it doesn't hurt to make sure we are +providing a clock with the right rate. + +The AUX clock is specified to have a maximum clock rate of 10MHz. So +the current setup, which drives it straight from the 25MHz oscillator is +actually overclocking the AUX input. + +Signed-off-by: Lucas Stach +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi +index 17c449e12c2e..91df9c5350ae 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi +@@ -1383,6 +1383,14 @@ + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; ++ assigned-clocks = <&clk IMX8MQ_CLK_PCIE1_CTRL>, ++ <&clk IMX8MQ_CLK_PCIE1_PHY>, ++ <&clk IMX8MQ_CLK_PCIE1_AUX>; ++ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, ++ <&clk IMX8MQ_SYS2_PLL_100M>, ++ <&clk IMX8MQ_SYS1_PLL_80M>; ++ assigned-clock-rates = <250000000>, <100000000>, ++ <10000000>; + status = "disabled"; + }; + +@@ -1413,6 +1421,14 @@ + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; ++ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>, ++ <&clk IMX8MQ_CLK_PCIE2_PHY>, ++ <&clk IMX8MQ_CLK_PCIE2_AUX>; ++ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, ++ <&clk IMX8MQ_SYS2_PLL_100M>, ++ <&clk IMX8MQ_SYS1_PLL_80M>; ++ assigned-clock-rates = <250000000>, <100000000>, ++ <10000000>; + status = "disabled"; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch b/queue-5.13/arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch new file mode 100644 index 00000000000..a89db92ecca --- /dev/null +++ b/queue-5.13/arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch @@ -0,0 +1,52 @@ +From 1a4ac1fa7af9fb808a08419b2cddf375deebcdf9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 8 Jun 2021 15:51:33 +0100 +Subject: arm64: dts: juno: Update SCPI nodes as per the YAML schema + +From: Sudeep Holla + +[ Upstream commit 70010556b158a0fefe43415fb0c58347dcce7da0 ] + +The SCPI YAML schema expects standard node names for clocks and +power domain controllers. Fix those as per the schema for Juno +platforms. + +Link: https://lore.kernel.org/r/20210608145133.2088631-1-sudeep.holla@arm.com +Signed-off-by: Sudeep Holla +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/arm/juno-base.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi +index 1cc7fdcec51b..8e7a66943b01 100644 +--- a/arch/arm64/boot/dts/arm/juno-base.dtsi ++++ b/arch/arm64/boot/dts/arm/juno-base.dtsi +@@ -568,13 +568,13 @@ + clocks { + compatible = "arm,scpi-clocks"; + +- scpi_dvfs: scpi-dvfs { ++ scpi_dvfs: clocks-0 { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>, <1>, <2>; + clock-output-names = "atlclk", "aplclk","gpuclk"; + }; +- scpi_clk: scpi-clk { ++ scpi_clk: clocks-1 { + compatible = "arm,scpi-variable-clocks"; + #clock-cells = <1>; + clock-indices = <3>; +@@ -582,7 +582,7 @@ + }; + }; + +- scpi_devpd: scpi-power-domains { ++ scpi_devpd: power-controller { + compatible = "arm,scpi-power-domains"; + num-domains = <2>; + #power-domain-cells = <1>; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch b/queue-5.13/arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch new file mode 100644 index 00000000000..f3001d347cc --- /dev/null +++ b/queue-5.13/arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch @@ -0,0 +1,48 @@ +From a2aa6175d5603f381294dd1db2a05a4a3a013ed0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 28 Apr 2021 14:58:07 +0200 +Subject: arm64: dts: ls208xa: remove bus-num from dspi node + +From: Mian Yousaf Kaukab + +[ Upstream commit 8240c972c1798ea013cbb407722295fc826b3584 ] + +On LS2088A-RDB board, if the spi-fsl-dspi driver is built as module +then its probe fails with the following warning: + +[ 10.471363] couldn't get idr +[ 10.471381] WARNING: CPU: 4 PID: 488 at drivers/spi/spi.c:2689 spi_register_controller+0x73c/0x8d0 +... +[ 10.471651] fsl-dspi 2100000.spi: Problem registering DSPI ctlr +[ 10.471708] fsl-dspi: probe of 2100000.spi failed with error -16 + +Reason for the failure is that bus-num property is set for dspi node. +However, bus-num property is not set for the qspi node. If probe for +spi-fsl-qspi happens first then id 0 is dynamically allocated to it. +Call to spi_register_controller() from spi-fsl-dspi driver then fails. +Since commit 29d2daf2c33c ("spi: spi-fsl-dspi: Make bus-num property +optional") bus-num property is optional. Remove bus-num property from +dspi node to fix the issue. + +Signed-off-by: Mian Yousaf Kaukab +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +index 135ac8210871..801ba9612d36 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +@@ -929,7 +929,6 @@ + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "dspi"; + spi-num-chipselects = <5>; +- bus-num = <0>; + }; + + esdhc: esdhc@2140000 { +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-msm8996-make-cpucc-actually-probe-and.patch b/queue-5.13/arm64-dts-qcom-msm8996-make-cpucc-actually-probe-and.patch new file mode 100644 index 00000000000..9a04d5dacf0 --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-msm8996-make-cpucc-actually-probe-and.patch @@ -0,0 +1,52 @@ +From 90f05a0a6a93a2f261fbd8ab4a93917cf4923a40 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 May 2021 21:29:58 +0200 +Subject: arm64: dts: qcom: msm8996: Make CPUCC actually probe (and work) + +From: Konrad Dybcio + +[ Upstream commit 0a275a35ceab07cb622ff212c54d6866e246ac53 ] + +Fix the compatible to make the driver probe and tell the +driver where to look for the "xo" clock to make sure everything +works. + +Then we get a happy (eh, happier) 8996: + +somainline-sdcard:/home/konrad# cat /sys/kernel/debug/clk/pwrcl_pll/clk_rate +1152000000 + +Don't backport without "arm64: dts: qcom: msm8996: Add CPU opps", as +the system fails to boot without consumers for these clocks. + +Signed-off-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20210527192958.775434-1-konrad.dybcio@somainline.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi +index ce430ba9c118..dd89d3cb772b 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi +@@ -1745,9 +1745,14 @@ + }; + }; + }; ++ + kryocc: clock-controller@6400000 { +- compatible = "qcom,apcc-msm8996"; ++ compatible = "qcom,msm8996-apcc"; + reg = <0x06400000 0x90000>; ++ ++ clock-names = "xo"; ++ clocks = <&xo_board>; ++ + #clock-cells = <1>; + }; + +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-sc7180-add-wakeup-delay-for-adau-code.patch b/queue-5.13/arm64-dts-qcom-sc7180-add-wakeup-delay-for-adau-code.patch new file mode 100644 index 00000000000..3fea4fb2b84 --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-sc7180-add-wakeup-delay-for-adau-code.patch @@ -0,0 +1,36 @@ +From 8c9dbfe099b11fa0490565f205e175d9aed53917 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 May 2021 17:54:29 +0530 +Subject: arm64: dts: qcom: sc7180: Add wakeup delay for adau codec + +From: Srinivasa Rao Mandadapu + +[ Upstream commit ba5f9b5d7ff3452e69275080c3d59265bc1db8ea ] + +Add wakeup delay for fixing PoP noise during capture begin. + +Reviewed-by: Douglas Anderson +Signed-off-by: Judy Hsiao +Signed-off-by: Srinivasa Rao Mandadapu +Link: https://lore.kernel.org/r/20210513122429.25295-1-srivasam@codeaurora.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi +index 4c6e433c8226..3eb8550da1fc 100644 +--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi +@@ -23,6 +23,7 @@ ap_h1_spi: &spi0 {}; + adau7002: audio-codec-1 { + compatible = "adi,adau7002"; + IOVDD-supply = <&pp1800_l15a>; ++ wakeup-delay-ms = <15>; + #sound-dai-cells = <0>; + }; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-sc7180-move-rmtfs-memory-region.patch b/queue-5.13/arm64-dts-qcom-sc7180-move-rmtfs-memory-region.patch new file mode 100644 index 00000000000..f35874ba65c --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-sc7180-move-rmtfs-memory-region.patch @@ -0,0 +1,38 @@ +From 3bea6dea9e5dcb32cc6d38da9c4d2ba9bf4fc9be Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 May 2021 11:34:34 -0700 +Subject: arm64: dts: qcom: sc7180: Move rmtfs memory region + +From: Sujit Kautkar + +[ Upstream commit d4282fb4f8f9683711ae6c076da16aa8e675fdbd ] + +Move rmtfs memory region so that it does not overlap with system +RAM (kernel data) when KAsan is enabled. This puts rmtfs right +after mba_mem which is not supposed to increase beyond 0x94600000 + +Reviewed-by: Sibi Sankar +Signed-off-by: Sujit Kautkar +Link: https://lore.kernel.org/r/20210514113430.1.Ic2d032cd80424af229bb95e2c67dd4de1a70cb0c@changeid +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sc7180-idp.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts +index e77a7926034a..afe0f9c25816 100644 +--- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts ++++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts +@@ -45,7 +45,7 @@ + + /* Increase the size from 2MB to 8MB */ + &rmtfs_mem { +- reg = <0x0 0x84400000 0x0 0x800000>; ++ reg = <0x0 0x94600000 0x0 0x800000>; + }; + + / { +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-sm8150-disable-adreno-and-modem-by-de.patch b/queue-5.13/arm64-dts-qcom-sm8150-disable-adreno-and-modem-by-de.patch new file mode 100644 index 00000000000..6b45e0b444e --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-sm8150-disable-adreno-and-modem-by-de.patch @@ -0,0 +1,117 @@ +From e1f15b27e722fa3537649b26c053e59bb607d0f7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 11 Jun 2021 22:33:00 +0200 +Subject: arm64: dts: qcom: sm8150: Disable Adreno and modem by default + +From: Konrad Dybcio + +[ Upstream commit b1dc3c6b3dabbedaf896a3c1a998da191c311c70 ] + +Components that rely on proprietary (not to mention signed!) firmware should +not be enabled by default, as lack of the aforementioned firmware could cause +various issues, from random errors to straight-up failing to boot. + +Not enabling modem back on the HDK, as it uses a sa8150. + +Also fixed a sorting mistake in both boards' dt while at it. + +Signed-off-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20210611203301.101067-1-konrad.dybcio@somainline.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 10 +++++++++- + arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 10 +++++++++- + arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 ++++++ + 3 files changed, 24 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +index fb2cf3d987a1..50ee3bb97325 100644 +--- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts ++++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +@@ -354,7 +354,11 @@ + }; + }; + +-&qupv3_id_1 { ++&gmu { ++ status = "okay"; ++}; ++ ++&gpu { + status = "okay"; + }; + +@@ -372,6 +376,10 @@ + }; + }; + ++&qupv3_id_1 { ++ status = "okay"; ++}; ++ + &remoteproc_adsp { + status = "okay"; + +diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts +index 3774f8e63416..7de54b2e497e 100644 +--- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts ++++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts +@@ -349,7 +349,11 @@ + }; + }; + +-&qupv3_id_1 { ++&gmu { ++ status = "okay"; ++}; ++ ++&gpu { + status = "okay"; + }; + +@@ -367,6 +371,10 @@ + }; + }; + ++&qupv3_id_1 { ++ status = "okay"; ++}; ++ + &remoteproc_adsp { + status = "okay"; + firmware-name = "qcom/sm8150/adsp.mdt"; +diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi +index 51235a9521c2..618a1e64f808 100644 +--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi +@@ -1082,6 +1082,8 @@ + + qcom,gmu = <&gmu>; + ++ status = "disabled"; ++ + zap-shader { + memory-region = <&gpu_mem>; + }; +@@ -1149,6 +1151,8 @@ + + operating-points-v2 = <&gmu_opp_table>; + ++ status = "disabled"; ++ + gmu_opp_table: opp-table { + compatible = "operating-points-v2"; + +@@ -1496,6 +1500,8 @@ + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + ++ status = "disabled"; ++ + glink-edge { + interrupts = ; + label = "modem"; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-sm8250-fix-display-nodes.patch b/queue-5.13/arm64-dts-qcom-sm8250-fix-display-nodes.patch new file mode 100644 index 00000000000..ba0c41b977d --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-sm8250-fix-display-nodes.patch @@ -0,0 +1,46 @@ +From 56c0db92dad6918dfb01d4fe63507d632b43a12b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 29 Mar 2021 15:00:51 +0300 +Subject: arm64: dts: qcom: sm8250: fix display nodes + +From: Jonathan Marek + +[ Upstream commit dc5d91250ae6b810bc8d599d8d6590a06a4ce84a ] + +Use sm8250 compatibles instead of sdm845 compatibles + +Reviewed-by: Stephen Boyd +Signed-off-by: Jonathan Marek +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20210329120051.3401567-5-dmitry.baryshkov@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi +index 4c0de12aaba6..75f9476109e6 100644 +--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi +@@ -2370,7 +2370,7 @@ + }; + + mdss: mdss@ae00000 { +- compatible = "qcom,sdm845-mdss"; ++ compatible = "qcom,sm8250-mdss"; + reg = <0 0x0ae00000 0 0x1000>; + reg-names = "mdss"; + +@@ -2402,7 +2402,7 @@ + ranges; + + mdss_mdp: mdp@ae01000 { +- compatible = "qcom,sdm845-dpu"; ++ compatible = "qcom,sm8250-dpu"; + reg = <0 0x0ae01000 0 0x8f000>, + <0 0x0aeb0000 0 0x2008>; + reg-names = "mdp", "vbif"; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-sm8250-fix-pcie2_lane-unit-address.patch b/queue-5.13/arm64-dts-qcom-sm8250-fix-pcie2_lane-unit-address.patch new file mode 100644 index 00000000000..50b76de6550 --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-sm8250-fix-pcie2_lane-unit-address.patch @@ -0,0 +1,35 @@ +From cad76ded6db95166750b23212771b3aa50ed7002 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 13 Jun 2021 20:53:34 +0200 +Subject: arm64: dts: qcom: sm8250: Fix pcie2_lane unit address + +From: Konrad Dybcio + +[ Upstream commit dc2f86369b157dfe4dccd31497d2e3c541e7239d ] + +The previous one was likely a mistaken copy from pcie1_lane. + +Signed-off-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20210613185334.306225-1-konrad.dybcio@somainline.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi +index 75f9476109e6..09b552396557 100644 +--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi +@@ -1470,7 +1470,7 @@ + + status = "disabled"; + +- pcie2_lane: lanes@1c0e200 { ++ pcie2_lane: lanes@1c16200 { + reg = <0 0x1c16200 0 0x170>, /* tx0 */ + <0 0x1c16400 0 0x200>, /* rx0 */ + <0 0x1c16a00 0 0x1f0>, /* pcs */ +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-qcom-sm8350-fix-the-node-unit-addresses.patch b/queue-5.13/arm64-dts-qcom-sm8350-fix-the-node-unit-addresses.patch new file mode 100644 index 00000000000..198ee50c895 --- /dev/null +++ b/queue-5.13/arm64-dts-qcom-sm8350-fix-the-node-unit-addresses.patch @@ -0,0 +1,61 @@ +From f3b95b44a51f78282ec886a2d5debff26690aed0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 May 2021 11:37:33 +0530 +Subject: arm64: dts: qcom: sm8350: fix the node unit addresses + +From: Vinod Koul + +[ Upstream commit 1dee9e3b0997fef7170f7ea2d8eab47d0cd334d8 ] + +Some node unit addresses were put wrongly in the dts, resulting in +below warning when run with W=1 + +arch/arm64/boot/dts/qcom/sm8350.dtsi:693.34-702.5: Warning (simple_bus_reg): /soc@0/thermal-sensor@c222000: simple-bus unit address format error, expected "c263000" +arch/arm64/boot/dts/qcom/sm8350.dtsi:704.34-713.5: Warning (simple_bus_reg): /soc@0/thermal-sensor@c223000: simple-bus unit address format error, expected "c265000" +arch/arm64/boot/dts/qcom/sm8350.dtsi:1180.32-1185.5: Warning (simple_bus_reg): /soc@0/interconnect@90e0000: simple-bus unit address format error, expected "90c0000" + +Fix by correcting to the correct address as given in reg node + +Reviewed-by: Robert Foss +Signed-off-by: Vinod Koul +Link: https://lore.kernel.org/r/20210513060733.382420-1-vkoul@kernel.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi +index ed0b51bc03ea..a2382eb8619b 100644 +--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi +@@ -689,7 +689,7 @@ + interrupt-controller; + }; + +- tsens0: thermal-sensor@c222000 { ++ tsens0: thermal-sensor@c263000 { + compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; + reg = <0 0x0c263000 0 0x1ff>, /* TM */ + <0 0x0c222000 0 0x8>; /* SROT */ +@@ -700,7 +700,7 @@ + #thermal-sensor-cells = <1>; + }; + +- tsens1: thermal-sensor@c223000 { ++ tsens1: thermal-sensor@c265000 { + compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; + reg = <0 0x0c265000 0 0x1ff>, /* TM */ + <0 0x0c223000 0 0x8>; /* SROT */ +@@ -1176,7 +1176,7 @@ + }; + }; + +- dc_noc: interconnect@90e0000 { ++ dc_noc: interconnect@90c0000 { + compatible = "qcom,sm8350-dc-noc"; + reg = <0 0x090c0000 0 0x4200>; + #interconnect-cells = <1>; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-renesas-beacon-fix-usb-extal-reference.patch b/queue-5.13/arm64-dts-renesas-beacon-fix-usb-extal-reference.patch new file mode 100644 index 00000000000..9672ae8c7c0 --- /dev/null +++ b/queue-5.13/arm64-dts-renesas-beacon-fix-usb-extal-reference.patch @@ -0,0 +1,43 @@ +From ababa0858c40a1a6963bf5c2ae0afa1e4b2a487b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 May 2021 06:46:15 -0500 +Subject: arm64: dts: renesas: beacon: Fix USB extal reference + +From: Adam Ford + +[ Upstream commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 ] + +The USB extal clock reference isn't associated to a crystal, it's +associated to a programmable clock, so remove the extal reference, +add the usb2_clksel. Since usb_extal is referenced by the versaclock, +reference it here so the usb2_clksel can get the proper clock speed +of 50MHz. + +Signed-off-by: Adam Ford +Link: https://lore.kernel.org/r/20210513114617.30191-1-aford173@gmail.com +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +index 8d3a4d6ee885..bd3d26b2a2bb 100644 +--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi ++++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +@@ -319,8 +319,10 @@ + status = "okay"; + }; + +-&usb_extal_clk { +- clock-frequency = <50000000>; ++&usb2_clksel { ++ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, ++ <&versaclock5 3>, <&usb3s0_clk>; ++ status = "okay"; + }; + + &usb3s0_clk { +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-renesas-beacon-fix-usb-ref-clock-reference.patch b/queue-5.13/arm64-dts-renesas-beacon-fix-usb-ref-clock-reference.patch new file mode 100644 index 00000000000..3ba8b04dc4d --- /dev/null +++ b/queue-5.13/arm64-dts-renesas-beacon-fix-usb-ref-clock-reference.patch @@ -0,0 +1,50 @@ +From 09d78c35f116b1739432c67318f46dba04d577c8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 May 2021 06:46:16 -0500 +Subject: arm64: dts: renesas: beacon: Fix USB ref clock references + +From: Adam Ford + +[ Upstream commit ebc666f39ff67a01e748c34d670ddf05a9e45220 ] + +The RZ/G2 boards expect there to be an external clock reference for +USB2 EHCI controllers. For the Beacon boards, this reference clock +is controlled by a programmable versaclock. Because the RZ/G2 +family has a special clock driver when using an external clock, +the third clock reference in the EHCI node needs to point to this +special clock, called usb2_clksel. + +Since the usb2_clksel does not keep the usb_extal clock enabled, +the 4th clock entry for the EHCI nodes needs to reference it to +keep the clock running and make USB functional. + +Signed-off-by: Adam Ford +Link: https://lore.kernel.org/r/20210513114617.30191-2-aford173@gmail.com +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +index d8046fedf9c1..e3c8b2fe143e 100644 +--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi ++++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +@@ -271,12 +271,12 @@ + &ehci0 { + dr_mode = "otg"; + status = "okay"; +- clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; ++ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>; + }; + + &ehci1 { + status = "okay"; +- clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; ++ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>; + }; + + &hdmi0 { +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch b/queue-5.13/arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch new file mode 100644 index 00000000000..409aa7b37f7 --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch @@ -0,0 +1,42 @@ +From 47b79b28d6649f9a01d7035dc99519314cb1a1cc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 26 Jan 2021 12:02:21 +0100 +Subject: arm64: dts: rockchip: fix pinctrl sleep nodename for rk3399.dtsi + +From: Johan Jonker + +[ Upstream commit a7ecfad495f8af63a5cb332c91f60ab2018897f5 ] + +A test with the command below aimed at powerpc generates +notifications in the Rockchip arm64 tree. + +Fix pinctrl "sleep" nodename by renaming it to "suspend" +for rk3399.dtsi + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210126110221.10815-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 634a91af8e83..7c1b69f3a4c1 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -2354,7 +2354,7 @@ + }; + }; + +- sleep { ++ suspend { + ap_pwroff: ap-pwroff { + rockchip,pins = <1 RK_PA5 1 &pcfg_pull_none>; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch b/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch new file mode 100644 index 00000000000..22168aa27d4 --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch @@ -0,0 +1,97 @@ +From 3df87500b2b9dd5f0418a60680a42a766f3e9481 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:42 +0200 +Subject: arm64: dts: rockchip: Fix power-controller node names for px30 + +From: Elaine Zhang + +[ Upstream commit d5de0d688ac6e0202674577b05d0726b8a6af401 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/px30.dtsi | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi +index 09baa8a167ce..2b43c3d72dd9 100644 +--- a/arch/arm64/boot/dts/rockchip/px30.dtsi ++++ b/arch/arm64/boot/dts/rockchip/px30.dtsi +@@ -244,20 +244,20 @@ + #size-cells = <0>; + + /* These power domains are grouped by VD_LOGIC */ +- pd_usb@PX30_PD_USB { ++ power-domain@PX30_PD_USB { + reg = ; + clocks = <&cru HCLK_HOST>, + <&cru HCLK_OTG>, + <&cru SCLK_OTG_ADP>; + pm_qos = <&qos_usb_host>, <&qos_usb_otg>; + }; +- pd_sdcard@PX30_PD_SDCARD { ++ power-domain@PX30_PD_SDCARD { + reg = ; + clocks = <&cru HCLK_SDMMC>, + <&cru SCLK_SDMMC>; + pm_qos = <&qos_sdmmc>; + }; +- pd_gmac@PX30_PD_GMAC { ++ power-domain@PX30_PD_GMAC { + reg = ; + clocks = <&cru ACLK_GMAC>, + <&cru PCLK_GMAC>, +@@ -265,7 +265,7 @@ + <&cru SCLK_GMAC_RX_TX>; + pm_qos = <&qos_gmac>; + }; +- pd_mmc_nand@PX30_PD_MMC_NAND { ++ power-domain@PX30_PD_MMC_NAND { + reg = ; + clocks = <&cru HCLK_NANDC>, + <&cru HCLK_EMMC>, +@@ -278,14 +278,14 @@ + pm_qos = <&qos_emmc>, <&qos_nand>, + <&qos_sdio>, <&qos_sfc>; + }; +- pd_vpu@PX30_PD_VPU { ++ power-domain@PX30_PD_VPU { + reg = ; + clocks = <&cru ACLK_VPU>, + <&cru HCLK_VPU>, + <&cru SCLK_CORE_VPU>; + pm_qos = <&qos_vpu>, <&qos_vpu_r128>; + }; +- pd_vo@PX30_PD_VO { ++ power-domain@PX30_PD_VO { + reg = ; + clocks = <&cru ACLK_RGA>, + <&cru ACLK_VOPB>, +@@ -301,7 +301,7 @@ + pm_qos = <&qos_rga_rd>, <&qos_rga_wr>, + <&qos_vop_m0>, <&qos_vop_m1>; + }; +- pd_vi@PX30_PD_VI { ++ power-domain@PX30_PD_VI { + reg = ; + clocks = <&cru ACLK_CIF>, + <&cru ACLK_ISP>, +@@ -312,7 +312,7 @@ + <&qos_isp_wr>, <&qos_isp_m1>, + <&qos_vip>; + }; +- pd_gpu@PX30_PD_GPU { ++ power-domain@PX30_PD_GPU { + reg = ; + clocks = <&cru SCLK_GPU>; + pm_qos = <&qos_gpu>; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-32278 b/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-32278 new file mode 100644 index 00000000000..f88812e60ae --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-32278 @@ -0,0 +1,46 @@ +From 78848a822e9da07cd9b40a7e7bececb569962b9c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:43 +0200 +Subject: arm64: dts: rockchip: Fix power-controller node names for rk3328 + +From: Elaine Zhang + +[ Upstream commit 6e6a282b49c6db408d27231e3c709fbdf25e3c1b ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-7-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index 3ed69ecbcf3c..d2d8b675c9e9 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -300,13 +300,13 @@ + #address-cells = <1>; + #size-cells = <0>; + +- pd_hevc@RK3328_PD_HEVC { ++ power-domain@RK3328_PD_HEVC { + reg = ; + }; +- pd_video@RK3328_PD_VIDEO { ++ power-domain@RK3328_PD_VIDEO { + reg = ; + }; +- pd_vpu@RK3328_PD_VPU { ++ power-domain@RK3328_PD_VPU { + reg = ; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-7583 b/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-7583 new file mode 100644 index 00000000000..12454ee2da6 --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-7583 @@ -0,0 +1,171 @@ +From 58d7ece8a21dcc5d773fca677950af1a75349c9d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:44 +0200 +Subject: arm64: dts: rockchip: Fix power-controller node names for rk3399 + +From: Elaine Zhang + +[ Upstream commit 148bbe29f9108812c6fedd8a228f9e1ed6b422f7 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-8-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40 ++++++++++++------------ + 1 file changed, 20 insertions(+), 20 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 7c1b69f3a4c1..1703817c7354 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -968,26 +968,26 @@ + #size-cells = <0>; + + /* These power domains are grouped by VD_CENTER */ +- pd_iep@RK3399_PD_IEP { ++ power-domain@RK3399_PD_IEP { + reg = ; + clocks = <&cru ACLK_IEP>, + <&cru HCLK_IEP>; + pm_qos = <&qos_iep>; + }; +- pd_rga@RK3399_PD_RGA { ++ power-domain@RK3399_PD_RGA { + reg = ; + clocks = <&cru ACLK_RGA>, + <&cru HCLK_RGA>; + pm_qos = <&qos_rga_r>, + <&qos_rga_w>; + }; +- pd_vcodec@RK3399_PD_VCODEC { ++ power-domain@RK3399_PD_VCODEC { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; + pm_qos = <&qos_video_m0>; + }; +- pd_vdu@RK3399_PD_VDU { ++ power-domain@RK3399_PD_VDU { + reg = ; + clocks = <&cru ACLK_VDU>, + <&cru HCLK_VDU>; +@@ -996,94 +996,94 @@ + }; + + /* These power domains are grouped by VD_GPU */ +- pd_gpu@RK3399_PD_GPU { ++ power-domain@RK3399_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; + }; + + /* These power domains are grouped by VD_LOGIC */ +- pd_edp@RK3399_PD_EDP { ++ power-domain@RK3399_PD_EDP { + reg = ; + clocks = <&cru PCLK_EDP_CTRL>; + }; +- pd_emmc@RK3399_PD_EMMC { ++ power-domain@RK3399_PD_EMMC { + reg = ; + clocks = <&cru ACLK_EMMC>; + pm_qos = <&qos_emmc>; + }; +- pd_gmac@RK3399_PD_GMAC { ++ power-domain@RK3399_PD_GMAC { + reg = ; + clocks = <&cru ACLK_GMAC>, + <&cru PCLK_GMAC>; + pm_qos = <&qos_gmac>; + }; +- pd_sd@RK3399_PD_SD { ++ power-domain@RK3399_PD_SD { + reg = ; + clocks = <&cru HCLK_SDMMC>, + <&cru SCLK_SDMMC>; + pm_qos = <&qos_sd>; + }; +- pd_sdioaudio@RK3399_PD_SDIOAUDIO { ++ power-domain@RK3399_PD_SDIOAUDIO { + reg = ; + clocks = <&cru HCLK_SDIO>; + pm_qos = <&qos_sdioaudio>; + }; +- pd_tcpc0@RK3399_PD_TCPD0 { ++ power-domain@RK3399_PD_TCPD0 { + reg = ; + clocks = <&cru SCLK_UPHY0_TCPDCORE>, + <&cru SCLK_UPHY0_TCPDPHY_REF>; + }; +- pd_tcpc1@RK3399_PD_TCPD1 { ++ power-domain@RK3399_PD_TCPD1 { + reg = ; + clocks = <&cru SCLK_UPHY1_TCPDCORE>, + <&cru SCLK_UPHY1_TCPDPHY_REF>; + }; +- pd_usb3@RK3399_PD_USB3 { ++ power-domain@RK3399_PD_USB3 { + reg = ; + clocks = <&cru ACLK_USB3>; + pm_qos = <&qos_usb_otg0>, + <&qos_usb_otg1>; + }; +- pd_vio@RK3399_PD_VIO { ++ power-domain@RK3399_PD_VIO { + reg = ; + #address-cells = <1>; + #size-cells = <0>; + +- pd_hdcp@RK3399_PD_HDCP { ++ power-domain@RK3399_PD_HDCP { + reg = ; + clocks = <&cru ACLK_HDCP>, + <&cru HCLK_HDCP>, + <&cru PCLK_HDCP>; + pm_qos = <&qos_hdcp>; + }; +- pd_isp0@RK3399_PD_ISP0 { ++ power-domain@RK3399_PD_ISP0 { + reg = ; + clocks = <&cru ACLK_ISP0>, + <&cru HCLK_ISP0>; + pm_qos = <&qos_isp0_m0>, + <&qos_isp0_m1>; + }; +- pd_isp1@RK3399_PD_ISP1 { ++ power-domain@RK3399_PD_ISP1 { + reg = ; + clocks = <&cru ACLK_ISP1>, + <&cru HCLK_ISP1>; + pm_qos = <&qos_isp1_m0>, + <&qos_isp1_m1>; + }; +- pd_vo@RK3399_PD_VO { ++ power-domain@RK3399_PD_VO { + reg = ; + #address-cells = <1>; + #size-cells = <0>; + +- pd_vopb@RK3399_PD_VOPB { ++ power-domain@RK3399_PD_VOPB { + reg = ; + clocks = <&cru ACLK_VOP0>, + <&cru HCLK_VOP0>; + pm_qos = <&qos_vop_big_r>, + <&qos_vop_big_w>; + }; +- pd_vopl@RK3399_PD_VOPL { ++ power-domain@RK3399_PD_VOPL { + reg = ; + clocks = <&cru ACLK_VOP1>, + <&cru HCLK_VOP1>; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-fix-regulator-gpio-states-array.patch b/queue-5.13/arm64-dts-rockchip-fix-regulator-gpio-states-array.patch new file mode 100644 index 00000000000..499a102cf04 --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-fix-regulator-gpio-states-array.patch @@ -0,0 +1,110 @@ +From 6199323025003a6ecd98ef3d99ea448ea0a351a5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 May 2021 23:58:40 +0200 +Subject: arm64: dts: rockchip: fix regulator-gpio states array + +From: Johan Jonker + +[ Upstream commit b82f8e2992534aab0fa762a37376be30df263701 ] + +A test with the command below gives this error: + +/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dt.yaml: +sdmmcio-regulator: states:0: +[1800000, 1, 3300000, 0] is too long + +dtbs_check expects regulator-gpio states in a format +of 2 per item, so fix them all. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/ +regulator/gpio-regulator.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210510215840.16270-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 4 ++-- + arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 4 ++-- + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 4 ++-- + arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 2 +- + arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 4 ++-- + 5 files changed, 9 insertions(+), 9 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +index 3dddd4742c3a..665b2e69455d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +@@ -84,8 +84,8 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>; +- states = <1800000 0x0 +- 3300000 0x1>; ++ states = <1800000 0x0>, ++ <3300000 0x1>; + vin-supply = <&vcc5v0_sys>; + }; + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +index f807bc066ccb..d5001d13e374 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +@@ -76,8 +76,8 @@ + regulator-settling-time-us = <5000>; + regulator-type = "voltage"; + startup-delay-us = <2000>; +- states = <1800000 0x1 +- 3300000 0x0>; ++ states = <1800000 0x1>, ++ <3300000 0x0>; + vin-supply = <&vcc_io_33>; + }; + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +index a05732b59f38..a99979afd373 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +@@ -50,8 +50,8 @@ + vcc_sdio: sdmmcio-regulator { + compatible = "regulator-gpio"; + gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>; +- states = <1800000 0x1 +- 3300000 0x0>; ++ states = <1800000 0x1>, ++ <3300000 0x0>; + regulator-name = "vcc_sdio"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +index beee5fbb3443..5d7a9d96d163 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +@@ -245,7 +245,7 @@ pp1800_pcie: &pp1800_s0 { + }; + + &ppvar_sd_card_io { +- states = <1800000 0x0 3300000 0x1>; ++ states = <1800000 0x0>, <3300000 0x1>; + regulator-max-microvolt = <3300000>; + }; + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +index 4002742fed4c..c1bcc8ca3769 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +@@ -252,8 +252,8 @@ + enable-active-high; + enable-gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>; + gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>; +- states = <1800000 0x1 +- 3000000 0x0>; ++ states = <1800000 0x1>, ++ <3000000 0x0>; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-update-rk3399-pci-host-bridge-win.patch b/queue-5.13/arm64-dts-rockchip-update-rk3399-pci-host-bridge-win.patch new file mode 100644 index 00000000000..623c5b496e3 --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-update-rk3399-pci-host-bridge-win.patch @@ -0,0 +1,56 @@ +From 6f07b885f130d08b80c88ce413bf3c499b30d3f1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Jun 2021 20:28:56 +0900 +Subject: arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit + address memory + +From: Punit Agrawal + +[ Upstream commit 8efe01b4386ab38a36b99cfdc1dc02c38a8898c3 ] + +The PCIe host bridge on RK3399 advertises a single 64-bit memory +address range even though it lies entirely below 4GB. + +Previously the OF PCI range parser treated 64-bit ranges more +leniently (i.e., as 32-bit), but since commit 9d57e61bf723 ("of/pci: +Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses") +the code takes a stricter view and treats the ranges as advertised in +the device tree (i.e, as 64-bit). + +The change in behaviour causes failure when allocating bus addresses +to devices connected behind a PCI-to-PCI bridge that require +non-prefetchable memory ranges. The allocation failure was observed +for certain Samsung NVMe drives connected to RockPro64 boards. + +Update the host bridge window attributes to treat it as 32-bit address +memory. This fixes the allocation failure observed since commit +9d57e61bf723. + +Reported-by: Alexandru Elisei +Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com +Suggested-by: Robin Murphy +Signed-off-by: Punit Agrawal +Tested-by: Alexandru Elisei +Link: https://lore.kernel.org/r/20210607112856.3499682-5-punitagrawal@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 1703817c7354..7f8081f9e30e 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -227,7 +227,7 @@ + <&pcie_phy 2>, <&pcie_phy 3>; + phy-names = "pcie-phy-0", "pcie-phy-1", + "pcie-phy-2", "pcie-phy-3"; +- ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>, ++ ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>, + <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>; + resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, + <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>, +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-rockchip-use-only-supported-pcie-link-spee.patch b/queue-5.13/arm64-dts-rockchip-use-only-supported-pcie-link-spee.patch new file mode 100644 index 00000000000..894a9e89df7 --- /dev/null +++ b/queue-5.13/arm64-dts-rockchip-use-only-supported-pcie-link-spee.patch @@ -0,0 +1,62 @@ +From a0a6bc10670236950f4d9ffad85da8325ddabd1b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 15:17:09 +0100 +Subject: arm64: dts: rockchip: Use only supported PCIe link speed on rk3399 + +From: Peter Robinson + +[ Upstream commit 954d5986afa50c178ea7554e6abdd611d08f5ade ] + +The max link speed supported by the rk3399 is already set in the +rk3399.dtsi file so don't set unsupported link speeds in device +specific DTs. This is the same fix as 642fb27. + +Signed-off-by: Peter Robinson +Link: https://lore.kernel.org/r/20210413141709.845592-1-pbrobinson@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 1 - + arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 1 - + arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 1 - + 3 files changed, 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +index 16fd58c4a80f..8c0ff6c96e03 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +@@ -510,7 +510,6 @@ + }; + + &pcie0 { +- max-link-speed = <2>; + num-lanes = <2>; + vpcie0v9-supply = <&vcca0v9_s3>; + vpcie1v8-supply = <&vcca1v8_s3>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +index 7d0a7c697703..b28888ea9262 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +@@ -474,7 +474,6 @@ + + &pcie0 { + ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; +- max-link-speed = <2>; + num-lanes = <4>; + pinctrl-0 = <&pcie_clkreqnb_cpm>; + pinctrl-names = "default"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index c0074b3ed4af..01d1a75c8b4d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -329,7 +329,6 @@ + + &pcie0 { + ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; +- max-link-speed = <2>; + num-lanes = <4>; + pinctrl-0 = <&pcie_clkreqnb_cpm>; + pinctrl-names = "default"; +-- +2.30.2 + diff --git a/queue-5.13/arm64-dts-ti-k3-am654x-j721e-j7200-common-proc-board.patch b/queue-5.13/arm64-dts-ti-k3-am654x-j721e-j7200-common-proc-board.patch new file mode 100644 index 00000000000..258cd6e2dfb --- /dev/null +++ b/queue-5.13/arm64-dts-ti-k3-am654x-j721e-j7200-common-proc-board.patch @@ -0,0 +1,70 @@ +From 79b7400732aa3ef0e0f51bd30ee6f96a9ce17077 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 May 2021 16:20:41 +0300 +Subject: arm64: dts: ti: k3-am654x/j721e/j7200-common-proc-board: Fix + MCU_RGMII1_TXC direction + +From: Grygorii Strashko + +[ Upstream commit 69db725cdb2b803af67897a08ea54467d11f6020 ] + +The MCU RGMII MCU_RGMII1_TXC pin is defined as input by mistake, although +this does not make any difference functionality wise it's better to update +to avoid confusion. + +Hence fix MCU RGMII MCU_RGMII1_TXC pin pinmux definitions to be an output +in K3 am654x/j721e/j7200 board files. + +Signed-off-by: Grygorii Strashko +Reviewed-by: Vignesh Raghavendra +Signed-off-by: Nishanth Menon +Link: https://lore.kernel.org/r/20210526132041.6104-1-grygorii.strashko@ti.com +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 2 +- + arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 +- + arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +index 1b947e2c2e74..faa8e280cf2b 100644 +--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +@@ -136,7 +136,7 @@ + AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */ + AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */ + AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */ +- AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1) MCU_RGMII1_TXC */ ++ AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */ + AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */ + >; + }; +diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +index bedd01b7a32c..d14f3c18b65f 100644 +--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +@@ -90,7 +90,7 @@ + J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ + J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ + J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ +- J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ ++ J721E_WKUP_IOPAD(0x0080, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */ + J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ + >; + }; +diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +index ffccbc53f1e7..de3c3f7f2b7a 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +@@ -238,7 +238,7 @@ + J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ + J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ + J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ +- J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ ++ J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */ + J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ + >; + }; +-- +2.30.2 + diff --git a/queue-5.13/arm64-tegra-add-pmu-node-for-tegra194.patch b/queue-5.13/arm64-tegra-add-pmu-node-for-tegra194.patch new file mode 100644 index 00000000000..7f5729fb19d --- /dev/null +++ b/queue-5.13/arm64-tegra-add-pmu-node-for-tegra194.patch @@ -0,0 +1,49 @@ +From 98c2d619fe5f33ef2a9429e7a328534681fcf68b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 May 2021 17:41:35 +0100 +Subject: arm64: tegra: Add PMU node for Tegra194 + +From: Jon Hunter + +[ Upstream commit 9e79e58f330ea4860f2ced65a8a35dfb05fc03c1 ] + +Populate the device-tree node for the PMU device on Tegra194. This also +fixes the following warning that is observed on booting Tegra194. + + ERR KERN kvm: pmu event creation failed -2 + +Signed-off-by: Jon Hunter +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +index 9449156fae39..2e40b6047283 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +@@ -2345,6 +2345,20 @@ + }; + }; + ++ pmu { ++ compatible = "arm,armv8-pmuv3"; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ interrupt-affinity = <&cpu0_0 &cpu0_1 &cpu1_0 &cpu1_1 ++ &cpu2_0 &cpu2_1 &cpu3_0 &cpu3_1>; ++ }; ++ + psci { + compatible = "arm,psci-1.0"; + status = "okay"; +-- +2.30.2 + diff --git a/queue-5.13/cifs-prevent-null-deref-in-cifs_compose_mount_option.patch b/queue-5.13/cifs-prevent-null-deref-in-cifs_compose_mount_option.patch new file mode 100644 index 00000000000..dc7d81d3186 --- /dev/null +++ b/queue-5.13/cifs-prevent-null-deref-in-cifs_compose_mount_option.patch @@ -0,0 +1,37 @@ +From e3ccc7242fc8fafc9fb7fe54286b590758fd1f57 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Jul 2021 11:50:54 -0300 +Subject: cifs: prevent NULL deref in cifs_compose_mount_options() + +From: Paulo Alcantara + +[ Upstream commit 03313d1c3a2f086bb60920607ab79ac8f8578306 ] + +The optional @ref parameter might contain an NULL node_name, so +prevent dereferencing it in cifs_compose_mount_options(). + +Addresses-Coverity: 1476408 ("Explicit null dereferenced") +Signed-off-by: Paulo Alcantara (SUSE) +Signed-off-by: Steve French +Signed-off-by: Sasha Levin +--- + fs/cifs/cifs_dfs_ref.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c +index 8dec4edc8a9f..35a6007d88a9 100644 +--- a/fs/cifs/cifs_dfs_ref.c ++++ b/fs/cifs/cifs_dfs_ref.c +@@ -151,6 +151,9 @@ char *cifs_compose_mount_options(const char *sb_mountdata, + return ERR_PTR(-EINVAL); + + if (ref) { ++ if (WARN_ON_ONCE(!ref->node_name || ref->path_consumed < 0)) ++ return ERR_PTR(-EINVAL); ++ + if (strlen(fullpath) - ref->path_consumed) { + prepath = fullpath + ref->path_consumed; + /* skip initial delimiter */ +-- +2.30.2 + diff --git a/queue-5.13/firmware-arm_scmi-add-smccc-discovery-dependency-in-.patch b/queue-5.13/firmware-arm_scmi-add-smccc-discovery-dependency-in-.patch new file mode 100644 index 00000000000..202552828be --- /dev/null +++ b/queue-5.13/firmware-arm_scmi-add-smccc-discovery-dependency-in-.patch @@ -0,0 +1,53 @@ +From ca392c9a660063613be8a2f6b7a8a893248e1246 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 May 2021 15:40:51 +0200 +Subject: firmware: arm_scmi: Add SMCCC discovery dependency in Kconfig + +From: Etienne Carriere + +[ Upstream commit c05b07963e965ae34e75ee8c33af1095350cd87e ] + +ARM_SCMI_PROTOCOL depends on either MAILBOX or HAVE_ARM_SMCCC_DISCOVERY, +not MAILBOX alone. Fix the depedency in Kconfig file and driver to +reflect the same. + +Link: https://lore.kernel.org/r/20210521134055.24271-1-etienne.carriere@linaro.org +Reviewed-by: Cristian Marussi +Signed-off-by: Etienne Carriere +[sudeep.holla: Minor tweaks to subject and change log] +Signed-off-by: Sudeep Holla +Signed-off-by: Sasha Levin +--- + drivers/firmware/Kconfig | 2 +- + drivers/firmware/arm_scmi/common.h | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig +index db0ea2d2d75a..a9c613c32282 100644 +--- a/drivers/firmware/Kconfig ++++ b/drivers/firmware/Kconfig +@@ -9,7 +9,7 @@ menu "Firmware Drivers" + config ARM_SCMI_PROTOCOL + tristate "ARM System Control and Management Interface (SCMI) Message Protocol" + depends on ARM || ARM64 || COMPILE_TEST +- depends on MAILBOX ++ depends on MAILBOX || HAVE_ARM_SMCCC_DISCOVERY + help + ARM System Control and Management Interface (SCMI) protocol is a + set of operating system-independent software interfaces that are +diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h +index 228bf4a71d23..8685619d38f9 100644 +--- a/drivers/firmware/arm_scmi/common.h ++++ b/drivers/firmware/arm_scmi/common.h +@@ -331,7 +331,7 @@ struct scmi_desc { + }; + + extern const struct scmi_desc scmi_mailbox_desc; +-#ifdef CONFIG_HAVE_ARM_SMCCC ++#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY + extern const struct scmi_desc scmi_smc_desc; + #endif + +-- +2.30.2 + diff --git a/queue-5.13/firmware-arm_scmi-fix-the-build-when-config_mailbox-.patch b/queue-5.13/firmware-arm_scmi-fix-the-build-when-config_mailbox-.patch new file mode 100644 index 00000000000..fe02f0072d6 --- /dev/null +++ b/queue-5.13/firmware-arm_scmi-fix-the-build-when-config_mailbox-.patch @@ -0,0 +1,46 @@ +From 782388e6333186e40f55fffd0869cf73c59f4a18 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 3 Jun 2021 08:26:31 +0100 +Subject: firmware: arm_scmi: Fix the build when CONFIG_MAILBOX is not selected + +From: Sudeep Holla + +[ Upstream commit ab7766b72855e6a68109b915d071181b93086e29 ] + +0day CI kernel test robot reported following build error with randconfig + +aarch64-linux-ld: drivers/firmware/arm_scmi/driver.o:(.rodata+0x1e0): + undefined reference to `scmi_mailbox_desc' + +Fix the error by adding CONFIG_MAILBOX dependency for scmi_mailbox_desc. + +Link: https://lore.kernel.org/r/20210603072631.1660963-1-sudeep.holla@arm.com +Cc: Etienne Carriere +Cc: Cristian Marussi +Reviewed-by: Etienne Carriere +Reviewed-by: Cristian Marussi +Tested-by: Cristian Marussi +Reported-by: kernel test robot +Signed-off-by: Sudeep Holla +Signed-off-by: Sasha Levin +--- + drivers/firmware/arm_scmi/driver.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c +index c2983ed53494..74986bf96656 100644 +--- a/drivers/firmware/arm_scmi/driver.c ++++ b/drivers/firmware/arm_scmi/driver.c +@@ -1575,7 +1575,9 @@ ATTRIBUTE_GROUPS(versions); + + /* Each compatible listed below must have descriptor associated with it */ + static const struct of_device_id scmi_of_match[] = { ++#ifdef CONFIG_MAILBOX + { .compatible = "arm,scmi", .data = &scmi_mailbox_desc }, ++#endif + #ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY + { .compatible = "arm,scmi-smc", .data = &scmi_smc_desc}, + #endif +-- +2.30.2 + diff --git a/queue-5.13/firmware-tegra-bpmp-fix-tegra234-only-builds.patch b/queue-5.13/firmware-tegra-bpmp-fix-tegra234-only-builds.patch new file mode 100644 index 00000000000..c7b95ee0f3c --- /dev/null +++ b/queue-5.13/firmware-tegra-bpmp-fix-tegra234-only-builds.patch @@ -0,0 +1,63 @@ +From ec010102188496b20a855e194a772dbbea9897b5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 14:23:35 +0200 +Subject: firmware: tegra: bpmp: Fix Tegra234-only builds + +From: Thierry Reding + +[ Upstream commit bd778b893963d67d7eb01f49d84ffcd3eaf229dd ] + +The tegra186_bpmp_ops symbol is used on Tegra234, so make sure it's +available. + +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + drivers/firmware/tegra/Makefile | 1 + + drivers/firmware/tegra/bpmp-private.h | 3 ++- + drivers/firmware/tegra/bpmp.c | 3 ++- + 3 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/firmware/tegra/Makefile b/drivers/firmware/tegra/Makefile +index 49c87e00fafb..620cf3fdd607 100644 +--- a/drivers/firmware/tegra/Makefile ++++ b/drivers/firmware/tegra/Makefile +@@ -3,6 +3,7 @@ tegra-bpmp-y = bpmp.o + tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) += bpmp-tegra210.o + tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) += bpmp-tegra186.o + tegra-bpmp-$(CONFIG_ARCH_TEGRA_194_SOC) += bpmp-tegra186.o ++tegra-bpmp-$(CONFIG_ARCH_TEGRA_234_SOC) += bpmp-tegra186.o + tegra-bpmp-$(CONFIG_DEBUG_FS) += bpmp-debugfs.o + obj-$(CONFIG_TEGRA_BPMP) += tegra-bpmp.o + obj-$(CONFIG_TEGRA_IVC) += ivc.o +diff --git a/drivers/firmware/tegra/bpmp-private.h b/drivers/firmware/tegra/bpmp-private.h +index 54d560c48398..182bfe396516 100644 +--- a/drivers/firmware/tegra/bpmp-private.h ++++ b/drivers/firmware/tegra/bpmp-private.h +@@ -24,7 +24,8 @@ struct tegra_bpmp_ops { + }; + + #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ +- IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) ++ IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ ++ IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) + extern const struct tegra_bpmp_ops tegra186_bpmp_ops; + #endif + #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) +diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c +index 0742a90cb844..5654c5e9862b 100644 +--- a/drivers/firmware/tegra/bpmp.c ++++ b/drivers/firmware/tegra/bpmp.c +@@ -809,7 +809,8 @@ static const struct dev_pm_ops tegra_bpmp_pm_ops = { + }; + + #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ +- IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) ++ IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ ++ IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) + static const struct tegra_bpmp_soc tegra186_soc = { + .channels = { + .cpu_tx = { +-- +2.30.2 + diff --git a/queue-5.13/i3c-master-svc-drop-free_irq-of-devm_request_irq-all.patch b/queue-5.13/i3c-master-svc-drop-free_irq-of-devm_request_irq-all.patch new file mode 100644 index 00000000000..72fdbe1d0e2 --- /dev/null +++ b/queue-5.13/i3c-master-svc-drop-free_irq-of-devm_request_irq-all.patch @@ -0,0 +1,38 @@ +From 6da487a953c33128b7ae36ec7cfda00d0e50197e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 2 Jun 2021 16:49:35 +0800 +Subject: i3c: master: svc: drop free_irq of devm_request_irq allocated irq + +From: Yang Yingliang + +[ Upstream commit 59a61e69c4252b4e8ecd15e752b0d2337f0121b7 ] + +irq allocated with devm_request_irq() will be freed in devm_irq_release(), +using free_irq() in ->remove() will causes a dangling pointer, and a +subsequent double free. So remove the free_irq() in svc_i3c_master_remove(). + +Reported-by: Hulk Robot +Signed-off-by: Yang Yingliang +Reviewed-by: Miquel Raynal +Signed-off-by: Alexandre Belloni +Link: https://lore.kernel.org/r/20210602084935.3977636-1-yangyingliang@huawei.com +Signed-off-by: Sasha Levin +--- + drivers/i3c/master/svc-i3c-master.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c +index 1f6ba4221817..eeb49b5d90ef 100644 +--- a/drivers/i3c/master/svc-i3c-master.c ++++ b/drivers/i3c/master/svc-i3c-master.c +@@ -1448,7 +1448,6 @@ static int svc_i3c_master_remove(struct platform_device *pdev) + if (ret) + return ret; + +- free_irq(master->irq, master); + clk_disable_unprepare(master->pclk); + clk_disable_unprepare(master->fclk); + clk_disable_unprepare(master->sclk); +-- +2.30.2 + diff --git a/queue-5.13/kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch b/queue-5.13/kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch new file mode 100644 index 00000000000..00f7d346a73 --- /dev/null +++ b/queue-5.13/kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch @@ -0,0 +1,69 @@ +From da713847bd3b137609120906050ab62a94f66dfc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 12 Jun 2021 15:18:38 +0100 +Subject: kbuild: mkcompile_h: consider timestamp if KBUILD_BUILD_TIMESTAMP is + set + +From: Matthias Maennich + +[ Upstream commit a979522a1a88556e42a22ce61bccc58e304cb361 ] + +To avoid unnecessary recompilations, mkcompile_h does not regenerate +compile.h if just the timestamp changed. +Though, if KBUILD_BUILD_TIMESTAMP is set, an explicit timestamp for the +build was requested, in which case we should not ignore it. + +If a user follows the documentation for reproducible builds [1] and +defines KBUILD_BUILD_TIMESTAMP as the git commit timestamp, a clean +build will have the correct timestamp. A subsequent cherry-pick (or +amend) changes the commit timestamp and if an incremental build is done +with a different KBUILD_BUILD_TIMESTAMP now, that new value is not taken +into consideration. But it should for reproducibility. + +Hence, whenever KBUILD_BUILD_TIMESTAMP is explicitly set, do not ignore +UTS_VERSION when making a decision about whether the regenerated version +of compile.h should be moved into place. + +[1] https://www.kernel.org/doc/html/latest/kbuild/reproducible-builds.html + +Signed-off-by: Matthias Maennich +Signed-off-by: Masahiro Yamada +Signed-off-by: Sasha Levin +--- + scripts/mkcompile_h | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h +index 4ae735039daf..a72b154de7b0 100755 +--- a/scripts/mkcompile_h ++++ b/scripts/mkcompile_h +@@ -70,15 +70,23 @@ UTS_VERSION="$(echo $UTS_VERSION $CONFIG_FLAGS $TIMESTAMP | cut -b -$UTS_LEN)" + # Only replace the real compile.h if the new one is different, + # in order to preserve the timestamp and avoid unnecessary + # recompilations. +-# We don't consider the file changed if only the date/time changed. ++# We don't consider the file changed if only the date/time changed, ++# unless KBUILD_BUILD_TIMESTAMP was explicitly set (e.g. for ++# reproducible builds with that value referring to a commit timestamp). + # A kernel config change will increase the generation number, thus + # causing compile.h to be updated (including date/time) due to the + # changed comment in the + # first line. + ++if [ -z "$KBUILD_BUILD_TIMESTAMP" ]; then ++ IGNORE_PATTERN="UTS_VERSION" ++else ++ IGNORE_PATTERN="NOT_A_PATTERN_TO_BE_MATCHED" ++fi ++ + if [ -r $TARGET ] && \ +- grep -v 'UTS_VERSION' $TARGET > .tmpver.1 && \ +- grep -v 'UTS_VERSION' .tmpcompile > .tmpver.2 && \ ++ grep -v $IGNORE_PATTERN $TARGET > .tmpver.1 && \ ++ grep -v $IGNORE_PATTERN .tmpcompile > .tmpver.2 && \ + cmp -s .tmpver.1 .tmpver.2; then + rm -f .tmpcompile + else +-- +2.30.2 + diff --git a/queue-5.13/kbuild-sink-stdout-from-cmd-for-silent-build.patch b/queue-5.13/kbuild-sink-stdout-from-cmd-for-silent-build.patch new file mode 100644 index 00000000000..4a130bcca6e --- /dev/null +++ b/queue-5.13/kbuild-sink-stdout-from-cmd-for-silent-build.patch @@ -0,0 +1,99 @@ +From 2525e59dd55737cc904f3a47649d074563985c32 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 May 2021 16:03:13 +0900 +Subject: kbuild: sink stdout from cmd for silent build + +From: Masahiro Yamada + +[ Upstream commit 174a1dcc96429efce4ef7eb2f5c4506480da2182 ] + +When building with 'make -s', no output to stdout should be printed. + +As Arnd Bergmann reported [1], mkimage shows the detailed information +of the generated images. + +I think this should be suppressed by the 'cmd' macro instead of by +individual scripts. + +Insert 'exec >/dev/null;' in order to redirect stdout to /dev/null for +silent builds. + +[Note about this implementation] + +'exec >/dev/null;' may look somewhat tricky, but this has a reason. + +Appending '>/dev/null' at the end of command line is a common way for +redirection, so I first tried this: + + cmd = @set -e; $(echo-cmd) $(cmd_$(1)) >/dev/null + +... but it would not work if $(cmd_$(1)) itself contains a redirection. + +For example, cmd_wrap in scripts/Makefile.asm-generic redirects the +output from the 'echo' command into the target file. + +It would be expanded into: + + echo "#include " > $@ >/dev/null + +Then, the target file gets empty because the string will go to /dev/null +instead of $@. + +Next, I tried this: + + cmd = @set -e; $(echo-cmd) { $(cmd_$(1)); } >/dev/null + +The form above would be expanded into: + + { echo "#include " > $@; } >/dev/null + +This works as expected. However, it would be a syntax error if +$(cmd_$(1)) is empty. + +When CONFIG_TRIM_UNUSED_KSYMS is disabled, $(call cmd,gen_ksymdeps) in +scripts/Makefile.build would be expanded into: + + set -e; { ; } >/dev/null + +..., which causes an syntax error. + +I also tried this: + + cmd = @set -e; $(echo-cmd) ( $(cmd_$(1)) ) >/dev/null + +... but this causes a syntax error for the same reason. + +So, finally I adopted: + + cmd = @set -e; $(echo-cmd) exec >/dev/null; $(cmd_$(1)) + +[1]: https://lore.kernel.org/lkml/20210514135752.2910387-1-arnd@kernel.org/ + +Signed-off-by: Masahiro Yamada +Signed-off-by: Sasha Levin +--- + scripts/Kbuild.include | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include +index 82dd1b65b7a8..f247e691562d 100644 +--- a/scripts/Kbuild.include ++++ b/scripts/Kbuild.include +@@ -90,8 +90,13 @@ clean := -f $(srctree)/scripts/Makefile.clean obj + echo-cmd = $(if $($(quiet)cmd_$(1)),\ + echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';) + ++# sink stdout for 'make -s' ++ redirect := ++ quiet_redirect := ++silent_redirect := exec >/dev/null; ++ + # printing commands +-cmd = @set -e; $(echo-cmd) $(cmd_$(1)) ++cmd = @set -e; $(echo-cmd) $($(quiet)redirect) $(cmd_$(1)) + + ### + # if_changed - execute command if any prerequisite is newer than +-- +2.30.2 + diff --git a/queue-5.13/memory-tegra-fix-compilation-warnings-on-64bit-platf.patch b/queue-5.13/memory-tegra-fix-compilation-warnings-on-64bit-platf.patch new file mode 100644 index 00000000000..1d360600f4e --- /dev/null +++ b/queue-5.13/memory-tegra-fix-compilation-warnings-on-64bit-platf.patch @@ -0,0 +1,57 @@ +From 7bc67de97775f9da6627cdf73a364e6b4dd08fd8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 1 Jun 2021 05:31:12 +0300 +Subject: memory: tegra: Fix compilation warnings on 64bit platforms + +From: Dmitry Osipenko + +[ Upstream commit e0740fb869730110b36a4afcf05ad1b9d6f5fb6d ] + +Fix compilation warning on 64bit platforms caused by implicit promotion +of 32bit signed integer to a 64bit unsigned value which happens after +enabling compile-testing of the EMC drivers. + +Reported-by: kernel test robot +Reviewed-by: Nathan Chancellor +Reviewed-by: Krzysztof Kozlowski +Signed-off-by: Dmitry Osipenko +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + drivers/memory/tegra/tegra124-emc.c | 4 ++-- + drivers/memory/tegra/tegra30-emc.c | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c +index 5699d909abc2..a21ca8e0841a 100644 +--- a/drivers/memory/tegra/tegra124-emc.c ++++ b/drivers/memory/tegra/tegra124-emc.c +@@ -272,8 +272,8 @@ + #define EMC_PUTERM_ADJ 0x574 + + #define DRAM_DEV_SEL_ALL 0 +-#define DRAM_DEV_SEL_0 (2 << 30) +-#define DRAM_DEV_SEL_1 (1 << 30) ++#define DRAM_DEV_SEL_0 BIT(31) ++#define DRAM_DEV_SEL_1 BIT(30) + + #define EMC_CFG_POWER_FEATURES_MASK \ + (EMC_CFG_DYN_SREF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_SR | \ +diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c +index 829f6d673c96..a2f2738ccb94 100644 +--- a/drivers/memory/tegra/tegra30-emc.c ++++ b/drivers/memory/tegra/tegra30-emc.c +@@ -150,8 +150,8 @@ + #define EMC_SELF_REF_CMD_ENABLED BIT(0) + + #define DRAM_DEV_SEL_ALL (0 << 30) +-#define DRAM_DEV_SEL_0 (2 << 30) +-#define DRAM_DEV_SEL_1 (1 << 30) ++#define DRAM_DEV_SEL_0 BIT(31) ++#define DRAM_DEV_SEL_1 BIT(30) + #define DRAM_BROADCAST(num) \ + ((num) > 1 ? DRAM_DEV_SEL_ALL : DRAM_DEV_SEL_0) + +-- +2.30.2 + diff --git a/queue-5.13/perf-x86-intel-uncore-clean-up-error-handling-path-o.patch b/queue-5.13/perf-x86-intel-uncore-clean-up-error-handling-path-o.patch new file mode 100644 index 00000000000..634967ea993 --- /dev/null +++ b/queue-5.13/perf-x86-intel-uncore-clean-up-error-handling-path-o.patch @@ -0,0 +1,54 @@ +From a5c1b9760941fd261d7fff5ca1cbf6842f0d9792 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 24 Jun 2021 11:17:57 -0700 +Subject: perf/x86/intel/uncore: Clean up error handling path of iio mapping + +From: Kan Liang + +[ Upstream commit d4ba0b06306a70c99a43f9d452886a86e2d3bd26 ] + +The error handling path of iio mapping looks fragile. We already fixed +one issue caused by it, commit f797f05d917f ("perf/x86/intel/uncore: +Fix for iio mapping on Skylake Server"). Clean up the error handling +path and make the code robust. + +Reported-by: gushengxian +Signed-off-by: Kan Liang +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/40e66cf9-398b-20d7-ce4d-433be6e08921@linux.intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/events/intel/uncore_snbep.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c +index 3a75a2c601c2..1f7bb4898a9d 100644 +--- a/arch/x86/events/intel/uncore_snbep.c ++++ b/arch/x86/events/intel/uncore_snbep.c +@@ -3789,11 +3789,11 @@ static int skx_iio_set_mapping(struct intel_uncore_type *type) + /* One more for NULL. */ + attrs = kcalloc((uncore_max_dies() + 1), sizeof(*attrs), GFP_KERNEL); + if (!attrs) +- goto err; ++ goto clear_topology; + + eas = kcalloc(uncore_max_dies(), sizeof(*eas), GFP_KERNEL); + if (!eas) +- goto err; ++ goto clear_attrs; + + for (die = 0; die < uncore_max_dies(); die++) { + sprintf(buf, "die%ld", die); +@@ -3814,7 +3814,9 @@ err: + for (; die >= 0; die--) + kfree(eas[die].attr.attr.name); + kfree(eas); ++clear_attrs: + kfree(attrs); ++clear_topology: + kfree(type->topology); + clear_attr_update: + type->attr_update = NULL; +-- +2.30.2 + diff --git a/queue-5.13/reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch b/queue-5.13/reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch new file mode 100644 index 00000000000..b8fd275112f --- /dev/null +++ b/queue-5.13/reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch @@ -0,0 +1,43 @@ +From 4db9dba18d5475a26b5d16c53f1ee0867f9c9051 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 Mar 2021 17:01:39 +0100 +Subject: reset: ti-syscon: fix to_ti_syscon_reset_data macro + +From: Philipp Zabel + +[ Upstream commit 05cf8fffcdeb47aef1203c08cbec5224fd3a0e1c ] + +The to_ti_syscon_reset_data macro currently only works if the +parameter passed into it is called 'rcdev'. + +Fixes a checkpatch --strict issue: + + CHECK: Macro argument reuse 'rcdev' - possible side-effects? + #53: FILE: drivers/reset/reset-ti-syscon.c:53: + +#define to_ti_syscon_reset_data(rcdev) \ + + container_of(rcdev, struct ti_syscon_reset_data, rcdev) + +Signed-off-by: Philipp Zabel +Signed-off-by: Sasha Levin +--- + drivers/reset/reset-ti-syscon.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c +index 218370faf37b..2b92775d58f0 100644 +--- a/drivers/reset/reset-ti-syscon.c ++++ b/drivers/reset/reset-ti-syscon.c +@@ -58,8 +58,8 @@ struct ti_syscon_reset_data { + unsigned int nr_controls; + }; + +-#define to_ti_syscon_reset_data(rcdev) \ +- container_of(rcdev, struct ti_syscon_reset_data, rcdev) ++#define to_ti_syscon_reset_data(_rcdev) \ ++ container_of(_rcdev, struct ti_syscon_reset_data, rcdev) + + /** + * ti_syscon_reset_assert() - assert device reset +-- +2.30.2 + diff --git a/queue-5.13/rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch b/queue-5.13/rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch new file mode 100644 index 00000000000..573f5ecff69 --- /dev/null +++ b/queue-5.13/rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch @@ -0,0 +1,49 @@ +From f1032024965f6c43f347978a1d5e83f9aad17c91 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 May 2021 13:20:34 -0400 +Subject: rtc: max77686: Do not enforce (incorrect) interrupt trigger type + +From: Krzysztof Kozlowski + +[ Upstream commit 742b0d7e15c333303daad4856de0764f4bc83601 ] + +Interrupt line can be configured on different hardware in different way, +even inverted. Therefore driver should not enforce specific trigger +type - edge falling - but instead rely on Devicetree to configure it. + +The Maxim 77686 datasheet describes the interrupt line as active low +with a requirement of acknowledge from the CPU therefore the edge +falling is not correct. + +The interrupt line is shared between PMIC and RTC driver, so using level +sensitive interrupt is here especially important to avoid races. With +an edge configuration in case if first PMIC signals interrupt followed +shortly after by the RTC, the interrupt might not be yet cleared/acked +thus the second one would not be noticed. + +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Alexandre Belloni +Link: https://lore.kernel.org/r/20210526172036.183223-6-krzysztof.kozlowski@canonical.com +Signed-off-by: Sasha Levin +--- + drivers/rtc/rtc-max77686.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/rtc/rtc-max77686.c b/drivers/rtc/rtc-max77686.c +index d51cc12114cb..eae7cb9faf1e 100644 +--- a/drivers/rtc/rtc-max77686.c ++++ b/drivers/rtc/rtc-max77686.c +@@ -717,8 +717,8 @@ static int max77686_init_rtc_regmap(struct max77686_rtc_info *info) + + add_rtc_irq: + ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq, +- IRQF_TRIGGER_FALLING | IRQF_ONESHOT | +- IRQF_SHARED, 0, info->drv_data->rtc_irq_chip, ++ IRQF_ONESHOT | IRQF_SHARED, ++ 0, info->drv_data->rtc_irq_chip, + &info->rtc_irq_data); + if (ret < 0) { + dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret); +-- +2.30.2 + diff --git a/queue-5.13/rtc-mxc_v2-add-missing-module_device_table.patch b/queue-5.13/rtc-mxc_v2-add-missing-module_device_table.patch new file mode 100644 index 00000000000..400d188ee8a --- /dev/null +++ b/queue-5.13/rtc-mxc_v2-add-missing-module_device_table.patch @@ -0,0 +1,37 @@ +From 691e2c53db27cd6ceac05806eb547eb5e61bc9fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 8 May 2021 11:15:09 +0800 +Subject: rtc: mxc_v2: add missing MODULE_DEVICE_TABLE + +From: Bixuan Cui + +[ Upstream commit 206e04ec7539e7bfdde9aa79a7cde656c9eb308e ] + +This patch adds missing MODULE_DEVICE_TABLE definition which generates +correct modalias for automatic loading of this driver when it is built +as an external module. + +Reported-by: Hulk Robot +Signed-off-by: Bixuan Cui +Signed-off-by: Alexandre Belloni +Link: https://lore.kernel.org/r/20210508031509.53735-1-cuibixuan@huawei.com +Signed-off-by: Sasha Levin +--- + drivers/rtc/rtc-mxc_v2.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/rtc/rtc-mxc_v2.c b/drivers/rtc/rtc-mxc_v2.c +index a577a74aaf75..5e0383401629 100644 +--- a/drivers/rtc/rtc-mxc_v2.c ++++ b/drivers/rtc/rtc-mxc_v2.c +@@ -372,6 +372,7 @@ static const struct of_device_id mxc_ids[] = { + { .compatible = "fsl,imx53-rtc", }, + {} + }; ++MODULE_DEVICE_TABLE(of, mxc_ids); + + static struct platform_driver mxc_rtc_driver = { + .driver = { +-- +2.30.2 + diff --git a/queue-5.13/s390-introduce-proper-type-handling-call_on_stack-ma.patch b/queue-5.13/s390-introduce-proper-type-handling-call_on_stack-ma.patch new file mode 100644 index 00000000000..dfd2a9fc981 --- /dev/null +++ b/queue-5.13/s390-introduce-proper-type-handling-call_on_stack-ma.patch @@ -0,0 +1,146 @@ +From 7257e7e803c1d3e54a38aca8263fdd7490f3c796 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 5 Jul 2021 20:16:10 +0200 +Subject: s390: introduce proper type handling call_on_stack() macro + +From: Heiko Carstens + +[ Upstream commit 41d71fe59cce41237f24f3b7bdc1b414069a34ed ] + +The existing CALL_ON_STACK() macro allows for subtle bugs: + +- There is no type checking of the function that is being called. That + is: missing or too many arguments do not cause any compile error or + warning. The same is true if the return type of the called function + changes. This can lead to quite random bugs. + +- Sign and zero extension of arguments is missing. Given that the s390 + C ABI requires that the caller of a function performs proper sign + and zero extension this can also lead to subtle bugs. + +- If arguments to the CALL_ON_STACK() macros contain functions calls + register corruption can happen due to register asm constructs being + used. + +Therefore introduce a new call_on_stack() macro which is supposed to +fix all these problems. + +Reviewed-by: Sven Schnelle +Signed-off-by: Heiko Carstens +Signed-off-by: Vasily Gorbik +Signed-off-by: Sasha Levin +--- + arch/s390/include/asm/stacktrace.h | 97 ++++++++++++++++++++++++++++++ + 1 file changed, 97 insertions(+) + +diff --git a/arch/s390/include/asm/stacktrace.h b/arch/s390/include/asm/stacktrace.h +index 76c6034428be..b4d936580fbf 100644 +--- a/arch/s390/include/asm/stacktrace.h ++++ b/arch/s390/include/asm/stacktrace.h +@@ -129,6 +129,103 @@ struct stack_frame { + r2; \ + }) + ++#define CALL_LARGS_0(...) \ ++ long dummy = 0 ++#define CALL_LARGS_1(t1, a1) \ ++ long arg1 = (long)(t1)(a1) ++#define CALL_LARGS_2(t1, a1, t2, a2) \ ++ CALL_LARGS_1(t1, a1); \ ++ long arg2 = (long)(t2)(a2) ++#define CALL_LARGS_3(t1, a1, t2, a2, t3, a3) \ ++ CALL_LARGS_2(t1, a1, t2, a2); \ ++ long arg3 = (long)(t3)(a3) ++#define CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4) \ ++ CALL_LARGS_3(t1, a1, t2, a2, t3, a3); \ ++ long arg4 = (long)(t4)(a4) ++#define CALL_LARGS_5(t1, a1, t2, a2, t3, a3, t4, a4, t5, a5) \ ++ CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4); \ ++ long arg5 = (long)(t5)(a5) ++ ++#define CALL_REGS_0 \ ++ register long r2 asm("2") = dummy ++#define CALL_REGS_1 \ ++ register long r2 asm("2") = arg1 ++#define CALL_REGS_2 \ ++ CALL_REGS_1; \ ++ register long r3 asm("3") = arg2 ++#define CALL_REGS_3 \ ++ CALL_REGS_2; \ ++ register long r4 asm("4") = arg3 ++#define CALL_REGS_4 \ ++ CALL_REGS_3; \ ++ register long r5 asm("5") = arg4 ++#define CALL_REGS_5 \ ++ CALL_REGS_4; \ ++ register long r6 asm("6") = arg5 ++ ++#define CALL_TYPECHECK_0(...) ++#define CALL_TYPECHECK_1(t, a, ...) \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_2(t, a, ...) \ ++ CALL_TYPECHECK_1(__VA_ARGS__); \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_3(t, a, ...) \ ++ CALL_TYPECHECK_2(__VA_ARGS__); \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_4(t, a, ...) \ ++ CALL_TYPECHECK_3(__VA_ARGS__); \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_5(t, a, ...) \ ++ CALL_TYPECHECK_4(__VA_ARGS__); \ ++ typecheck(t, a) ++ ++#define CALL_PARM_0(...) void ++#define CALL_PARM_1(t, a, ...) t ++#define CALL_PARM_2(t, a, ...) t, CALL_PARM_1(__VA_ARGS__) ++#define CALL_PARM_3(t, a, ...) t, CALL_PARM_2(__VA_ARGS__) ++#define CALL_PARM_4(t, a, ...) t, CALL_PARM_3(__VA_ARGS__) ++#define CALL_PARM_5(t, a, ...) t, CALL_PARM_4(__VA_ARGS__) ++#define CALL_PARM_6(t, a, ...) t, CALL_PARM_5(__VA_ARGS__) ++ ++/* ++ * Use call_on_stack() to call a function switching to a specified ++ * stack. Proper sign and zero extension of function arguments is ++ * done. Usage: ++ * ++ * rc = call_on_stack(nr, stack, rettype, fn, t1, a1, t2, a2, ...) ++ * ++ * - nr specifies the number of function arguments of fn. ++ * - stack specifies the stack to be used. ++ * - fn is the function to be called. ++ * - rettype is the return type of fn. ++ * - t1, a1, ... are pairs, where t1 must match the type of the first ++ * argument of fn, t2 the second, etc. a1 is the corresponding ++ * first function argument (not name), etc. ++ */ ++#define call_on_stack(nr, stack, rettype, fn, ...) \ ++({ \ ++ rettype (*__fn)(CALL_PARM_##nr(__VA_ARGS__)) = fn; \ ++ unsigned long frame = current_frame_address(); \ ++ unsigned long __stack = stack; \ ++ unsigned long prev; \ ++ CALL_LARGS_##nr(__VA_ARGS__); \ ++ CALL_REGS_##nr; \ ++ \ ++ CALL_TYPECHECK_##nr(__VA_ARGS__); \ ++ asm volatile( \ ++ " lgr %[_prev],15\n" \ ++ " lg 15,%[_stack]\n" \ ++ " stg %[_frame],%[_bc](15)\n" \ ++ " brasl 14,%[_fn]\n" \ ++ " lgr 15,%[_prev]\n" \ ++ : [_prev] "=&d" (prev), CALL_FMT_##nr \ ++ : [_stack] "R" (__stack), \ ++ [_bc] "i" (offsetof(struct stack_frame, back_chain)), \ ++ [_frame] "d" (frame), \ ++ [_fn] "X" (__fn) : CALL_CLOBBER_##nr); \ ++ (rettype)r2; \ ++}) ++ + #define CALL_ON_STACK_NORETURN(fn, stack) \ + ({ \ + asm volatile( \ +-- +2.30.2 + diff --git a/queue-5.13/s390-traps-do-not-test-monitor-call-without-config_b.patch b/queue-5.13/s390-traps-do-not-test-monitor-call-without-config_b.patch new file mode 100644 index 00000000000..1b254069e84 --- /dev/null +++ b/queue-5.13/s390-traps-do-not-test-monitor-call-without-config_b.patch @@ -0,0 +1,38 @@ +From 3fb2e63b04a58abc8552b726125131fdf6455d1e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Jul 2021 15:54:55 +0200 +Subject: s390/traps: do not test MONITOR CALL without CONFIG_BUG + +From: Ilya Leoshkevich + +[ Upstream commit b8e9cc20b808e26329090c19ff80b7f5098e98ff ] + +tinyconfig fails to boot, because without CONFIG_BUG report_bug() +always returns BUG_TRAP_TYPE_BUG, which causes mc 0,0 in +test_monitor_call() to panic. Fix by skipping the test without +CONFIG_BUG. + +Signed-off-by: Ilya Leoshkevich +Reviewed-by: Heiko Carstens +Signed-off-by: Vasily Gorbik +Signed-off-by: Sasha Levin +--- + arch/s390/kernel/traps.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c +index 8dd23c703718..662f52eb7639 100644 +--- a/arch/s390/kernel/traps.c ++++ b/arch/s390/kernel/traps.c +@@ -277,6 +277,8 @@ static void __init test_monitor_call(void) + { + int val = 1; + ++ if (!IS_ENABLED(CONFIG_BUG)) ++ return; + asm volatile( + " mc 0,0\n" + "0: xgr %0,%0\n" +-- +2.30.2 + diff --git a/queue-5.13/sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch b/queue-5.13/sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch new file mode 100644 index 00000000000..aacd0b452c9 --- /dev/null +++ b/queue-5.13/sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch @@ -0,0 +1,53 @@ +From daa40a90b1a4731d40cba5c7ab1bcab19c741ab2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 29 Jun 2021 14:14:52 +0200 +Subject: sched/fair: Fix CFS bandwidth hrtimer expiry type + +From: Odin Ugedal + +[ Upstream commit 72d0ad7cb5bad265adb2014dbe46c4ccb11afaba ] + +The time remaining until expiry of the refresh_timer can be negative. +Casting the type to an unsigned 64-bit value will cause integer +underflow, making the runtime_refresh_within return false instead of +true. These situations are rare, but they do happen. + +This does not cause user-facing issues or errors; other than +possibly unthrottling cfs_rq's using runtime from the previous period(s), +making the CFS bandwidth enforcement less strict in those (special) +situations. + +Signed-off-by: Odin Ugedal +Signed-off-by: Peter Zijlstra (Intel) +Reviewed-by: Ben Segall +Link: https://lore.kernel.org/r/20210629121452.18429-1-odin@uged.al +Signed-off-by: Sasha Levin +--- + kernel/sched/fair.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c +index 7dd0d859d95b..f60ef0b4ec33 100644 +--- a/kernel/sched/fair.c ++++ b/kernel/sched/fair.c +@@ -5108,7 +5108,7 @@ static const u64 cfs_bandwidth_slack_period = 5 * NSEC_PER_MSEC; + static int runtime_refresh_within(struct cfs_bandwidth *cfs_b, u64 min_expire) + { + struct hrtimer *refresh_timer = &cfs_b->period_timer; +- u64 remaining; ++ s64 remaining; + + /* if the call-back is running a quota refresh is already occurring */ + if (hrtimer_callback_running(refresh_timer)) +@@ -5116,7 +5116,7 @@ static int runtime_refresh_within(struct cfs_bandwidth *cfs_b, u64 min_expire) + + /* is a quota refresh about to occur? */ + remaining = ktime_to_ns(hrtimer_expires_remaining(refresh_timer)); +- if (remaining < min_expire) ++ if (remaining < (s64)min_expire) + return 1; + + return 0; +-- +2.30.2 + diff --git a/queue-5.13/scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch b/queue-5.13/scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch new file mode 100644 index 00000000000..618c37029cf --- /dev/null +++ b/queue-5.13/scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch @@ -0,0 +1,46 @@ +From a0023af8739d8f32083076b25280a6b1d6982961 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 21 Jun 2021 16:17:27 +0100 +Subject: scsi: aic7xxx: Fix unintentional sign extension issue on left shift + of u8 + +From: Colin Ian King + +[ Upstream commit 332a9dd1d86f1e7203fc7f0fd7e82f0b304200fe ] + +The shifting of the u8 integer returned fom ahc_inb(ahc, port+3) by 24 bits +to the left will be promoted to a 32 bit signed int and then sign-extended +to a u64. In the event that the top bit of the u8 is set then all then all +the upper 32 bits of the u64 end up as also being set because of the +sign-extension. Fix this by casting the u8 values to a u64 before the 24 +bit left shift. + +[ This dates back to 2002, I found the offending commit from the git +history git://git.kernel.org/pub/scm/linux/kernel/git/tglx/history.git, +commit f58eb66c0b0a ("Update aic7xxx driver to 6.2.10...") ] + +Link: https://lore.kernel.org/r/20210621151727.20667-1-colin.king@canonical.com +Signed-off-by: Colin Ian King +Signed-off-by: Martin K. Petersen +Addresses-Coverity: ("Unintended sign extension") +Signed-off-by: Sasha Levin +--- + drivers/scsi/aic7xxx/aic7xxx_core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/scsi/aic7xxx/aic7xxx_core.c b/drivers/scsi/aic7xxx/aic7xxx_core.c +index 4b04ab8908f8..a396f048a031 100644 +--- a/drivers/scsi/aic7xxx/aic7xxx_core.c ++++ b/drivers/scsi/aic7xxx/aic7xxx_core.c +@@ -493,7 +493,7 @@ ahc_inq(struct ahc_softc *ahc, u_int port) + return ((ahc_inb(ahc, port)) + | (ahc_inb(ahc, port+1) << 8) + | (ahc_inb(ahc, port+2) << 16) +- | (ahc_inb(ahc, port+3) << 24) ++ | (((uint64_t)ahc_inb(ahc, port+3)) << 24) + | (((uint64_t)ahc_inb(ahc, port+4)) << 32) + | (((uint64_t)ahc_inb(ahc, port+5)) << 40) + | (((uint64_t)ahc_inb(ahc, port+6)) << 48) +-- +2.30.2 + diff --git a/queue-5.13/scsi-libfc-fix-array-index-out-of-bound-exception.patch b/queue-5.13/scsi-libfc-fix-array-index-out-of-bound-exception.patch new file mode 100644 index 00000000000..66680f556f9 --- /dev/null +++ b/queue-5.13/scsi-libfc-fix-array-index-out-of-bound-exception.patch @@ -0,0 +1,53 @@ +From c325e633e3c388c0a4a6a811397c3dea751b4146 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 15 Jun 2021 09:59:39 -0700 +Subject: scsi: libfc: Fix array index out of bound exception + +From: Javed Hasan + +[ Upstream commit b27c4577557045f1ab3cdfeabfc7f3cd24aca1fe ] + +Fix array index out of bound exception in fc_rport_prli_resp(). + +Link: https://lore.kernel.org/r/20210615165939.24327-1-jhasan@marvell.com +Signed-off-by: Javed Hasan +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/libfc/fc_rport.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c +index cd0fb8ca2425..33da3c1085f0 100644 +--- a/drivers/scsi/libfc/fc_rport.c ++++ b/drivers/scsi/libfc/fc_rport.c +@@ -1162,6 +1162,7 @@ static void fc_rport_prli_resp(struct fc_seq *sp, struct fc_frame *fp, + resp_code = (pp->spp.spp_flags & FC_SPP_RESP_MASK); + FC_RPORT_DBG(rdata, "PRLI spp_flags = 0x%x spp_type 0x%x\n", + pp->spp.spp_flags, pp->spp.spp_type); ++ + rdata->spp_type = pp->spp.spp_type; + if (resp_code != FC_SPP_RESP_ACK) { + if (resp_code == FC_SPP_RESP_CONF) +@@ -1184,11 +1185,13 @@ static void fc_rport_prli_resp(struct fc_seq *sp, struct fc_frame *fp, + /* + * Call prli provider if we should act as a target + */ +- prov = fc_passive_prov[rdata->spp_type]; +- if (prov) { +- memset(&temp_spp, 0, sizeof(temp_spp)); +- prov->prli(rdata, pp->prli.prli_spp_len, +- &pp->spp, &temp_spp); ++ if (rdata->spp_type < FC_FC4_PROV_SIZE) { ++ prov = fc_passive_prov[rdata->spp_type]; ++ if (prov) { ++ memset(&temp_spp, 0, sizeof(temp_spp)); ++ prov->prli(rdata, pp->prli.prli_spp_len, ++ &pp->spp, &temp_spp); ++ } + } + /* + * Check if the image pair could be established +-- +2.30.2 + diff --git a/queue-5.13/scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch b/queue-5.13/scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch new file mode 100644 index 00000000000..7a64e189d2b --- /dev/null +++ b/queue-5.13/scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch @@ -0,0 +1,165 @@ +From 28846c305c494877135a43e64ad50b962a060e43 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 22 Jun 2021 11:40:37 +0800 +Subject: scsi: libsas: Add LUN number check in .slave_alloc callback + +From: Yufen Yu + +[ Upstream commit 49da96d77938db21864dae6b7736b71e96c1d203 ] + +Offlining a SATA device connected to a hisi SAS controller and then +scanning the host will result in detecting 255 non-existent devices: + + # lsscsi + [2:0:0:0] disk ATA Samsung SSD 860 2B6Q /dev/sda + [2:0:1:0] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdb + [2:0:2:0] disk SEAGATE ST600MM0006 B001 /dev/sdc + # echo "offline" > /sys/block/sdb/device/state + # echo "- - -" > /sys/class/scsi_host/host2/scan + # lsscsi + [2:0:0:0] disk ATA Samsung SSD 860 2B6Q /dev/sda + [2:0:1:0] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdb + [2:0:1:1] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdh + ... + [2:0:1:255] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdjb + +After a REPORT LUN command issued to the offline device fails, the SCSI +midlayer tries to do a sequential scan of all devices whose LUN number is +not 0. However, SATA does not support LUN numbers at all. + +Introduce a generic sas_slave_alloc() handler which will return -ENXIO for +SATA devices if the requested LUN number is larger than 0 and make libsas +drivers use this function as their .slave_alloc callback. + +Link: https://lore.kernel.org/r/20210622034037.1467088-1-yuyufen@huawei.com +Reported-by: Wu Bo +Suggested-by: John Garry +Reviewed-by: John Garry +Reviewed-by: Jason Yan +Signed-off-by: Yufen Yu +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/aic94xx/aic94xx_init.c | 1 + + drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 1 + + drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 1 + + drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 1 + + drivers/scsi/isci/init.c | 1 + + drivers/scsi/libsas/sas_scsi_host.c | 9 +++++++++ + drivers/scsi/mvsas/mv_init.c | 1 + + drivers/scsi/pm8001/pm8001_init.c | 1 + + 8 files changed, 16 insertions(+) + +diff --git a/drivers/scsi/aic94xx/aic94xx_init.c b/drivers/scsi/aic94xx/aic94xx_init.c +index a195bfe9eccc..7a78606598c4 100644 +--- a/drivers/scsi/aic94xx/aic94xx_init.c ++++ b/drivers/scsi/aic94xx/aic94xx_init.c +@@ -53,6 +53,7 @@ static struct scsi_host_template aic94xx_sht = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c +index 3cba7bfba296..30199663c7d8 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c +@@ -1771,6 +1771,7 @@ static struct scsi_host_template sht_v1_hw = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +index 46f60fc2a069..9df1639ffa65 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +@@ -3584,6 +3584,7 @@ static struct scsi_host_template sht_v2_hw = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +index e95408314078..36ec3901cfd4 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +@@ -3155,6 +3155,7 @@ static struct scsi_host_template sht_v3_hw = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +diff --git a/drivers/scsi/isci/init.c b/drivers/scsi/isci/init.c +index c452849e7bb4..ffd33e5decae 100644 +--- a/drivers/scsi/isci/init.c ++++ b/drivers/scsi/isci/init.c +@@ -167,6 +167,7 @@ static struct scsi_host_template isci_sht = { + .eh_abort_handler = sas_eh_abort_handler, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +diff --git a/drivers/scsi/libsas/sas_scsi_host.c b/drivers/scsi/libsas/sas_scsi_host.c +index 1bf939818c98..ee44a0d7730b 100644 +--- a/drivers/scsi/libsas/sas_scsi_host.c ++++ b/drivers/scsi/libsas/sas_scsi_host.c +@@ -911,6 +911,14 @@ void sas_task_abort(struct sas_task *task) + blk_abort_request(sc->request); + } + ++int sas_slave_alloc(struct scsi_device *sdev) ++{ ++ if (dev_is_sata(sdev_to_domain_dev(sdev)) && sdev->lun) ++ return -ENXIO; ++ ++ return 0; ++} ++ + void sas_target_destroy(struct scsi_target *starget) + { + struct domain_device *found_dev = starget->hostdata; +@@ -957,5 +965,6 @@ EXPORT_SYMBOL_GPL(sas_task_abort); + EXPORT_SYMBOL_GPL(sas_phy_reset); + EXPORT_SYMBOL_GPL(sas_eh_device_reset_handler); + EXPORT_SYMBOL_GPL(sas_eh_target_reset_handler); ++EXPORT_SYMBOL_GPL(sas_slave_alloc); + EXPORT_SYMBOL_GPL(sas_target_destroy); + EXPORT_SYMBOL_GPL(sas_ioctl); +diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c +index 6aa2697c4a15..b03c0f35d7b0 100644 +--- a/drivers/scsi/mvsas/mv_init.c ++++ b/drivers/scsi/mvsas/mv_init.c +@@ -46,6 +46,7 @@ static struct scsi_host_template mvs_sht = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c +index af09bd282cb9..313248c7bab9 100644 +--- a/drivers/scsi/pm8001/pm8001_init.c ++++ b/drivers/scsi/pm8001/pm8001_init.c +@@ -101,6 +101,7 @@ static struct scsi_host_template pm8001_sht = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + #ifdef CONFIG_COMPAT +-- +2.30.2 + diff --git a/queue-5.13/scsi-qedf-add-check-to-synchronize-abort-and-flush.patch b/queue-5.13/scsi-qedf-add-check-to-synchronize-abort-and-flush.patch new file mode 100644 index 00000000000..b6562160d5d --- /dev/null +++ b/queue-5.13/scsi-qedf-add-check-to-synchronize-abort-and-flush.patch @@ -0,0 +1,98 @@ +From 3bc467b2059472302ef382c610cfba8c4bf78519 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 24 Jun 2021 10:18:02 -0700 +Subject: scsi: qedf: Add check to synchronize abort and flush + +From: Javed Hasan + +[ Upstream commit df99446d5c2a63dc6e6920c8090da0e9da6539d5 ] + +A race condition was observed between qedf_cleanup_fcport() and +qedf_process_error_detect()->qedf_initiate_abts(): + + [2069091.203145] BUG: unable to handle kernel NULL pointer dereference at 0000000000000030 + [2069091.213100] IP: [] qedf_process_error_detect+0x96/0x130 [qedf] + [2069091.223391] PGD 1943049067 PUD 194304e067 PMD 0 + [2069091.233420] Oops: 0000 [#1] SMP + [2069091.361820] CPU: 1 PID: 14751 Comm: kworker/1:46 Kdump: loaded Tainted: P OE ------------ 3.10.0-1160.25.1.el7.x86_64 #1 + [2069091.388474] Hardware name: HPE Synergy 480 Gen10/Synergy 480 Gen10 Compute Module, BIOS I42 04/08/2020 + [2069091.402148] Workqueue: qedf_io_wq qedf_fp_io_handler [qedf] + [2069091.415780] task: ffff9bb9f5190000 ti: ffff9bacaef9c000 task.ti: ffff9bacaef9c000 + [2069091.429590] RIP: 0010:[] [] qedf_process_error_detect+0x96/0x130 [qedf] + [2069091.443666] RSP: 0018:ffff9bacaef9fdb8 EFLAGS: 00010246 + [2069091.457692] RAX: 0000000000000000 RBX: ffff9bbbbbfb18a0 RCX: ffffffffc0672310 + [2069091.471997] RDX: 00000000000005de RSI: ffffffffc066e7f0 RDI: ffff9beb3f4538d8 + [2069091.486130] RBP: ffff9bacaef9fdd8 R08: 0000000000006000 R09: 0000000000006000 + [2069091.500321] R10: 0000000000001551 R11: ffffb582996ffff8 R12: ffffb5829b39cc18 + [2069091.514779] R13: ffff9badab380c28 R14: ffffd5827f643900 R15: 0000000000000040 + [2069091.529472] FS: 0000000000000000(0000) GS:ffff9beb3f440000(0000) knlGS:0000000000000000 + [2069091.543926] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + [2069091.558942] CR2: 0000000000000030 CR3: 000000193b9a2000 CR4: 00000000007607e0 + [2069091.573424] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + [2069091.587876] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 + [2069091.602007] PKRU: 00000000 + [2069091.616010] Call Trace: + [2069091.629902] [] qedf_process_cqe+0x109/0x2e0 [qedf] + [2069091.643941] [] qedf_fp_io_handler+0x26/0x60 [qedf] + [2069091.657948] [] process_one_work+0x17f/0x440 + [2069091.672111] [] worker_thread+0x126/0x3c0 + [2069091.686057] [] ? manage_workers.isra.26+0x2a0/0x2a0 + [2069091.700033] [] kthread+0xd1/0xe0 + [2069091.713891] [] ? insert_kthread_work+0x40/0x40 + +Add check in qedf_process_error_detect(). When flush is active, let the +cmds be completed from the cleanup contex. + +Link: https://lore.kernel.org/r/20210624171802.598-1-jhasan@marvell.com +Signed-off-by: Javed Hasan +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedf/qedf_io.c | 22 +++++++++++++++++++++- + 1 file changed, 21 insertions(+), 1 deletion(-) + +diff --git a/drivers/scsi/qedf/qedf_io.c b/drivers/scsi/qedf/qedf_io.c +index 4869ef813dc4..63f99f4eeed9 100644 +--- a/drivers/scsi/qedf/qedf_io.c ++++ b/drivers/scsi/qedf/qedf_io.c +@@ -1520,9 +1520,19 @@ void qedf_process_error_detect(struct qedf_ctx *qedf, struct fcoe_cqe *cqe, + { + int rval; + ++ if (io_req == NULL) { ++ QEDF_INFO(NULL, QEDF_LOG_IO, "io_req is NULL.\n"); ++ return; ++ } ++ ++ if (io_req->fcport == NULL) { ++ QEDF_INFO(NULL, QEDF_LOG_IO, "fcport is NULL.\n"); ++ return; ++ } ++ + if (!cqe) { + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, +- "cqe is NULL for io_req %p\n", io_req); ++ "cqe is NULL for io_req %p\n", io_req); + return; + } + +@@ -1538,6 +1548,16 @@ void qedf_process_error_detect(struct qedf_ctx *qedf, struct fcoe_cqe *cqe, + le32_to_cpu(cqe->cqe_info.err_info.rx_buf_off), + le32_to_cpu(cqe->cqe_info.err_info.rx_id)); + ++ /* When flush is active, let the cmds be flushed out from the cleanup context */ ++ if (test_bit(QEDF_RPORT_IN_TARGET_RESET, &io_req->fcport->flags) || ++ (test_bit(QEDF_RPORT_IN_LUN_RESET, &io_req->fcport->flags) && ++ io_req->sc_cmd->device->lun == (u64)io_req->fcport->lun_reset_lun)) { ++ QEDF_ERR(&qedf->dbg_ctx, ++ "Dropping EQE for xid=0x%x as fcport is flushing", ++ io_req->xid); ++ return; ++ } ++ + if (qedf->stop_io_on_error) { + qedf_stop_all_io(qedf); + return; +-- +2.30.2 + diff --git a/queue-5.13/series b/queue-5.13/series new file mode 100644 index 00000000000..0c3f552a891 --- /dev/null +++ b/queue-5.13/series @@ -0,0 +1,106 @@ +arm-dts-gemini-rename-mdio-to-the-right-name.patch +arm-dts-gemini-add-device_type-on-pci.patch +arm-dts-rockchip-fix-thermal-sensor-cells-o-rk322x.patch +arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch +arm64-dts-rockchip-use-only-supported-pcie-link-spee.patch +arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch +arm-dts-rockchip-fix-the-timer-clocks-order.patch +arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch +arm-dts-rockchip-fix-power-controller-node-names-for.patch +arm-dts-rockchip-fix-power-controller-node-names-for.patch-30401 +arm-dts-rockchip-fix-power-controller-node-names-for.patch-9690 +arm64-dts-rockchip-fix-power-controller-node-names-f.patch +arm64-dts-rockchip-fix-power-controller-node-names-f.patch-32278 +arm64-dts-rockchip-fix-power-controller-node-names-f.patch-7583 +reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch +arm-dts-bcm5301x-fix-nand-nodes-names.patch +arm-brcmstb-dts-fix-nand-nodes-names.patch +arm-cygnus-dts-fix-nand-nodes-names.patch +arm-nsp-dts-fix-nand-nodes-names.patch +arm-dts-bcm63xx-fix-nand-nodes-names.patch +arm-dts-hurricane-2-fix-nand-nodes-names.patch +arm-dts-bcm5301x-fix-pinmux-subnodes-names.patch +soc-bcm-brcmstb-remove-unused-variable-brcmstb_machi.patch +arm-dts-exynos-align-broadcom-wifi-with-dtschema.patch +soc-mediatek-add-missing-module_device_table.patch +arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch +arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch +arm64-dts-rockchip-fix-regulator-gpio-states-array.patch +arm-dts-ux500-fix-interrupt-cells.patch +arm-dts-ux500-rename-gpio-controller-node.patch +arm-dts-ux500-fix-orientation-of-accelerometer.patch +arm-dts-ux500-fix-some-compatible-strings.patch +arm-dts-imx6dl-riotboard-configure-phy-clock-and-set.patch +arm-dts-ux500-fix-orientation-of-janice-acceleromete.patch +rtc-mxc_v2-add-missing-module_device_table.patch +arm64-dts-renesas-beacon-fix-usb-extal-reference.patch +arm64-dts-renesas-beacon-fix-usb-ref-clock-reference.patch +kbuild-sink-stdout-from-cmd-for-silent-build.patch +arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch +arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch +arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch +arm-dts-omap5-board-common-align-gpio-hog-names-with.patch +arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch +arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch +arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch +arm-dts-am335x-fix-ti-no-reset-on-init-flag-for-gpio.patch +arm-dts-omap2-replace-underscores-in-sub-mailbox-nod.patch +arm64-tegra-add-pmu-node-for-tegra194.patch +arm64-dts-ti-k3-am654x-j721e-j7200-common-proc-board.patch +arm-tegra-wm8903-fix-polarity-of-headphones-detectio.patch +arm-tegra-nexus7-correct-3v3-regulator-gpio-of-pm269.patch +arm64-dts-qcom-sm8350-fix-the-node-unit-addresses.patch +arm64-dts-qcom-msm8996-make-cpucc-actually-probe-and.patch +arm64-dts-qcom-sm8250-fix-display-nodes.patch +arm64-dts-qcom-sc7180-move-rmtfs-memory-region.patch +arm-dts-stm32-remove-extra-size-cells-on-dhcom-pdk2.patch +arm-dts-stm32-fix-touchscreen-node-on-dhcom-pdk2.patch +arm-dts-stm32-fix-stm32mp157c-odyssey-card-detect-pi.patch +arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch +arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch +arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch +memory-tegra-fix-compilation-warnings-on-64bit-platf.patch +firmware-arm_scmi-add-smccc-discovery-dependency-in-.patch +firmware-arm_scmi-fix-the-build-when-config_mailbox-.patch +arm-dts-aspeed-everest-fix-cable-card-pca-chips.patch +arm-dts-bcm283x-fix-up-mmc-node-names.patch +arm-dts-bcm283x-fix-up-gpio-led-node-names.patch +i3c-master-svc-drop-free_irq-of-devm_request_irq-all.patch +arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch +arm-dts-rockchip-fix-supply-properties-in-io-domains.patch +arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch +arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch +arm-dts-stm32-fix-ltdc-pinctrl-on-microdev2.0-of7.patch +arm-dts-stm32-fix-the-odyssey-som-emmc-vqmmc-supply.patch +arm-dts-stm32-drop-unused-linux-wakeup-from-touchscr.patch +arm-dts-stm32-rename-eth-n-to-ethernet-n-on-dhcom-so.patch +arm-dts-stm32-rename-spi-flash-mx66l51235l-n-to-flas.patch +arm-dts-stm32-fix-stpmic-node-for-stm32mp1-boards.patch +arm64-dts-qcom-sc7180-add-wakeup-delay-for-adau-code.patch +arm-omap2-block-suspend-for-am3-and-am4-if-pm-is-not.patch +soc-tegra-fuse-fix-tegra234-only-builds.patch +firmware-tegra-bpmp-fix-tegra234-only-builds.patch +arm64-dts-rockchip-update-rk3399-pci-host-bridge-win.patch +arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch +arm64-dts-imx8mn-beacon-som-assign-pmic-clock.patch +arm64-dts-imx8mq-assign-pcie-clocks.patch +arm64-dts-imx8-conn-fix-enet-clock-setting.patch +thermal-core-correct-function-name-thermal_zone_devi.patch +thermal-drivers-rcar_gen3_thermal-do-not-shadow-rcar.patch +thermal-drivers-imx_sc-add-missing-of_node_put-for-l.patch +thermal-drivers-sprd-add-missing-of_node_put-for-loo.patch +arm64-dts-qcom-sm8250-fix-pcie2_lane-unit-address.patch +arm64-dts-qcom-sm8150-disable-adreno-and-modem-by-de.patch +kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch +arch-arm64-boot-dts-marvell-fix-nand-partitioning-sc.patch +rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch +scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch +scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch +scsi-libfc-fix-array-index-out-of-bound-exception.patch +scsi-qedf-add-check-to-synchronize-abort-and-flush.patch +sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch +perf-x86-intel-uncore-clean-up-error-handling-path-o.patch +thermal-core-thermal_of-stop-zone-device-before-unre.patch +s390-traps-do-not-test-monitor-call-without-config_b.patch +s390-introduce-proper-type-handling-call_on_stack-ma.patch +cifs-prevent-null-deref-in-cifs_compose_mount_option.patch diff --git a/queue-5.13/soc-bcm-brcmstb-remove-unused-variable-brcmstb_machi.patch b/queue-5.13/soc-bcm-brcmstb-remove-unused-variable-brcmstb_machi.patch new file mode 100644 index 00000000000..35c1f90d3a0 --- /dev/null +++ b/queue-5.13/soc-bcm-brcmstb-remove-unused-variable-brcmstb_machi.patch @@ -0,0 +1,41 @@ +From c2f304b1ceb3ea2b214ccb973376e352ed34d3f6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 31 Mar 2021 16:39:59 +0800 +Subject: soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match' + +From: Jiapeng Chong + +[ Upstream commit c1f512182c54dc87efd2f7ac19f16a49ff8bb19e ] + +Fix the following clang warning: + +drivers/soc/bcm/brcmstb/common.c:17:34: warning: unused variable +'brcmstb_machine_match' [-Wunused-const-variable]. + +Reported-by: Abaci Robot +Signed-off-by: Jiapeng Chong +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + drivers/soc/bcm/brcmstb/common.c | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/drivers/soc/bcm/brcmstb/common.c b/drivers/soc/bcm/brcmstb/common.c +index e87dfc6660f3..2a010881f4b6 100644 +--- a/drivers/soc/bcm/brcmstb/common.c ++++ b/drivers/soc/bcm/brcmstb/common.c +@@ -14,11 +14,6 @@ + static u32 family_id; + static u32 product_id; + +-static const struct of_device_id brcmstb_machine_match[] = { +- { .compatible = "brcm,brcmstb", }, +- { } +-}; +- + u32 brcmstb_get_family_id(void) + { + return family_id; +-- +2.30.2 + diff --git a/queue-5.13/soc-mediatek-add-missing-module_device_table.patch b/queue-5.13/soc-mediatek-add-missing-module_device_table.patch new file mode 100644 index 00000000000..658011e1f37 --- /dev/null +++ b/queue-5.13/soc-mediatek-add-missing-module_device_table.patch @@ -0,0 +1,37 @@ +From 568a6cd5766a092c9c2049ba696563dda5891f8a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 11 May 2021 11:55:50 +0800 +Subject: soc: mediatek: add missing MODULE_DEVICE_TABLE + +From: Zou Wei + +[ Upstream commit ba96de3ae5a7e2121cac80053b277eb2ab51a0ae ] + +This patch adds missing MODULE_DEVICE_TABLE definition which generates +correct modalias for automatic loading of this driver when it is built +as an external module. + +Reported-by: Hulk Robot +Signed-off-by: Zou Wei +Link: https://lore.kernel.org/r/1620705350-104687-1-git-send-email-zou_wei@huawei.com +Signed-off-by: Matthias Brugger +Signed-off-by: Sasha Levin +--- + drivers/soc/mediatek/mtk-devapc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/soc/mediatek/mtk-devapc.c b/drivers/soc/mediatek/mtk-devapc.c +index f1cea041dc5a..7c65ad3d1f8a 100644 +--- a/drivers/soc/mediatek/mtk-devapc.c ++++ b/drivers/soc/mediatek/mtk-devapc.c +@@ -234,6 +234,7 @@ static const struct of_device_id mtk_devapc_dt_match[] = { + }, { + }, + }; ++MODULE_DEVICE_TABLE(of, mtk_devapc_dt_match); + + static int mtk_devapc_probe(struct platform_device *pdev) + { +-- +2.30.2 + diff --git a/queue-5.13/soc-tegra-fuse-fix-tegra234-only-builds.patch b/queue-5.13/soc-tegra-fuse-fix-tegra234-only-builds.patch new file mode 100644 index 00000000000..d9d1c9b6b02 --- /dev/null +++ b/queue-5.13/soc-tegra-fuse-fix-tegra234-only-builds.patch @@ -0,0 +1,35 @@ +From 0f67c8cf25c77125cd19877a54bf78edc8a22acd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 14:20:57 +0200 +Subject: soc/tegra: fuse: Fix Tegra234-only builds + +From: Thierry Reding + +[ Upstream commit e2d0ee225e49a5553986f3138dd2803852a31fd5 ] + +The tegra30_fuse_read() symbol is used on Tegra234, so make sure it's +available. + +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + drivers/soc/tegra/fuse/fuse-tegra30.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c +index 9ea7f0168457..c1aa7815bd6e 100644 +--- a/drivers/soc/tegra/fuse/fuse-tegra30.c ++++ b/drivers/soc/tegra/fuse/fuse-tegra30.c +@@ -37,7 +37,8 @@ + defined(CONFIG_ARCH_TEGRA_132_SOC) || \ + defined(CONFIG_ARCH_TEGRA_210_SOC) || \ + defined(CONFIG_ARCH_TEGRA_186_SOC) || \ +- defined(CONFIG_ARCH_TEGRA_194_SOC) ++ defined(CONFIG_ARCH_TEGRA_194_SOC) || \ ++ defined(CONFIG_ARCH_TEGRA_234_SOC) + static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset) + { + if (WARN_ON(!fuse->base)) +-- +2.30.2 + diff --git a/queue-5.13/thermal-core-correct-function-name-thermal_zone_devi.patch b/queue-5.13/thermal-core-correct-function-name-thermal_zone_devi.patch new file mode 100644 index 00000000000..d49dc22aa1a --- /dev/null +++ b/queue-5.13/thermal-core-correct-function-name-thermal_zone_devi.patch @@ -0,0 +1,37 @@ +From 5365be2954489f33115c99dfaa7b7fac492001fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 May 2021 13:10:20 +0800 +Subject: thermal/core: Correct function name thermal_zone_device_unregister() + +From: Yang Yingliang + +[ Upstream commit a052b5118f13febac1bd901fe0b7a807b9d6b51c ] + +Fix the following make W=1 kernel build warning: + + drivers/thermal/thermal_core.c:1376: warning: expecting prototype for thermal_device_unregister(). Prototype was for thermal_zone_device_unregister() instead + +Signed-off-by: Yang Yingliang +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20210517051020.3463536-1-yangyingliang@huawei.com +Signed-off-by: Sasha Levin +--- + drivers/thermal/thermal_core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c +index d20b25f40d19..142dcf5e4a18 100644 +--- a/drivers/thermal/thermal_core.c ++++ b/drivers/thermal/thermal_core.c +@@ -1369,7 +1369,7 @@ free_tz: + EXPORT_SYMBOL_GPL(thermal_zone_device_register); + + /** +- * thermal_device_unregister - removes the registered thermal zone device ++ * thermal_zone_device_unregister - removes the registered thermal zone device + * @tz: the thermal zone device to remove + */ + void thermal_zone_device_unregister(struct thermal_zone_device *tz) +-- +2.30.2 + diff --git a/queue-5.13/thermal-core-thermal_of-stop-zone-device-before-unre.patch b/queue-5.13/thermal-core-thermal_of-stop-zone-device-before-unre.patch new file mode 100644 index 00000000000..f7b48d8e3ff --- /dev/null +++ b/queue-5.13/thermal-core-thermal_of-stop-zone-device-before-unre.patch @@ -0,0 +1,40 @@ +From 5de4d1b751f4ff52cbdee5de184e6c84cf854229 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 16 Jun 2021 22:04:13 +0300 +Subject: thermal/core/thermal_of: Stop zone device before unregistering it + +From: Dmitry Osipenko + +[ Upstream commit 5e5c9f9a75fc4532980c2e699caf8a36070a3a2e ] + +Zone device is enabled after thermal_zone_of_sensor_register() completion, +but it's not disabled before senor is unregistered, leaving temperature +polling active. This results in accessing a disabled zone device and +produces a warning about this problem. Stop zone device before +unregistering it in order to fix this "use-after-free" problem. + +Signed-off-by: Dmitry Osipenko +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20210616190417.32214-3-digetx@gmail.com +Signed-off-by: Sasha Levin +--- + drivers/thermal/thermal_of.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c +index 5b76f9a1280d..6379f26a335f 100644 +--- a/drivers/thermal/thermal_of.c ++++ b/drivers/thermal/thermal_of.c +@@ -559,6 +559,9 @@ void thermal_zone_of_sensor_unregister(struct device *dev, + if (!tz) + return; + ++ /* stop temperature polling */ ++ thermal_zone_device_disable(tzd); ++ + mutex_lock(&tzd->lock); + tzd->ops->get_temp = NULL; + tzd->ops->get_trend = NULL; +-- +2.30.2 + diff --git a/queue-5.13/thermal-drivers-imx_sc-add-missing-of_node_put-for-l.patch b/queue-5.13/thermal-drivers-imx_sc-add-missing-of_node_put-for-l.patch new file mode 100644 index 00000000000..79e6fe28935 --- /dev/null +++ b/queue-5.13/thermal-drivers-imx_sc-add-missing-of_node_put-for-l.patch @@ -0,0 +1,55 @@ +From b08ea996487383d183b1c5e0f087b93c2b96fba9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 14 Jun 2021 21:22:29 +0200 +Subject: thermal/drivers/imx_sc: Add missing of_node_put for loop iteration + +From: Krzysztof Kozlowski + +[ Upstream commit 3da97620e8d60da4a7eaae46e03e0a494780642d ] + +Early exits from for_each_available_child_of_node() should decrement the +node reference counter. Reported by Coccinelle: + + drivers/thermal/imx_sc_thermal.c:93:1-33: WARNING: + Function "for_each_available_child_of_node" should have of_node_put() before return around line 97. + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Jacky Bai +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20210614192230.19248-1-krzysztof.kozlowski@canonical.com +Signed-off-by: Sasha Levin +--- + drivers/thermal/imx_sc_thermal.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/thermal/imx_sc_thermal.c b/drivers/thermal/imx_sc_thermal.c +index b01d28eca7ee..8d76dbfde6a9 100644 +--- a/drivers/thermal/imx_sc_thermal.c ++++ b/drivers/thermal/imx_sc_thermal.c +@@ -93,6 +93,7 @@ static int imx_sc_thermal_probe(struct platform_device *pdev) + for_each_available_child_of_node(np, child) { + sensor = devm_kzalloc(&pdev->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) { ++ of_node_put(child); + of_node_put(sensor_np); + return -ENOMEM; + } +@@ -104,6 +105,7 @@ static int imx_sc_thermal_probe(struct platform_device *pdev) + dev_err(&pdev->dev, + "failed to get valid sensor resource id: %d\n", + ret); ++ of_node_put(child); + break; + } + +@@ -114,6 +116,7 @@ static int imx_sc_thermal_probe(struct platform_device *pdev) + if (IS_ERR(sensor->tzd)) { + dev_err(&pdev->dev, "failed to register thermal zone\n"); + ret = PTR_ERR(sensor->tzd); ++ of_node_put(child); + break; + } + +-- +2.30.2 + diff --git a/queue-5.13/thermal-drivers-rcar_gen3_thermal-do-not-shadow-rcar.patch b/queue-5.13/thermal-drivers-rcar_gen3_thermal-do-not-shadow-rcar.patch new file mode 100644 index 00000000000..2f890b6a725 --- /dev/null +++ b/queue-5.13/thermal-drivers-rcar_gen3_thermal-do-not-shadow-rcar.patch @@ -0,0 +1,61 @@ +From ca2f3a552d3922684331187407ae1df4f75fbbd7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Jun 2021 16:41:20 +0200 +Subject: thermal/drivers/rcar_gen3_thermal: Do not shadow rcar_gen3_ths_tj_1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Geert Uytterhoeven + +[ Upstream commit 3ae5950db617d1cc3eb4eb55750fa9d138529b49 ] + +With -Wshadow: + + drivers/thermal/rcar_gen3_thermal.c: In function ‘rcar_gen3_thermal_probe’: + drivers/thermal/rcar_gen3_thermal.c:310:13: warning: declaration of ‘rcar_gen3_ths_tj_1’ shadows a global declaration [-Wshadow] + 310 | const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev); + | ^~~~~~~~~~~~~~~~~~ + drivers/thermal/rcar_gen3_thermal.c:246:18: note: shadowed declaration is here + 246 | static const int rcar_gen3_ths_tj_1 = 126; + | ^~~~~~~~~~~~~~~~~~ + +To add to the confusion, the local variable has a different type. + +Fix the shadowing by renaming the local variable to ths_tj_1. + +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Niklas Söderlund +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/9ea7e65d0331daba96f9a7925cb3d12d2170efb1.1623076804.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/thermal/rcar_gen3_thermal.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c +index 1a60adb1d30a..fdf16aa34eb4 100644 +--- a/drivers/thermal/rcar_gen3_thermal.c ++++ b/drivers/thermal/rcar_gen3_thermal.c +@@ -307,7 +307,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev) + { + struct rcar_gen3_thermal_priv *priv; + struct device *dev = &pdev->dev; +- const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev); ++ const int *ths_tj_1 = of_device_get_match_data(dev); + struct resource *res; + struct thermal_zone_device *zone; + int ret, i; +@@ -352,8 +352,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev) + priv->tscs[i] = tsc; + + priv->thermal_init(tsc); +- rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i], +- *rcar_gen3_ths_tj_1); ++ rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i], *ths_tj_1); + + zone = devm_thermal_zone_of_sensor_register(dev, i, tsc, + &rcar_gen3_tz_of_ops); +-- +2.30.2 + diff --git a/queue-5.13/thermal-drivers-sprd-add-missing-of_node_put-for-loo.patch b/queue-5.13/thermal-drivers-sprd-add-missing-of_node_put-for-loo.patch new file mode 100644 index 00000000000..a48ef62dc8f --- /dev/null +++ b/queue-5.13/thermal-drivers-sprd-add-missing-of_node_put-for-loo.patch @@ -0,0 +1,89 @@ +From 4c11414698aaf8a3e8c662a524b43f26e14498da Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 14 Jun 2021 21:22:30 +0200 +Subject: thermal/drivers/sprd: Add missing of_node_put for loop iteration + +From: Krzysztof Kozlowski + +[ Upstream commit d8ac5bb4ae653e092d7429a7587b73f1662d6ad7 ] + +Early exits from for_each_available_child_of_node() should decrement the +node reference counter. Reported by Coccinelle: + + drivers/thermal/sprd_thermal.c:387:1-23: WARNING: + Function "for_each_child_of_node" should have of_node_put() before goto around lines 391. + +Signed-off-by: Krzysztof Kozlowski +Acked-by: Chunyan Zhang +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20210614192230.19248-2-krzysztof.kozlowski@canonical.com +Signed-off-by: Sasha Levin +--- + drivers/thermal/sprd_thermal.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +diff --git a/drivers/thermal/sprd_thermal.c b/drivers/thermal/sprd_thermal.c +index fe06cccf14b3..fff80fc18002 100644 +--- a/drivers/thermal/sprd_thermal.c ++++ b/drivers/thermal/sprd_thermal.c +@@ -388,7 +388,7 @@ static int sprd_thm_probe(struct platform_device *pdev) + sen = devm_kzalloc(&pdev->dev, sizeof(*sen), GFP_KERNEL); + if (!sen) { + ret = -ENOMEM; +- goto disable_clk; ++ goto of_put; + } + + sen->data = thm; +@@ -397,13 +397,13 @@ static int sprd_thm_probe(struct platform_device *pdev) + ret = of_property_read_u32(sen_child, "reg", &sen->id); + if (ret) { + dev_err(&pdev->dev, "get sensor reg failed"); +- goto disable_clk; ++ goto of_put; + } + + ret = sprd_thm_sensor_calibration(sen_child, thm, sen); + if (ret) { + dev_err(&pdev->dev, "efuse cal analysis failed"); +- goto disable_clk; ++ goto of_put; + } + + sprd_thm_sensor_init(thm, sen); +@@ -416,19 +416,20 @@ static int sprd_thm_probe(struct platform_device *pdev) + dev_err(&pdev->dev, "register thermal zone failed %d\n", + sen->id); + ret = PTR_ERR(sen->tzd); +- goto disable_clk; ++ goto of_put; + } + + thm->sensor[sen->id] = sen; + } ++ /* sen_child set to NULL at this point */ + + ret = sprd_thm_set_ready(thm); + if (ret) +- goto disable_clk; ++ goto of_put; + + ret = sprd_thm_wait_temp_ready(thm); + if (ret) +- goto disable_clk; ++ goto of_put; + + for (i = 0; i < thm->nr_sensors; i++) + sprd_thm_toggle_sensor(thm->sensor[i], true); +@@ -436,6 +437,8 @@ static int sprd_thm_probe(struct platform_device *pdev) + platform_set_drvdata(pdev, thm); + return 0; + ++of_put: ++ of_node_put(sen_child); + disable_clk: + clk_disable_unprepare(thm->clk); + return ret; +-- +2.30.2 +