From: Sasha Levin Date: Sat, 12 Feb 2022 05:44:10 +0000 (-0500) Subject: Fixes for 5.16 X-Git-Tag: v4.9.302~53 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1ff0dad4cbe5d5c625e8155fc33f070e6726da2b;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.16 Signed-off-by: Sasha Levin --- diff --git a/queue-5.16/arm64-add-cortex-x2-cpu-part-definition.patch b/queue-5.16/arm64-add-cortex-x2-cpu-part-definition.patch new file mode 100644 index 00000000000..abcac0f7a8d --- /dev/null +++ b/queue-5.16/arm64-add-cortex-x2-cpu-part-definition.patch @@ -0,0 +1,47 @@ +From c4c2bc890fa635086ddc5dd8fdccabef5a341a0c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jan 2022 08:45:37 +0530 +Subject: arm64: Add Cortex-X2 CPU part definition + +From: Anshuman Khandual + +[ Upstream commit 72bb9dcb6c33cfac80282713c2b4f2b254cd24d1 ] + +Add the CPU Partnumbers for the new Arm designs. + +Cc: Will Deacon +Cc: Suzuki Poulose +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-kernel@vger.kernel.org +Signed-off-by: Anshuman Khandual +Reviewed-by: Suzuki K Poulose +Link: https://lore.kernel.org/r/1642994138-25887-2-git-send-email-anshuman.khandual@arm.com +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index e8fdc10395b6a..999b9149f8568 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -75,6 +75,7 @@ + #define ARM_CPU_PART_CORTEX_A77 0xD0D + #define ARM_CPU_PART_CORTEX_A510 0xD46 + #define ARM_CPU_PART_CORTEX_A710 0xD47 ++#define ARM_CPU_PART_CORTEX_X2 0xD48 + #define ARM_CPU_PART_NEOVERSE_N2 0xD49 + + #define APM_CPU_PART_POTENZA 0x000 +@@ -118,6 +119,7 @@ + #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77) + #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) + #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) ++#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) + #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) + #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) + #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) +-- +2.34.1 + diff --git a/queue-5.16/arm64-cpufeature-list-early-cortex-a510-parts-as-hav.patch b/queue-5.16/arm64-cpufeature-list-early-cortex-a510-parts-as-hav.patch new file mode 100644 index 00000000000..6414a28c6cd --- /dev/null +++ b/queue-5.16/arm64-cpufeature-list-early-cortex-a510-parts-as-hav.patch @@ -0,0 +1,75 @@ +From beee64072333b54745fc6acea2b0a281f20971b2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jan 2022 15:40:40 +0000 +Subject: arm64: cpufeature: List early Cortex-A510 parts as having broken dbm + +From: James Morse + +[ Upstream commit 297ae1eb23b04c5a46111ab53c8d0f69af43f402 ] + +Versions of Cortex-A510 before r0p3 are affected by a hardware erratum +where the hardware update of the dirty bit is not correctly ordered. + +Add these cpus to the cpu_has_broken_dbm list. + +Signed-off-by: James Morse +Link: https://lore.kernel.org/r/20220125154040.549272-3-james.morse@arm.com +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +--- + Documentation/arm64/silicon-errata.rst | 2 ++ + arch/arm64/Kconfig | 10 ++++++++++ + arch/arm64/kernel/cpufeature.c | 3 +++ + 3 files changed, 15 insertions(+) + +diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst +index 1b0e53ececda9..0ec7b7f1524b1 100644 +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -98,6 +98,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 7d710589e1818..38e7f19df14d4 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -670,6 +670,16 @@ config ARM64_ERRATUM_1508412 + config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE + bool + ++config ARM64_ERRATUM_2051678 ++ bool "Cortex-A510: 2051678: disable Hardware Update of the page table dirty bit" ++ help ++ This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678. ++ Affected Coretex-A510 might not respect the ordering rules for ++ hardware update of the page table's dirty bit. The workaround ++ is to not enable the feature on affected CPUs. ++ ++ If unsure, say Y. ++ + config ARM64_ERRATUM_2119858 + bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode" + default y +diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c +index 6f3e677d88f15..d18b953c078db 100644 +--- a/arch/arm64/kernel/cpufeature.c ++++ b/arch/arm64/kernel/cpufeature.c +@@ -1634,6 +1634,9 @@ static bool cpu_has_broken_dbm(void) + MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), + /* Kryo4xx Silver (rdpe => r1p0) */ + MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe), ++#endif ++#ifdef CONFIG_ARM64_ERRATUM_2051678 ++ MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2), + #endif + {}, + }; +-- +2.34.1 + diff --git a/queue-5.16/arm64-errata-add-detection-for-trbe-ignored-system-r.patch b/queue-5.16/arm64-errata-add-detection-for-trbe-ignored-system-r.patch new file mode 100644 index 00000000000..77e2c727356 --- /dev/null +++ b/queue-5.16/arm64-errata-add-detection-for-trbe-ignored-system-r.patch @@ -0,0 +1,114 @@ +From 15e5f4728def3d77367e5d6ff463deedad34dffd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jan 2022 19:50:32 +0530 +Subject: arm64: errata: Add detection for TRBE ignored system register writes + +From: Anshuman Khandual + +[ Upstream commit 607a9afaae09cde21ece458a8f10cb99d3f94f14 ] + +TRBE implementations affected by Arm erratum #2064142 might fail to write +into certain system registers after the TRBE has been disabled. Under some +conditions after TRBE has been disabled, writes into certain TRBE registers +TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1 and TRBTRG_EL1 will be +ignored and not be effected. This adds a new errata ARM64_ERRATUM_2064142 +in arm64 errata framework. + +Cc: Catalin Marinas +Cc: Will Deacon +Cc: Mathieu Poirier +Cc: Suzuki Poulose +Cc: coresight@lists.linaro.org +Cc: linux-doc@vger.kernel.org +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-kernel@vger.kernel.org +Reviewed-by: Suzuki K Poulose +Acked-by: Catalin Marinas +Signed-off-by: Anshuman Khandual +Link: https://lore.kernel.org/r/1643120437-14352-3-git-send-email-anshuman.khandual@arm.com +Signed-off-by: Mathieu Poirier +Signed-off-by: Sasha Levin +--- + Documentation/arm64/silicon-errata.rst | 2 ++ + arch/arm64/Kconfig | 18 ++++++++++++++++++ + arch/arm64/kernel/cpu_errata.c | 9 +++++++++ + arch/arm64/tools/cpucaps | 1 + + 4 files changed, 30 insertions(+) + +diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst +index 8789c79310bbd..401a6e86c5084 100644 +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -52,6 +52,8 @@ stable kernels. + | Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 | + +----------------+-----------------+-----------------+-----------------------------+ + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index d8046c832225c..30c07b0d6b5c9 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -778,6 +778,24 @@ config ARM64_ERRATUM_2224489 + + If unsure, say Y. + ++config ARM64_ERRATUM_2064142 ++ bool "Cortex-A510: 2064142: workaround TRBE register writes while disabled" ++ depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in ++ default y ++ help ++ This option adds the workaround for ARM Cortex-A510 erratum 2064142. ++ ++ Affected Cortex-A510 core might fail to write into system registers after the ++ TRBE has been disabled. Under some conditions after the TRBE has been disabled ++ writes into TRBE registers TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1, ++ and TRBTRG_EL1 will be ignored and will not be effected. ++ ++ Work around this in the driver by executing TSB CSYNC and DSB after collection ++ is stopped and before performing a system register write to one of the affected ++ registers. ++ ++ If unsure, say Y. ++ + config CAVIUM_ERRATUM_22375 + bool "Cavium erratum 22375, 24313" + default y +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index 29cc062a4153c..a5456dd9a33f5 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -599,6 +599,15 @@ const struct arm64_cpu_capabilities arm64_errata[] = { + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, + CAP_MIDR_RANGE_LIST(trbe_write_out_of_range_cpus), + }, ++#endif ++#ifdef CONFIG_ARM64_ERRATUM_2064142 ++ { ++ .desc = "ARM erratum 2064142", ++ .capability = ARM64_WORKAROUND_2064142, ++ ++ /* Cortex-A510 r0p0 - r0p2 */ ++ ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2) ++ }, + #endif + { + } +diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps +index 870c39537dd09..fca3cb329e1db 100644 +--- a/arch/arm64/tools/cpucaps ++++ b/arch/arm64/tools/cpucaps +@@ -55,6 +55,7 @@ WORKAROUND_1418040 + WORKAROUND_1463225 + WORKAROUND_1508412 + WORKAROUND_1542419 ++WORKAROUND_2064142 + WORKAROUND_TRBE_OVERWRITE_FILL_MODE + WORKAROUND_TSB_FLUSH_FAILURE + WORKAROUND_TRBE_WRITE_OUT_OF_RANGE +-- +2.34.1 + diff --git a/queue-5.16/arm64-errata-add-detection-for-trbe-invalid-prohibit.patch b/queue-5.16/arm64-errata-add-detection-for-trbe-invalid-prohibit.patch new file mode 100644 index 00000000000..e52a2860453 --- /dev/null +++ b/queue-5.16/arm64-errata-add-detection-for-trbe-invalid-prohibit.patch @@ -0,0 +1,123 @@ +From 4055990950a6040e39510e282f7623de3979b81e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jan 2022 19:50:33 +0530 +Subject: arm64: errata: Add detection for TRBE invalid prohibited states + +From: Anshuman Khandual + +[ Upstream commit 3bd94a8759de9b724b83a80942b0354acd7701eb ] + +TRBE implementations affected by Arm erratum #2038923 might get TRBE into +an inconsistent view on whether trace is prohibited within the CPU. As a +result, the trace buffer or trace buffer state might be corrupted. This +happens after TRBE buffer has been enabled by setting TRBLIMITR_EL1.E, +followed by just a single context synchronization event before execution +changes from a context, in which trace is prohibited to one where it isn't, +or vice versa. In these mentioned conditions, the view of whether trace is +prohibited is inconsistent between parts of the CPU, and the trace buffer +or the trace buffer state might be corrupted. This adds a new errata +ARM64_ERRATUM_2038923 in arm64 errata framework. + +Cc: Catalin Marinas +Cc: Will Deacon +Cc: Mathieu Poirier +Cc: Suzuki Poulose +Cc: coresight@lists.linaro.org +Cc: linux-doc@vger.kernel.org +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-kernel@vger.kernel.org +Reviewed-by: Suzuki K Poulose +Acked-by: Catalin Marinas +Signed-off-by: Anshuman Khandual +Link: https://lore.kernel.org/r/1643120437-14352-4-git-send-email-anshuman.khandual@arm.com +Signed-off-by: Mathieu Poirier +Signed-off-by: Sasha Levin +--- + Documentation/arm64/silicon-errata.rst | 2 ++ + arch/arm64/Kconfig | 23 +++++++++++++++++++++++ + arch/arm64/kernel/cpu_errata.c | 9 +++++++++ + arch/arm64/tools/cpucaps | 1 + + 4 files changed, 35 insertions(+) + +diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst +index 401a6e86c5084..d5c6befc44eb8 100644 +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -54,6 +54,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 30c07b0d6b5c9..2b75e8a9bf88c 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -796,6 +796,29 @@ config ARM64_ERRATUM_2064142 + + If unsure, say Y. + ++config ARM64_ERRATUM_2038923 ++ bool "Cortex-A510: 2038923: workaround TRBE corruption with enable" ++ depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in ++ default y ++ help ++ This option adds the workaround for ARM Cortex-A510 erratum 2038923. ++ ++ Affected Cortex-A510 core might cause an inconsistent view on whether trace is ++ prohibited within the CPU. As a result, the trace buffer or trace buffer state ++ might be corrupted. This happens after TRBE buffer has been enabled by setting ++ TRBLIMITR_EL1.E, followed by just a single context synchronization event before ++ execution changes from a context, in which trace is prohibited to one where it ++ isn't, or vice versa. In these mentioned conditions, the view of whether trace ++ is prohibited is inconsistent between parts of the CPU, and the trace buffer or ++ the trace buffer state might be corrupted. ++ ++ Work around this in the driver by preventing an inconsistent view of whether the ++ trace is prohibited or not based on TRBLIMITR_EL1.E by immediately following a ++ change to TRBLIMITR_EL1.E with at least one ISB instruction before an ERET, or ++ two ISB instructions if no ERET is to take place. ++ ++ If unsure, say Y. ++ + config CAVIUM_ERRATUM_22375 + bool "Cavium erratum 22375, 24313" + default y +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index a5456dd9a33f5..a64bf132c6336 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -609,6 +609,15 @@ const struct arm64_cpu_capabilities arm64_errata[] = { + ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2) + }, + #endif ++#ifdef CONFIG_ARM64_ERRATUM_2038923 ++ { ++ .desc = "ARM erratum 2038923", ++ .capability = ARM64_WORKAROUND_2038923, ++ ++ /* Cortex-A510 r0p0 - r0p2 */ ++ ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2) ++ }, ++#endif + { + } + }; +diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps +index fca3cb329e1db..45a06d36d0807 100644 +--- a/arch/arm64/tools/cpucaps ++++ b/arch/arm64/tools/cpucaps +@@ -56,6 +56,7 @@ WORKAROUND_1463225 + WORKAROUND_1508412 + WORKAROUND_1542419 + WORKAROUND_2064142 ++WORKAROUND_2038923 + WORKAROUND_TRBE_OVERWRITE_FILL_MODE + WORKAROUND_TSB_FLUSH_FAILURE + WORKAROUND_TRBE_WRITE_OUT_OF_RANGE +-- +2.34.1 + diff --git a/queue-5.16/arm64-errata-add-detection-for-trbe-trace-data-corru.patch b/queue-5.16/arm64-errata-add-detection-for-trbe-trace-data-corru.patch new file mode 100644 index 00000000000..ca7b3550e66 --- /dev/null +++ b/queue-5.16/arm64-errata-add-detection-for-trbe-trace-data-corru.patch @@ -0,0 +1,112 @@ +From 1cddfe24145084ac23c16d1db5e60717a7244a08 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jan 2022 19:50:34 +0530 +Subject: arm64: errata: Add detection for TRBE trace data corruption + +From: Anshuman Khandual + +[ Upstream commit 708e8af4924ec2fdd5b81fe09192c6bac2f86935 ] + +TRBE implementations affected by Arm erratum #1902691 might corrupt trace +data or deadlock, when it's being written into the memory. So effectively +TRBE is broken and hence cannot be used to capture trace data. This adds +a new errata ARM64_ERRATUM_1902691 in arm64 errata framework. + +Cc: Catalin Marinas +Cc: Will Deacon +Cc: Mathieu Poirier +Cc: Suzuki Poulose +Cc: coresight@lists.linaro.org +Cc: linux-doc@vger.kernel.org +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-kernel@vger.kernel.org +Reviewed-by: Suzuki K Poulose +Acked-by: Catalin Marinas +Signed-off-by: Anshuman Khandual +Link: https://lore.kernel.org/r/1643120437-14352-5-git-send-email-anshuman.khandual@arm.com +Signed-off-by: Mathieu Poirier +Signed-off-by: Sasha Levin +--- + Documentation/arm64/silicon-errata.rst | 2 ++ + arch/arm64/Kconfig | 18 ++++++++++++++++++ + arch/arm64/kernel/cpu_errata.c | 9 +++++++++ + arch/arm64/tools/cpucaps | 1 + + 4 files changed, 30 insertions(+) + +diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst +index d5c6befc44eb8..1b0e53ececda9 100644 +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -56,6 +56,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A510 | #1902691 | ARM64_ERRATUM_1902691 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 2b75e8a9bf88c..7d710589e1818 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -819,6 +819,24 @@ config ARM64_ERRATUM_2038923 + + If unsure, say Y. + ++config ARM64_ERRATUM_1902691 ++ bool "Cortex-A510: 1902691: workaround TRBE trace corruption" ++ depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in ++ default y ++ help ++ This option adds the workaround for ARM Cortex-A510 erratum 1902691. ++ ++ Affected Cortex-A510 core might cause trace data corruption, when being written ++ into the memory. Effectively TRBE is broken and hence cannot be used to capture ++ trace data. ++ ++ Work around this problem in the driver by just preventing TRBE initialization on ++ affected cpus. The firmware must have disabled the access to TRBE for the kernel ++ on such implementations. This will cover the kernel for any firmware that doesn't ++ do this already. ++ ++ If unsure, say Y. ++ + config CAVIUM_ERRATUM_22375 + bool "Cavium erratum 22375, 24313" + default y +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index a64bf132c6336..066098198c248 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -617,6 +617,15 @@ const struct arm64_cpu_capabilities arm64_errata[] = { + /* Cortex-A510 r0p0 - r0p2 */ + ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2) + }, ++#endif ++#ifdef CONFIG_ARM64_ERRATUM_1902691 ++ { ++ .desc = "ARM erratum 1902691", ++ .capability = ARM64_WORKAROUND_1902691, ++ ++ /* Cortex-A510 r0p0 - r0p1 */ ++ ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 1) ++ }, + #endif + { + } +diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps +index 45a06d36d0807..e7719e8f18def 100644 +--- a/arch/arm64/tools/cpucaps ++++ b/arch/arm64/tools/cpucaps +@@ -57,6 +57,7 @@ WORKAROUND_1508412 + WORKAROUND_1542419 + WORKAROUND_2064142 + WORKAROUND_2038923 ++WORKAROUND_1902691 + WORKAROUND_TRBE_OVERWRITE_FILL_MODE + WORKAROUND_TSB_FLUSH_FAILURE + WORKAROUND_TRBE_WRITE_OUT_OF_RANGE +-- +2.34.1 + diff --git a/queue-5.16/arm64-errata-update-arm64_erratum_-2119858-2224489-w.patch b/queue-5.16/arm64-errata-update-arm64_erratum_-2119858-2224489-w.patch new file mode 100644 index 00000000000..722a0f92b67 --- /dev/null +++ b/queue-5.16/arm64-errata-update-arm64_erratum_-2119858-2224489-w.patch @@ -0,0 +1,109 @@ +From fb7582f2427bd0cf7cfa0f09af33f0f4227144df Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jan 2022 08:45:38 +0530 +Subject: arm64: errata: Update ARM64_ERRATUM_[2119858|2224489] with Cortex-X2 + ranges + +From: Anshuman Khandual + +[ Upstream commit eb30d838a44c9e59a2a106884f536119859c7257 ] + +Errata ARM64_ERRATUM_[2119858|2224489] also affect some Cortex-X2 ranges as +well. Lets update these errata definition and detection to accommodate all +new Cortex-X2 based cpu MIDR ranges. + +Cc: Will Deacon +Cc: Mathieu Poirier +Cc: Suzuki Poulose +Cc: coresight@lists.linaro.org +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-kernel@vger.kernel.org +Signed-off-by: Anshuman Khandual +Reviewed-by: Suzuki K Poulose +Link: https://lore.kernel.org/r/1642994138-25887-3-git-send-email-anshuman.khandual@arm.com +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +--- + Documentation/arm64/silicon-errata.rst | 4 ++++ + arch/arm64/Kconfig | 12 ++++++------ + arch/arm64/kernel/cpu_errata.c | 2 ++ + 3 files changed, 12 insertions(+), 6 deletions(-) + +diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst +index 5342e895fb604..8789c79310bbd 100644 +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -98,6 +98,10 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 | +++----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N1 | #1349291 | N/A | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index c4207cf9bb17f..d8046c832225c 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -671,14 +671,14 @@ config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE + bool + + config ARM64_ERRATUM_2119858 +- bool "Cortex-A710: 2119858: workaround TRBE overwriting trace data in FILL mode" ++ bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode" + default y + depends on CORESIGHT_TRBE + select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE + help +- This option adds the workaround for ARM Cortex-A710 erratum 2119858. ++ This option adds the workaround for ARM Cortex-A710/X2 erratum 2119858. + +- Affected Cortex-A710 cores could overwrite up to 3 cache lines of trace ++ Affected Cortex-A710/X2 cores could overwrite up to 3 cache lines of trace + data at the base of the buffer (pointed to by TRBASER_EL1) in FILL mode in + the event of a WRAP event. + +@@ -761,14 +761,14 @@ config ARM64_ERRATUM_2253138 + If unsure, say Y. + + config ARM64_ERRATUM_2224489 +- bool "Cortex-A710: 2224489: workaround TRBE writing to address out-of-range" ++ bool "Cortex-A710/X2: 2224489: workaround TRBE writing to address out-of-range" + depends on CORESIGHT_TRBE + default y + select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE + help +- This option adds the workaround for ARM Cortex-A710 erratum 2224489. ++ This option adds the workaround for ARM Cortex-A710/X2 erratum 2224489. + +- Affected Cortex-A710 cores might write to an out-of-range address, not reserved ++ Affected Cortex-A710/X2 cores might write to an out-of-range address, not reserved + for TRBE. Under some conditions, the TRBE might generate a write to the next + virtually addressed page following the last page of the TRBE address space + (i.e., the TRBLIMITR_EL1.LIMIT), instead of wrapping around to the base. +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index 9e1c1aef9ebd6..29cc062a4153c 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -347,6 +347,7 @@ static const struct midr_range trbe_overwrite_fill_mode_cpus[] = { + #endif + #ifdef CONFIG_ARM64_ERRATUM_2119858 + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), ++ MIDR_RANGE(MIDR_CORTEX_X2, 0, 0, 2, 0), + #endif + {}, + }; +@@ -371,6 +372,7 @@ static struct midr_range trbe_write_out_of_range_cpus[] = { + #endif + #ifdef CONFIG_ARM64_ERRATUM_2224489 + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), ++ MIDR_RANGE(MIDR_CORTEX_X2, 0, 0, 2, 0), + #endif + {}, + }; +-- +2.34.1 + diff --git a/queue-5.16/drm-amd-display-correct-mpc-split-policy-for-dcn301.patch b/queue-5.16/drm-amd-display-correct-mpc-split-policy-for-dcn301.patch new file mode 100644 index 00000000000..a0a8af8eb3c --- /dev/null +++ b/queue-5.16/drm-amd-display-correct-mpc-split-policy-for-dcn301.patch @@ -0,0 +1,41 @@ +From f4e77c8a4555175c8495519fd0ac9f8ff6280cee Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jan 2022 16:55:16 -0500 +Subject: drm/amd/display: Correct MPC split policy for DCN301 + +From: Zhan Liu + +[ Upstream commit ac46d93235074a6c5d280d35771c23fd8620e7d9 ] + +[Why] +DCN301 has seamless boot enabled. With MPC split enabled +at the same time, system will hang. + +[How] +Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have +ODM combine enabled on DCN301, pipe split is not necessary here. + +Signed-off-by: Zhan Liu +Reviewed-by: Charlene Liu +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +index 9254da120e615..36814d44b19cf 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +@@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = { + .disable_clock_gate = true, + .disable_pplib_clock_request = true, + .disable_pplib_wm_range = true, +- .pipe_split_policy = MPC_SPLIT_DYNAMIC, ++ .pipe_split_policy = MPC_SPLIT_AVOID, + .force_single_disp_pipe_split = false, + .disable_dcc = DCC_ENABLE, + .vsr_support = true, +-- +2.34.1 + diff --git a/queue-5.16/drm-amdgpu-display-adjust-msleep-limit-in-dp_wait_fo.patch b/queue-5.16/drm-amdgpu-display-adjust-msleep-limit-in-dp_wait_fo.patch new file mode 100644 index 00000000000..eec9a9a7433 --- /dev/null +++ b/queue-5.16/drm-amdgpu-display-adjust-msleep-limit-in-dp_wait_fo.patch @@ -0,0 +1,37 @@ +From f966f45e2029648de831a63f9b6a21e84323a91c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jan 2022 12:52:13 -0500 +Subject: drm/amdgpu/display: adjust msleep limit in + dp_wait_for_training_aux_rd_interval + +From: Alex Deucher + +[ Upstream commit dc919d670c6fd1ac81ebf31625cd19579f7b3d4c ] + +Some architectures (e.g., ARM) have relatively low udelay limits. +On most architectures, anything longer than 2000us is not recommended. +Change the check to align with other similar checks in DC. + +Reviewed-by: Harry Wentland +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +index ccd6cdbe46f43..b97be2e9088ce 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +@@ -201,7 +201,7 @@ void dp_wait_for_training_aux_rd_interval( + uint32_t wait_in_micro_secs) + { + #if defined(CONFIG_DRM_AMD_DC_DCN) +- if (wait_in_micro_secs > 16000) ++ if (wait_in_micro_secs > 1000) + msleep(wait_in_micro_secs/1000); + else + udelay(wait_in_micro_secs); +-- +2.34.1 + diff --git a/queue-5.16/drm-amdgpu-display-use-msleep-rather-than-udelay-for.patch b/queue-5.16/drm-amdgpu-display-use-msleep-rather-than-udelay-for.patch new file mode 100644 index 00000000000..49d49af2bed --- /dev/null +++ b/queue-5.16/drm-amdgpu-display-use-msleep-rather-than-udelay-for.patch @@ -0,0 +1,46 @@ +From 0eb0b329c34e7c4d6b8f7e02df3308f2fc136fb2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jan 2022 12:57:33 -0500 +Subject: drm/amdgpu/display: use msleep rather than udelay for long delays + +From: Alex Deucher + +[ Upstream commit 98fdcacb45f7cd2092151d6af2e60152811eb79c ] + +Some architectures (e.g., ARM) throw an compilation error if the +udelay is too long. In general udelays of longer than 2000us are +not recommended on any architecture. Switch to msleep in these +cases. + +Reviewed-by: Harry Wentland +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +index b97be2e9088ce..94e75199d9428 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +@@ -6058,7 +6058,7 @@ bool dpcd_write_128b_132b_sst_payload_allocation_table( + } + } + retries++; +- udelay(5000); ++ msleep(5); + } + + if (!result && retries == max_retries) { +@@ -6110,7 +6110,7 @@ bool dpcd_poll_for_allocation_change_trigger(struct dc_link *link) + break; + } + +- udelay(5000); ++ msleep(5); + } + + if (result == ACT_FAILED) { +-- +2.34.1 + diff --git a/queue-5.16/drm-panel-orientation-quirks-add-quirk-for-the-1netb.patch b/queue-5.16/drm-panel-orientation-quirks-add-quirk-for-the-1netb.patch new file mode 100644 index 00000000000..62c2cdcca17 --- /dev/null +++ b/queue-5.16/drm-panel-orientation-quirks-add-quirk-for-the-1netb.patch @@ -0,0 +1,53 @@ +From 3a43e557c9a12ecf046c22d731770eb53790a0ae Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jan 2022 08:06:20 +0800 +Subject: drm: panel-orientation-quirks: Add quirk for the 1Netbook OneXPlayer + +From: Raymond Jay Golo + +[ Upstream commit d3cbc6e323c9299d10c8d2e4127c77c7d05d07b1 ] + +The 1Netbook OneXPlayer uses a panel which has been mounted +90 degrees rotated. Add a quirk for this. + +Signed-off-by: Raymond Jay Golo +Signed-off-by: Daniel Vetter +Link: https://patchwork.freedesktop.org/patch/msgid/20220113000619.90988-1-rjgolo@gmail.com +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/drm_panel_orientation_quirks.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c b/drivers/gpu/drm/drm_panel_orientation_quirks.c +index 042bb80383c93..b910978d3e480 100644 +--- a/drivers/gpu/drm/drm_panel_orientation_quirks.c ++++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c +@@ -115,6 +115,12 @@ static const struct drm_dmi_panel_orientation_data lcd1280x1920_rightside_up = { + .orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, + }; + ++static const struct drm_dmi_panel_orientation_data lcd1600x2560_leftside_up = { ++ .width = 1600, ++ .height = 2560, ++ .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP, ++}; ++ + static const struct dmi_system_id orientation_data[] = { + { /* Acer One 10 (S1003) */ + .matches = { +@@ -275,6 +281,12 @@ static const struct dmi_system_id orientation_data[] = { + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Default string"), + }, + .driver_data = (void *)&onegx1_pro, ++ }, { /* OneXPlayer */ ++ .matches = { ++ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ONE-NETBOOK TECHNOLOGY CO., LTD."), ++ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ONE XPLAYER"), ++ }, ++ .driver_data = (void *)&lcd1600x2560_leftside_up, + }, { /* Samsung GalaxyBook 10.6 */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), +-- +2.34.1 + diff --git a/queue-5.16/drm-vc4-fix-deadlock-on-dsi-device-attach-error.patch b/queue-5.16/drm-vc4-fix-deadlock-on-dsi-device-attach-error.patch new file mode 100644 index 00000000000..b5fab8dd794 --- /dev/null +++ b/queue-5.16/drm-vc4-fix-deadlock-on-dsi-device-attach-error.patch @@ -0,0 +1,120 @@ +From 385f44e25a886dafe50161f9324735a06c68a940 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jan 2022 01:51:26 +0100 +Subject: drm/vc4: Fix deadlock on DSI device attach error + +From: Padmanabha Srinivasaiah + +[ Upstream commit 0a3d12ab5097b1d045e693412e6b366b7e82031b ] + +DSI device attach to DSI host will be done with host device's lock +held. + +Un-registering host in "device attach" error path (ex: probe retry) +will result in deadlock with below call trace and non operational +DSI display. + +Startup Call trace: +[ 35.043036] rt_mutex_slowlock.constprop.21+0x184/0x1b8 +[ 35.043048] mutex_lock_nested+0x7c/0xc8 +[ 35.043060] device_del+0x4c/0x3e8 +[ 35.043075] device_unregister+0x20/0x40 +[ 35.043082] mipi_dsi_remove_device_fn+0x18/0x28 +[ 35.043093] device_for_each_child+0x68/0xb0 +[ 35.043105] mipi_dsi_host_unregister+0x40/0x90 +[ 35.043115] vc4_dsi_host_attach+0xf0/0x120 [vc4] +[ 35.043199] mipi_dsi_attach+0x30/0x48 +[ 35.043209] tc358762_probe+0x128/0x164 [tc358762] +[ 35.043225] mipi_dsi_drv_probe+0x28/0x38 +[ 35.043234] really_probe+0xc0/0x318 +[ 35.043244] __driver_probe_device+0x80/0xe8 +[ 35.043254] driver_probe_device+0xb8/0x118 +[ 35.043263] __device_attach_driver+0x98/0xe8 +[ 35.043273] bus_for_each_drv+0x84/0xd8 +[ 35.043281] __device_attach+0xf0/0x150 +[ 35.043290] device_initial_probe+0x1c/0x28 +[ 35.043300] bus_probe_device+0xa4/0xb0 +[ 35.043308] deferred_probe_work_func+0xa0/0xe0 +[ 35.043318] process_one_work+0x254/0x700 +[ 35.043330] worker_thread+0x4c/0x448 +[ 35.043339] kthread+0x19c/0x1a8 +[ 35.043348] ret_from_fork+0x10/0x20 + +Shutdown Call trace: +[ 365.565417] Call trace: +[ 365.565423] __switch_to+0x148/0x200 +[ 365.565452] __schedule+0x340/0x9c8 +[ 365.565467] schedule+0x48/0x110 +[ 365.565479] schedule_timeout+0x3b0/0x448 +[ 365.565496] wait_for_completion+0xac/0x138 +[ 365.565509] __flush_work+0x218/0x4e0 +[ 365.565523] flush_work+0x1c/0x28 +[ 365.565536] wait_for_device_probe+0x68/0x158 +[ 365.565550] device_shutdown+0x24/0x348 +[ 365.565561] kernel_restart_prepare+0x40/0x50 +[ 365.565578] kernel_restart+0x20/0x70 +[ 365.565591] __do_sys_reboot+0x10c/0x220 +[ 365.565605] __arm64_sys_reboot+0x2c/0x38 +[ 365.565619] invoke_syscall+0x4c/0x110 +[ 365.565634] el0_svc_common.constprop.3+0xfc/0x120 +[ 365.565648] do_el0_svc+0x2c/0x90 +[ 365.565661] el0_svc+0x4c/0xf0 +[ 365.565671] el0t_64_sync_handler+0x90/0xb8 +[ 365.565682] el0t_64_sync+0x180/0x184 + +Signed-off-by: Padmanabha Srinivasaiah +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20220118005127.29015-1-treasure4paddy@gmail.com +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 14 ++++---------- + 1 file changed, 4 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c +index a229da58962a2..9300d3354c512 100644 +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1262,7 +1262,6 @@ static int vc4_dsi_host_attach(struct mipi_dsi_host *host, + struct mipi_dsi_device *device) + { + struct vc4_dsi *dsi = host_to_dsi(host); +- int ret; + + dsi->lanes = device->lanes; + dsi->channel = device->channel; +@@ -1297,18 +1296,15 @@ static int vc4_dsi_host_attach(struct mipi_dsi_host *host, + return 0; + } + +- ret = component_add(&dsi->pdev->dev, &vc4_dsi_ops); +- if (ret) { +- mipi_dsi_host_unregister(&dsi->dsi_host); +- return ret; +- } +- +- return 0; ++ return component_add(&dsi->pdev->dev, &vc4_dsi_ops); + } + + static int vc4_dsi_host_detach(struct mipi_dsi_host *host, + struct mipi_dsi_device *device) + { ++ struct vc4_dsi *dsi = host_to_dsi(host); ++ ++ component_del(&dsi->pdev->dev, &vc4_dsi_ops); + return 0; + } + +@@ -1686,9 +1682,7 @@ static int vc4_dsi_dev_remove(struct platform_device *pdev) + struct device *dev = &pdev->dev; + struct vc4_dsi *dsi = dev_get_drvdata(dev); + +- component_del(&pdev->dev, &vc4_dsi_ops); + mipi_dsi_host_unregister(&dsi->dsi_host); +- + return 0; + } + +-- +2.34.1 + diff --git a/queue-5.16/irqchip-realtek-rtl-service-all-pending-interrupts.patch b/queue-5.16/irqchip-realtek-rtl-service-all-pending-interrupts.patch new file mode 100644 index 00000000000..087ac4f65d5 --- /dev/null +++ b/queue-5.16/irqchip-realtek-rtl-service-all-pending-interrupts.patch @@ -0,0 +1,52 @@ +From eba40991596e1bda07c09650ee88174ae3d608f2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 9 Jan 2022 15:54:34 +0100 +Subject: irqchip/realtek-rtl: Service all pending interrupts + +From: Sander Vanheule + +[ Upstream commit 960dd884ddf5621ae6284cd3a42724500a97ae4c ] + +Instead of only servicing the lowest pending interrupt line, make sure +all pending SoC interrupts are serviced before exiting the chained +handler. This adds a small overhead if only one interrupt is pending, +but should prevent rapid re-triggering of the handler. + +Signed-off-by: Sander Vanheule +Signed-off-by: Marc Zyngier +Link: https://lore.kernel.org/r/5082ad3cb8b4eedf55075561b93eff6570299fe1.1641739718.git.sander@svanheule.net +Signed-off-by: Sasha Levin +--- + drivers/irqchip/irq-realtek-rtl.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/irqchip/irq-realtek-rtl.c b/drivers/irqchip/irq-realtek-rtl.c +index 568614edd88f4..50a56820c99bc 100644 +--- a/drivers/irqchip/irq-realtek-rtl.c ++++ b/drivers/irqchip/irq-realtek-rtl.c +@@ -76,16 +76,20 @@ static void realtek_irq_dispatch(struct irq_desc *desc) + { + struct irq_chip *chip = irq_desc_get_chip(desc); + struct irq_domain *domain; +- unsigned int pending; ++ unsigned long pending; ++ unsigned int soc_int; + + chained_irq_enter(chip, desc); + pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR)); ++ + if (unlikely(!pending)) { + spurious_interrupt(); + goto out; + } ++ + domain = irq_desc_get_handler_data(desc); +- generic_handle_domain_irq(domain, __ffs(pending)); ++ for_each_set_bit(soc_int, &pending, 32) ++ generic_handle_domain_irq(domain, soc_int); + + out: + chained_irq_exit(chip, desc); +-- +2.34.1 + diff --git a/queue-5.16/kasan-test-fix-compatibility-with-fortify_source.patch b/queue-5.16/kasan-test-fix-compatibility-with-fortify_source.patch new file mode 100644 index 00000000000..7e6efb8aa08 --- /dev/null +++ b/queue-5.16/kasan-test-fix-compatibility-with-fortify_source.patch @@ -0,0 +1,94 @@ +From 0ec638dd8c42faa967656df426d93c2db46db2f5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 29 Jan 2022 13:41:11 -0800 +Subject: kasan: test: fix compatibility with FORTIFY_SOURCE + +From: Marco Elver + +[ Upstream commit 09c6304e38e440b93a9ebf3f3cf75cd6cb529f91 ] + +With CONFIG_FORTIFY_SOURCE enabled, string functions will also perform +dynamic checks using __builtin_object_size(ptr), which when failed will +panic the kernel. + +Because the KASAN test deliberately performs out-of-bounds operations, +the kernel panics with FORTIFY_SOURCE, for example: + + | kernel BUG at lib/string_helpers.c:910! + | invalid opcode: 0000 [#1] PREEMPT SMP KASAN PTI + | CPU: 1 PID: 137 Comm: kunit_try_catch Tainted: G B 5.16.0-rc3+ #3 + | Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.14.0-2 04/01/2014 + | RIP: 0010:fortify_panic+0x19/0x1b + | ... + | Call Trace: + | kmalloc_oob_in_memset.cold+0x16/0x16 + | ... + +Fix it by also hiding `ptr` from the optimizer, which will ensure that +__builtin_object_size() does not return a valid size, preventing +fortified string functions from panicking. + +Link: https://lkml.kernel.org/r/20220124160744.1244685-1-elver@google.com +Signed-off-by: Marco Elver +Reported-by: Nico Pache +Reviewed-by: Nico Pache +Reviewed-by: Andrey Konovalov +Reviewed-by: Kees Cook +Cc: Andrey Ryabinin +Cc: Alexander Potapenko +Cc: Dmitry Vyukov +Cc: Brendan Higgins +Signed-off-by: Andrew Morton +Signed-off-by: Linus Torvalds +Signed-off-by: Sasha Levin +--- + lib/test_kasan.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/lib/test_kasan.c b/lib/test_kasan.c +index 0643573f86862..2ef2948261bf8 100644 +--- a/lib/test_kasan.c ++++ b/lib/test_kasan.c +@@ -492,6 +492,7 @@ static void kmalloc_oob_in_memset(struct kunit *test) + ptr = kmalloc(size, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr); + ++ OPTIMIZER_HIDE_VAR(ptr); + OPTIMIZER_HIDE_VAR(size); + KUNIT_EXPECT_KASAN_FAIL(test, + memset(ptr, 0, size + KASAN_GRANULE_SIZE)); +@@ -515,6 +516,7 @@ static void kmalloc_memmove_negative_size(struct kunit *test) + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr); + + memset((char *)ptr, 0, 64); ++ OPTIMIZER_HIDE_VAR(ptr); + OPTIMIZER_HIDE_VAR(invalid_size); + KUNIT_EXPECT_KASAN_FAIL(test, + memmove((char *)ptr, (char *)ptr + 4, invalid_size)); +@@ -531,6 +533,7 @@ static void kmalloc_memmove_invalid_size(struct kunit *test) + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr); + + memset((char *)ptr, 0, 64); ++ OPTIMIZER_HIDE_VAR(ptr); + KUNIT_EXPECT_KASAN_FAIL(test, + memmove((char *)ptr, (char *)ptr + 4, invalid_size)); + kfree(ptr); +@@ -869,6 +872,7 @@ static void kasan_memchr(struct kunit *test) + ptr = kmalloc(size, GFP_KERNEL | __GFP_ZERO); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr); + ++ OPTIMIZER_HIDE_VAR(ptr); + OPTIMIZER_HIDE_VAR(size); + KUNIT_EXPECT_KASAN_FAIL(test, + kasan_ptr_result = memchr(ptr, '1', size + 1)); +@@ -895,6 +899,7 @@ static void kasan_memcmp(struct kunit *test) + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr); + memset(arr, 0, sizeof(arr)); + ++ OPTIMIZER_HIDE_VAR(ptr); + OPTIMIZER_HIDE_VAR(size); + KUNIT_EXPECT_KASAN_FAIL(test, + kasan_int_result = memcmp(ptr, arr, size+1)); +-- +2.34.1 + diff --git a/queue-5.16/kvm-eventfd-fix-false-positive-rcu-usage-warning.patch b/queue-5.16/kvm-eventfd-fix-false-positive-rcu-usage-warning.patch new file mode 100644 index 00000000000..c032f9114c5 --- /dev/null +++ b/queue-5.16/kvm-eventfd-fix-false-positive-rcu-usage-warning.patch @@ -0,0 +1,87 @@ +From 555fbb85abf6e165b44f78a90ac61fa5c4c84175 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jan 2022 14:54:49 +0800 +Subject: KVM: eventfd: Fix false positive RCU usage warning + +From: Hou Wenlong + +[ Upstream commit 6a0c61703e3a5d67845a4b275e1d9d7bc1b5aad7 ] + +Fix the following false positive warning: + ============================= + WARNING: suspicious RCU usage + 5.16.0-rc4+ #57 Not tainted + ----------------------------- + arch/x86/kvm/../../../virt/kvm/eventfd.c:484 RCU-list traversed in non-reader section!! + + other info that might help us debug this: + + rcu_scheduler_active = 2, debug_locks = 1 + 3 locks held by fc_vcpu 0/330: + #0: ffff8884835fc0b0 (&vcpu->mutex){+.+.}-{3:3}, at: kvm_vcpu_ioctl+0x88/0x6f0 [kvm] + #1: ffffc90004c0bb68 (&kvm->srcu){....}-{0:0}, at: vcpu_enter_guest+0x600/0x1860 [kvm] + #2: ffffc90004c0c1d0 (&kvm->irq_srcu){....}-{0:0}, at: kvm_notify_acked_irq+0x36/0x180 [kvm] + + stack backtrace: + CPU: 26 PID: 330 Comm: fc_vcpu 0 Not tainted 5.16.0-rc4+ + Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.14.0-0-g155821a1990b-prebuilt.qemu.org 04/01/2014 + Call Trace: + + dump_stack_lvl+0x44/0x57 + kvm_notify_acked_gsi+0x6b/0x70 [kvm] + kvm_notify_acked_irq+0x8d/0x180 [kvm] + kvm_ioapic_update_eoi+0x92/0x240 [kvm] + kvm_apic_set_eoi_accelerated+0x2a/0xe0 [kvm] + handle_apic_eoi_induced+0x3d/0x60 [kvm_intel] + vmx_handle_exit+0x19c/0x6a0 [kvm_intel] + vcpu_enter_guest+0x66e/0x1860 [kvm] + kvm_arch_vcpu_ioctl_run+0x438/0x7f0 [kvm] + kvm_vcpu_ioctl+0x38a/0x6f0 [kvm] + __x64_sys_ioctl+0x89/0xc0 + do_syscall_64+0x3a/0x90 + entry_SYSCALL_64_after_hwframe+0x44/0xae + +Since kvm_unregister_irq_ack_notifier() does synchronize_srcu(&kvm->irq_srcu), +kvm->irq_ack_notifier_list is protected by kvm->irq_srcu. In fact, +kvm->irq_srcu SRCU read lock is held in kvm_notify_acked_irq(), making it +a false positive warning. So use hlist_for_each_entry_srcu() instead of +hlist_for_each_entry_rcu(). + +Reviewed-by: Sean Christopherson +Signed-off-by: Hou Wenlong +Message-Id: +Signed-off-by: Paolo Bonzini +Signed-off-by: Sasha Levin +--- + virt/kvm/eventfd.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/virt/kvm/eventfd.c b/virt/kvm/eventfd.c +index 2ad013b8bde96..59b1dd4a549ee 100644 +--- a/virt/kvm/eventfd.c ++++ b/virt/kvm/eventfd.c +@@ -463,8 +463,8 @@ bool kvm_irq_has_notifier(struct kvm *kvm, unsigned irqchip, unsigned pin) + idx = srcu_read_lock(&kvm->irq_srcu); + gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin); + if (gsi != -1) +- hlist_for_each_entry_rcu(kian, &kvm->irq_ack_notifier_list, +- link) ++ hlist_for_each_entry_srcu(kian, &kvm->irq_ack_notifier_list, ++ link, srcu_read_lock_held(&kvm->irq_srcu)) + if (kian->gsi == gsi) { + srcu_read_unlock(&kvm->irq_srcu, idx); + return true; +@@ -480,8 +480,8 @@ void kvm_notify_acked_gsi(struct kvm *kvm, int gsi) + { + struct kvm_irq_ack_notifier *kian; + +- hlist_for_each_entry_rcu(kian, &kvm->irq_ack_notifier_list, +- link) ++ hlist_for_each_entry_srcu(kian, &kvm->irq_ack_notifier_list, ++ link, srcu_read_lock_held(&kvm->irq_srcu)) + if (kian->gsi == gsi) + kian->irq_acked(kian); + } +-- +2.34.1 + diff --git a/queue-5.16/kvm-nvmx-also-filter-msr_ia32_vmx_true_pinbased_ctls.patch b/queue-5.16/kvm-nvmx-also-filter-msr_ia32_vmx_true_pinbased_ctls.patch new file mode 100644 index 00000000000..5bb4de2cd1c --- /dev/null +++ b/queue-5.16/kvm-nvmx-also-filter-msr_ia32_vmx_true_pinbased_ctls.patch @@ -0,0 +1,42 @@ +From bb2f4d7949eca0e4c3652f8ca0907f9aa369539a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jan 2022 18:01:30 +0100 +Subject: KVM: nVMX: Also filter MSR_IA32_VMX_TRUE_PINBASED_CTLS when eVMCS + +From: Vitaly Kuznetsov + +[ Upstream commit f80ae0ef089a09e8c18da43a382c3caac9a424a7 ] + +Similar to MSR_IA32_VMX_EXIT_CTLS/MSR_IA32_VMX_TRUE_EXIT_CTLS, +MSR_IA32_VMX_ENTRY_CTLS/MSR_IA32_VMX_TRUE_ENTRY_CTLS pair, +MSR_IA32_VMX_TRUE_PINBASED_CTLS needs to be filtered the same way +MSR_IA32_VMX_PINBASED_CTLS is currently filtered as guests may solely rely +on 'true' MSR data. + +Note, none of the currently existing Windows/Hyper-V versions are known +to stumble upon the unfiltered MSR_IA32_VMX_TRUE_PINBASED_CTLS, the change +is aimed at making the filtering future proof. + +Signed-off-by: Vitaly Kuznetsov +Message-Id: <20220112170134.1904308-2-vkuznets@redhat.com> +Signed-off-by: Paolo Bonzini +Signed-off-by: Sasha Levin +--- + arch/x86/kvm/vmx/evmcs.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/x86/kvm/vmx/evmcs.c b/arch/x86/kvm/vmx/evmcs.c +index 09fac0ddac8bd..87e3dc10edf40 100644 +--- a/arch/x86/kvm/vmx/evmcs.c ++++ b/arch/x86/kvm/vmx/evmcs.c +@@ -361,6 +361,7 @@ void nested_evmcs_filter_control_msr(u32 msr_index, u64 *pdata) + case MSR_IA32_VMX_PROCBASED_CTLS2: + ctl_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC; + break; ++ case MSR_IA32_VMX_TRUE_PINBASED_CTLS: + case MSR_IA32_VMX_PINBASED_CTLS: + ctl_high &= ~EVMCS1_UNSUPPORTED_PINCTRL; + break; +-- +2.34.1 + diff --git a/queue-5.16/kvm-nvmx-evmcs-filter-out-vm_exit_save_vmx_preemptio.patch b/queue-5.16/kvm-nvmx-evmcs-filter-out-vm_exit_save_vmx_preemptio.patch new file mode 100644 index 00000000000..3685e3083b7 --- /dev/null +++ b/queue-5.16/kvm-nvmx-evmcs-filter-out-vm_exit_save_vmx_preemptio.patch @@ -0,0 +1,43 @@ +From cc7feb082d5b0af2dc36c72361680f005b9af3af Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jan 2022 18:01:31 +0100 +Subject: KVM: nVMX: eVMCS: Filter out VM_EXIT_SAVE_VMX_PREEMPTION_TIMER + +From: Vitaly Kuznetsov + +[ Upstream commit 7a601e2cf61558dfd534a9ecaad09f5853ad8204 ] + +Enlightened VMCS v1 doesn't have VMX_PREEMPTION_TIMER_VALUE field, +PIN_BASED_VMX_PREEMPTION_TIMER is also filtered out already so it makes +sense to filter out VM_EXIT_SAVE_VMX_PREEMPTION_TIMER too. + +Note, none of the currently existing Windows/Hyper-V versions are known +to enable 'save VMX-preemption timer value' when eVMCS is in use, the +change is aimed at making the filtering future proof. + +Signed-off-by: Vitaly Kuznetsov +Message-Id: <20220112170134.1904308-3-vkuznets@redhat.com> +Signed-off-by: Paolo Bonzini +Signed-off-by: Sasha Levin +--- + arch/x86/kvm/vmx/evmcs.h | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/kvm/vmx/evmcs.h b/arch/x86/kvm/vmx/evmcs.h +index 6255fa7167720..8d70f9aea94bc 100644 +--- a/arch/x86/kvm/vmx/evmcs.h ++++ b/arch/x86/kvm/vmx/evmcs.h +@@ -59,7 +59,9 @@ DECLARE_STATIC_KEY_FALSE(enable_evmcs); + SECONDARY_EXEC_SHADOW_VMCS | \ + SECONDARY_EXEC_TSC_SCALING | \ + SECONDARY_EXEC_PAUSE_LOOP_EXITING) +-#define EVMCS1_UNSUPPORTED_VMEXIT_CTRL (VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) ++#define EVMCS1_UNSUPPORTED_VMEXIT_CTRL \ ++ (VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | \ ++ VM_EXIT_SAVE_VMX_PREEMPTION_TIMER) + #define EVMCS1_UNSUPPORTED_VMENTRY_CTRL (VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) + #define EVMCS1_UNSUPPORTED_VMFUNC (VMX_VMFUNC_EPTP_SWITCHING) + +-- +2.34.1 + diff --git a/queue-5.16/kvm-svm-don-t-kill-sev-guest-if-smap-erratum-trigger.patch b/queue-5.16/kvm-svm-don-t-kill-sev-guest-if-smap-erratum-trigger.patch new file mode 100644 index 00000000000..3efb3cad256 --- /dev/null +++ b/queue-5.16/kvm-svm-don-t-kill-sev-guest-if-smap-erratum-trigger.patch @@ -0,0 +1,54 @@ +From 30787caa18b567cd44014737dc5e88d87fdfbc9c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jan 2022 01:07:19 +0000 +Subject: KVM: SVM: Don't kill SEV guest if SMAP erratum triggers in usermode + +From: Sean Christopherson + +[ Upstream commit cdf85e0c5dc766fc7fc779466280e454a6d04f87 ] + +Inject a #GP instead of synthesizing triple fault to try to avoid killing +the guest if emulation of an SEV guest fails due to encountering the SMAP +erratum. The injected #GP may still be fatal to the guest, e.g. if the +userspace process is providing critical functionality, but KVM should +make every attempt to keep the guest alive. + +Signed-off-by: Sean Christopherson +Reviewed-by: Liam Merwick +Message-Id: <20220120010719.711476-10-seanjc@google.com> +Signed-off-by: Paolo Bonzini +Signed-off-by: Sasha Levin +--- + arch/x86/kvm/svm/svm.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c +index 3efada37272c0..d6a4acaa65742 100644 +--- a/arch/x86/kvm/svm/svm.c ++++ b/arch/x86/kvm/svm/svm.c +@@ -4530,7 +4530,21 @@ static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int i + is_user = svm_get_cpl(vcpu) == 3; + if (smap && (!smep || is_user)) { + pr_err_ratelimited("KVM: SEV Guest triggered AMD Erratum 1096\n"); +- kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); ++ ++ /* ++ * If the fault occurred in userspace, arbitrarily inject #GP ++ * to avoid killing the guest and to hopefully avoid confusing ++ * the guest kernel too much, e.g. injecting #PF would not be ++ * coherent with respect to the guest's page tables. Request ++ * triple fault if the fault occurred in the kernel as there's ++ * no fault that KVM can inject without confusing the guest. ++ * In practice, the triple fault is moot as no sane SEV kernel ++ * will execute from user memory while also running with SMAP=1. ++ */ ++ if (is_user) ++ kvm_inject_gp(vcpu, 0); ++ else ++ kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); + } + + return false; +-- +2.34.1 + diff --git a/queue-5.16/kvm-vmx-set-vmcs.pending_dbg.bs-on-db-in-sti-movss-b.patch b/queue-5.16/kvm-vmx-set-vmcs.pending_dbg.bs-on-db-in-sti-movss-b.patch new file mode 100644 index 00000000000..d1c07166a47 --- /dev/null +++ b/queue-5.16/kvm-vmx-set-vmcs.pending_dbg.bs-on-db-in-sti-movss-b.patch @@ -0,0 +1,101 @@ +From 631ab88b140dbd168a14695f0d2cd2fb3bcd8f3d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jan 2022 00:06:24 +0000 +Subject: KVM: VMX: Set vmcs.PENDING_DBG.BS on #DB in STI/MOVSS blocking shadow + +From: Sean Christopherson + +[ Upstream commit b9bed78e2fa9571b7c983b20666efa0009030c71 ] + +Set vmcs.GUEST_PENDING_DBG_EXCEPTIONS.BS, a.k.a. the pending single-step +breakpoint flag, when re-injecting a #DB with RFLAGS.TF=1, and STI or +MOVSS blocking is active. Setting the flag is necessary to make VM-Entry +consistency checks happy, as VMX has an invariant that if RFLAGS.TF is +set and STI/MOVSS blocking is true, then the previous instruction must +have been STI or MOV/POP, and therefore a single-step #DB must be pending +since the RFLAGS.TF cannot have been set by the previous instruction, +i.e. the one instruction delay after setting RFLAGS.TF must have already +expired. + +Normally, the CPU sets vmcs.GUEST_PENDING_DBG_EXCEPTIONS.BS appropriately +when recording guest state as part of a VM-Exit, but #DB VM-Exits +intentionally do not treat the #DB as "guest state" as interception of +the #DB effectively makes the #DB host-owned, thus KVM needs to manually +set PENDING_DBG.BS when forwarding/re-injecting the #DB to the guest. + +Note, although this bug can be triggered by guest userspace, doing so +requires IOPL=3, and guest userspace running with IOPL=3 has full access +to all I/O ports (from the guest's perspective) and can crash/reboot the +guest any number of ways. IOPL=3 is required because STI blocking kicks +in if and only if RFLAGS.IF is toggled 0=>1, and if CPL>IOPL, STI either +takes a #GP or modifies RFLAGS.VIF, not RFLAGS.IF. + +MOVSS blocking can be initiated by userspace, but can be coincident with +a #DB if and only if DR7.GD=1 (General Detect enabled) and a MOV DR is +executed in the MOVSS shadow. MOV DR #GPs at CPL>0, thus MOVSS blocking +is problematic only for CPL0 (and only if the guest is crazy enough to +access a DR in a MOVSS shadow). All other sources of #DBs are either +suppressed by MOVSS blocking (single-step, code fetch, data, and I/O), +are mutually exclusive with MOVSS blocking (T-bit task switch), or are +already handled by KVM (ICEBP, a.k.a. INT1). + +This bug was originally found by running tests[1] created for XSA-308[2]. +Note that Xen's userspace test emits ICEBP in the MOVSS shadow, which is +presumably why the Xen bug was deemed to be an exploitable DOS from guest +userspace. KVM already handles ICEBP by skipping the ICEBP instruction +and thus clears MOVSS blocking as a side effect of its "emulation". + +[1] http://xenbits.xenproject.org/docs/xtf/xsa-308_2main_8c_source.html +[2] https://xenbits.xen.org/xsa/advisory-308.html + +Reported-by: David Woodhouse +Reported-by: Alexander Graf +Signed-off-by: Sean Christopherson +Message-Id: <20220120000624.655815-1-seanjc@google.com> +Signed-off-by: Paolo Bonzini +Signed-off-by: Sasha Levin +--- + arch/x86/kvm/vmx/vmx.c | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c +index 7f4e6f625abcf..fe4a36c984460 100644 +--- a/arch/x86/kvm/vmx/vmx.c ++++ b/arch/x86/kvm/vmx/vmx.c +@@ -4811,8 +4811,33 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu) + dr6 = vmx_get_exit_qual(vcpu); + if (!(vcpu->guest_debug & + (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) { ++ /* ++ * If the #DB was due to ICEBP, a.k.a. INT1, skip the ++ * instruction. ICEBP generates a trap-like #DB, but ++ * despite its interception control being tied to #DB, ++ * is an instruction intercept, i.e. the VM-Exit occurs ++ * on the ICEBP itself. Note, skipping ICEBP also ++ * clears STI and MOVSS blocking. ++ * ++ * For all other #DBs, set vmcs.PENDING_DBG_EXCEPTIONS.BS ++ * if single-step is enabled in RFLAGS and STI or MOVSS ++ * blocking is active, as the CPU doesn't set the bit ++ * on VM-Exit due to #DB interception. VM-Entry has a ++ * consistency check that a single-step #DB is pending ++ * in this scenario as the previous instruction cannot ++ * have toggled RFLAGS.TF 0=>1 (because STI and POP/MOV ++ * don't modify RFLAGS), therefore the one instruction ++ * delay when activating single-step breakpoints must ++ * have already expired. Note, the CPU sets/clears BS ++ * as appropriate for all other VM-Exits types. ++ */ + if (is_icebp(intr_info)) + WARN_ON(!skip_emulated_instruction(vcpu)); ++ else if ((vmx_get_rflags(vcpu) & X86_EFLAGS_TF) && ++ (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & ++ (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS))) ++ vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS, ++ vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS) | DR6_BS); + + kvm_queue_exception_p(vcpu, DB_VECTOR, dr6); + return 1; +-- +2.34.1 + diff --git a/queue-5.16/kvm-x86-report-deprecated-x87-features-in-supported-.patch b/queue-5.16/kvm-x86-report-deprecated-x87-features-in-supported-.patch new file mode 100644 index 00000000000..ba75d215f59 --- /dev/null +++ b/queue-5.16/kvm-x86-report-deprecated-x87-features-in-supported-.patch @@ -0,0 +1,67 @@ +From 2e31ed76802fa7e7dd8436a78b8769af7c7457c5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 3 Feb 2022 16:13:48 -0800 +Subject: KVM: x86: Report deprecated x87 features in supported CPUID + +From: Jim Mattson + +[ Upstream commit e3bcfda012edd3564e12551b212afbd2521a1f68 ] + +CPUID.(EAX=7,ECX=0):EBX.FDP_EXCPTN_ONLY[bit 6] and +CPUID.(EAX=7,ECX=0):EBX.ZERO_FCS_FDS[bit 13] are "defeature" +bits. Unlike most of the other CPUID feature bits, these bits are +clear if the features are present and set if the features are not +present. These bits should be reported in KVM_GET_SUPPORTED_CPUID, +because if these bits are set on hardware, they cannot be cleared in +the guest CPUID. Doing so would claim guest support for a feature that +the hardware doesn't support and that can't be efficiently emulated. + +Of course, any software (e.g WIN87EM.DLL) expecting these features to +be present likely predates these CPUID feature bits and therefore +doesn't know to check for them anyway. + +Aaron Lewis added the corresponding X86_FEATURE macros in +commit cbb99c0f5887 ("x86/cpufeatures: Add FDP_EXCPTN_ONLY and +ZERO_FCS_FDS"), with the intention of reporting these bits in +KVM_GET_SUPPORTED_CPUID, but I was unable to find a proposed patch on +the kvm list. + +Opportunistically reordered the CPUID_7_0_EBX capability bits from +least to most significant. + +Cc: Aaron Lewis +Signed-off-by: Jim Mattson +Message-Id: <20220204001348.2844660-1-jmattson@google.com> +Signed-off-by: Paolo Bonzini +Signed-off-by: Sasha Levin +--- + arch/x86/kvm/cpuid.c | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c +index add8f58d686e3..bf18679757c70 100644 +--- a/arch/x86/kvm/cpuid.c ++++ b/arch/x86/kvm/cpuid.c +@@ -532,12 +532,13 @@ void kvm_set_cpu_caps(void) + ); + + kvm_cpu_cap_mask(CPUID_7_0_EBX, +- F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | +- F(BMI2) | F(ERMS) | F(INVPCID) | F(RTM) | 0 /*MPX*/ | F(RDSEED) | +- F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) | +- F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) | +- F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | 0 /*INTEL_PT*/ +- ); ++ F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) | ++ F(FDP_EXCPTN_ONLY) | F(SMEP) | F(BMI2) | F(ERMS) | F(INVPCID) | ++ F(RTM) | F(ZERO_FCS_FDS) | 0 /*MPX*/ | F(AVX512F) | ++ F(AVX512DQ) | F(RDSEED) | F(ADX) | F(SMAP) | F(AVX512IFMA) | ++ F(CLFLUSHOPT) | F(CLWB) | 0 /*INTEL_PT*/ | F(AVX512PF) | ++ F(AVX512ER) | F(AVX512CD) | F(SHA_NI) | F(AVX512BW) | ++ F(AVX512VL)); + + kvm_cpu_cap_mask(CPUID_7_ECX, + F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) | +-- +2.34.1 + diff --git a/queue-5.16/mips-fix-build-error-due-to-ptr-used-in-more-places.patch b/queue-5.16/mips-fix-build-error-due-to-ptr-used-in-more-places.patch new file mode 100644 index 00000000000..8d957b88044 --- /dev/null +++ b/queue-5.16/mips-fix-build-error-due-to-ptr-used-in-more-places.patch @@ -0,0 +1,947 @@ +From fc791c7e2d291f0e1f0bab016ed198ed7af5487a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jan 2022 15:19:44 +0100 +Subject: MIPS: Fix build error due to PTR used in more places + +From: Thomas Bogendoerfer + +[ Upstream commit fa62f39dc7e25fc16371b958ac59b9a6fd260bea ] + +Use PTR_WD instead of PTR to avoid clashes with other parts. + +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Sasha Levin +--- + arch/mips/include/asm/asm.h | 4 +- + arch/mips/include/asm/ftrace.h | 4 +- + arch/mips/include/asm/r4kcache.h | 4 +- + arch/mips/include/asm/unaligned-emul.h | 176 ++++++++++++------------- + arch/mips/kernel/mips-r2-to-r6-emul.c | 104 +++++++-------- + arch/mips/kernel/r2300_fpu.S | 6 +- + arch/mips/kernel/r4k_fpu.S | 2 +- + arch/mips/kernel/relocate_kernel.S | 22 ++-- + arch/mips/kernel/scall32-o32.S | 10 +- + arch/mips/kernel/scall64-n32.S | 2 +- + arch/mips/kernel/scall64-n64.S | 2 +- + arch/mips/kernel/scall64-o32.S | 10 +- + arch/mips/kernel/syscall.c | 8 +- + arch/mips/lib/csum_partial.S | 4 +- + arch/mips/lib/memcpy.S | 4 +- + arch/mips/lib/memset.S | 2 +- + arch/mips/lib/strncpy_user.S | 4 +- + arch/mips/lib/strnlen_user.S | 2 +- + 18 files changed, 185 insertions(+), 185 deletions(-) + +diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h +index 2f8ce94ebaafe..cc69f1deb1ca8 100644 +--- a/arch/mips/include/asm/asm.h ++++ b/arch/mips/include/asm/asm.h +@@ -276,7 +276,7 @@ symbol = value + + #define PTR_SCALESHIFT 2 + +-#define PTR .word ++#define PTR_WD .word + #define PTRSIZE 4 + #define PTRLOG 2 + #endif +@@ -301,7 +301,7 @@ symbol = value + + #define PTR_SCALESHIFT 3 + +-#define PTR .dword ++#define PTR_WD .dword + #define PTRSIZE 8 + #define PTRLOG 3 + #endif +diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h +index b463f2aa5a613..db497a8167da2 100644 +--- a/arch/mips/include/asm/ftrace.h ++++ b/arch/mips/include/asm/ftrace.h +@@ -32,7 +32,7 @@ do { \ + ".previous\n" \ + \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR) "\t1b, 3b\n\t" \ ++ STR(PTR_WD) "\t1b, 3b\n\t" \ + ".previous\n" \ + \ + : [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\ +@@ -54,7 +54,7 @@ do { \ + ".previous\n" \ + \ + ".section\t__ex_table,\"a\"\n\t"\ +- STR(PTR) "\t1b, 3b\n\t" \ ++ STR(PTR_WD) "\t1b, 3b\n\t" \ + ".previous\n" \ + \ + : [tmp_err] "=r" (error) \ +diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h +index af3788589ee6d..431a1c9d53fc7 100644 +--- a/arch/mips/include/asm/r4kcache.h ++++ b/arch/mips/include/asm/r4kcache.h +@@ -119,7 +119,7 @@ static inline void flush_scache_line(unsigned long addr) + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ +- " "STR(PTR)" 1b, 3b \n" \ ++ " "STR(PTR_WD)" 1b, 3b \n" \ + " .previous" \ + : "+r" (__err) \ + : "i" (op), "r" (addr), "i" (-EFAULT)); \ +@@ -142,7 +142,7 @@ static inline void flush_scache_line(unsigned long addr) + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ +- " "STR(PTR)" 1b, 3b \n" \ ++ " "STR(PTR_WD)" 1b, 3b \n" \ + " .previous" \ + : "+r" (__err) \ + : "i" (op), "r" (addr), "i" (-EFAULT)); \ +diff --git a/arch/mips/include/asm/unaligned-emul.h b/arch/mips/include/asm/unaligned-emul.h +index 2022b18944b97..9af0f4d3d288c 100644 +--- a/arch/mips/include/asm/unaligned-emul.h ++++ b/arch/mips/include/asm/unaligned-emul.h +@@ -20,8 +20,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -41,8 +41,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -74,10 +74,10 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -102,8 +102,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -125,8 +125,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -145,8 +145,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -178,10 +178,10 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -223,14 +223,14 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ +- STR(PTR)"\t5b, 11b\n\t" \ +- STR(PTR)"\t6b, 11b\n\t" \ +- STR(PTR)"\t7b, 11b\n\t" \ +- STR(PTR)"\t8b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t5b, 11b\n\t" \ ++ STR(PTR_WD)"\t6b, 11b\n\t" \ ++ STR(PTR_WD)"\t7b, 11b\n\t" \ ++ STR(PTR_WD)"\t8b, 11b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -255,8 +255,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT));\ +@@ -276,8 +276,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT)); \ +@@ -296,8 +296,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT)); \ +@@ -325,10 +325,10 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ + ".previous" \ + : "=&r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT) \ +@@ -365,14 +365,14 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ +- STR(PTR)"\t5b, 11b\n\t" \ +- STR(PTR)"\t6b, 11b\n\t" \ +- STR(PTR)"\t7b, 11b\n\t" \ +- STR(PTR)"\t8b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t5b, 11b\n\t" \ ++ STR(PTR_WD)"\t6b, 11b\n\t" \ ++ STR(PTR_WD)"\t7b, 11b\n\t" \ ++ STR(PTR_WD)"\t8b, 11b\n\t" \ + ".previous" \ + : "=&r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT) \ +@@ -398,8 +398,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -419,8 +419,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -452,10 +452,10 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -481,8 +481,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -504,8 +504,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -524,8 +524,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -557,10 +557,10 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -602,14 +602,14 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ +- STR(PTR)"\t5b, 11b\n\t" \ +- STR(PTR)"\t6b, 11b\n\t" \ +- STR(PTR)"\t7b, 11b\n\t" \ +- STR(PTR)"\t8b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t5b, 11b\n\t" \ ++ STR(PTR_WD)"\t6b, 11b\n\t" \ ++ STR(PTR_WD)"\t7b, 11b\n\t" \ ++ STR(PTR_WD)"\t8b, 11b\n\t" \ + ".previous" \ + : "=&r" (value), "=r" (res) \ + : "r" (addr), "i" (-EFAULT)); \ +@@ -632,8 +632,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT));\ +@@ -653,8 +653,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT)); \ +@@ -673,8 +673,8 @@ do { \ + "j\t3b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 4b\n\t" \ +- STR(PTR)"\t2b, 4b\n\t" \ ++ STR(PTR_WD)"\t1b, 4b\n\t" \ ++ STR(PTR_WD)"\t2b, 4b\n\t" \ + ".previous" \ + : "=r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT)); \ +@@ -703,10 +703,10 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ + ".previous" \ + : "=&r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT) \ +@@ -743,14 +743,14 @@ do { \ + "j\t10b\n\t" \ + ".previous\n\t" \ + ".section\t__ex_table,\"a\"\n\t" \ +- STR(PTR)"\t1b, 11b\n\t" \ +- STR(PTR)"\t2b, 11b\n\t" \ +- STR(PTR)"\t3b, 11b\n\t" \ +- STR(PTR)"\t4b, 11b\n\t" \ +- STR(PTR)"\t5b, 11b\n\t" \ +- STR(PTR)"\t6b, 11b\n\t" \ +- STR(PTR)"\t7b, 11b\n\t" \ +- STR(PTR)"\t8b, 11b\n\t" \ ++ STR(PTR_WD)"\t1b, 11b\n\t" \ ++ STR(PTR_WD)"\t2b, 11b\n\t" \ ++ STR(PTR_WD)"\t3b, 11b\n\t" \ ++ STR(PTR_WD)"\t4b, 11b\n\t" \ ++ STR(PTR_WD)"\t5b, 11b\n\t" \ ++ STR(PTR_WD)"\t6b, 11b\n\t" \ ++ STR(PTR_WD)"\t7b, 11b\n\t" \ ++ STR(PTR_WD)"\t8b, 11b\n\t" \ + ".previous" \ + : "=&r" (res) \ + : "r" (value), "r" (addr), "i" (-EFAULT) \ +diff --git a/arch/mips/kernel/mips-r2-to-r6-emul.c b/arch/mips/kernel/mips-r2-to-r6-emul.c +index a39ec755e4c24..750fe569862b6 100644 +--- a/arch/mips/kernel/mips-r2-to-r6-emul.c ++++ b/arch/mips/kernel/mips-r2-to-r6-emul.c +@@ -1258,10 +1258,10 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 10b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1333,10 +1333,10 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 10b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1404,10 +1404,10 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 9b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1474,10 +1474,10 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 9b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1589,14 +1589,14 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 9b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" +- STR(PTR) " 5b,8b\n" +- STR(PTR) " 6b,8b\n" +- STR(PTR) " 7b,8b\n" +- STR(PTR) " 0b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" ++ STR(PTR_WD) " 5b,8b\n" ++ STR(PTR_WD) " 6b,8b\n" ++ STR(PTR_WD) " 7b,8b\n" ++ STR(PTR_WD) " 0b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1708,14 +1708,14 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 9b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" +- STR(PTR) " 5b,8b\n" +- STR(PTR) " 6b,8b\n" +- STR(PTR) " 7b,8b\n" +- STR(PTR) " 0b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" ++ STR(PTR_WD) " 5b,8b\n" ++ STR(PTR_WD) " 6b,8b\n" ++ STR(PTR_WD) " 7b,8b\n" ++ STR(PTR_WD) " 0b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1827,14 +1827,14 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 9b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" +- STR(PTR) " 5b,8b\n" +- STR(PTR) " 6b,8b\n" +- STR(PTR) " 7b,8b\n" +- STR(PTR) " 0b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" ++ STR(PTR_WD) " 5b,8b\n" ++ STR(PTR_WD) " 6b,8b\n" ++ STR(PTR_WD) " 7b,8b\n" ++ STR(PTR_WD) " 0b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -1945,14 +1945,14 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + " j 9b\n" + " .previous\n" + " .section __ex_table,\"a\"\n" +- STR(PTR) " 1b,8b\n" +- STR(PTR) " 2b,8b\n" +- STR(PTR) " 3b,8b\n" +- STR(PTR) " 4b,8b\n" +- STR(PTR) " 5b,8b\n" +- STR(PTR) " 6b,8b\n" +- STR(PTR) " 7b,8b\n" +- STR(PTR) " 0b,8b\n" ++ STR(PTR_WD) " 1b,8b\n" ++ STR(PTR_WD) " 2b,8b\n" ++ STR(PTR_WD) " 3b,8b\n" ++ STR(PTR_WD) " 4b,8b\n" ++ STR(PTR_WD) " 5b,8b\n" ++ STR(PTR_WD) " 6b,8b\n" ++ STR(PTR_WD) " 7b,8b\n" ++ STR(PTR_WD) " 0b,8b\n" + " .previous\n" + " .set pop\n" + : "+&r"(rt), "=&r"(rs), +@@ -2007,7 +2007,7 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + "j 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" +- STR(PTR) " 1b,3b\n" ++ STR(PTR_WD) " 1b,3b\n" + ".previous\n" + : "=&r"(res), "+&r"(err) + : "r"(vaddr), "i"(SIGSEGV) +@@ -2065,7 +2065,7 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + "j 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" +- STR(PTR) " 1b,3b\n" ++ STR(PTR_WD) " 1b,3b\n" + ".previous\n" + : "+&r"(res), "+&r"(err) + : "r"(vaddr), "i"(SIGSEGV)); +@@ -2126,7 +2126,7 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + "j 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" +- STR(PTR) " 1b,3b\n" ++ STR(PTR_WD) " 1b,3b\n" + ".previous\n" + : "=&r"(res), "+&r"(err) + : "r"(vaddr), "i"(SIGSEGV) +@@ -2189,7 +2189,7 @@ int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) + "j 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" +- STR(PTR) " 1b,3b\n" ++ STR(PTR_WD) " 1b,3b\n" + ".previous\n" + : "+&r"(res), "+&r"(err) + : "r"(vaddr), "i"(SIGSEGV)); +diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S +index cbf6db98cfb38..2748c55820c24 100644 +--- a/arch/mips/kernel/r2300_fpu.S ++++ b/arch/mips/kernel/r2300_fpu.S +@@ -23,14 +23,14 @@ + #define EX(a,b) \ + 9: a,##b; \ + .section __ex_table,"a"; \ +- PTR 9b,fault; \ ++ PTR_WD 9b,fault; \ + .previous + + #define EX2(a,b) \ + 9: a,##b; \ + .section __ex_table,"a"; \ +- PTR 9b,fault; \ +- PTR 9b+4,fault; \ ++ PTR_WD 9b,fault; \ ++ PTR_WD 9b+4,fault; \ + .previous + + .set mips1 +diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S +index b91e911064756..2e687c60bc4f1 100644 +--- a/arch/mips/kernel/r4k_fpu.S ++++ b/arch/mips/kernel/r4k_fpu.S +@@ -31,7 +31,7 @@ + .ex\@: \insn \reg, \src + .set pop + .section __ex_table,"a" +- PTR .ex\@, fault ++ PTR_WD .ex\@, fault + .previous + .endm + +diff --git a/arch/mips/kernel/relocate_kernel.S b/arch/mips/kernel/relocate_kernel.S +index f3c908abdbb80..cfde14b48fd8d 100644 +--- a/arch/mips/kernel/relocate_kernel.S ++++ b/arch/mips/kernel/relocate_kernel.S +@@ -147,10 +147,10 @@ LEAF(kexec_smp_wait) + + kexec_args: + EXPORT(kexec_args) +-arg0: PTR 0x0 +-arg1: PTR 0x0 +-arg2: PTR 0x0 +-arg3: PTR 0x0 ++arg0: PTR_WD 0x0 ++arg1: PTR_WD 0x0 ++arg2: PTR_WD 0x0 ++arg3: PTR_WD 0x0 + .size kexec_args,PTRSIZE*4 + + #ifdef CONFIG_SMP +@@ -161,10 +161,10 @@ arg3: PTR 0x0 + */ + secondary_kexec_args: + EXPORT(secondary_kexec_args) +-s_arg0: PTR 0x0 +-s_arg1: PTR 0x0 +-s_arg2: PTR 0x0 +-s_arg3: PTR 0x0 ++s_arg0: PTR_WD 0x0 ++s_arg1: PTR_WD 0x0 ++s_arg2: PTR_WD 0x0 ++s_arg3: PTR_WD 0x0 + .size secondary_kexec_args,PTRSIZE*4 + kexec_flag: + LONG 0x1 +@@ -173,17 +173,17 @@ kexec_flag: + + kexec_start_address: + EXPORT(kexec_start_address) +- PTR 0x0 ++ PTR_WD 0x0 + .size kexec_start_address, PTRSIZE + + kexec_indirection_page: + EXPORT(kexec_indirection_page) +- PTR 0 ++ PTR_WD 0 + .size kexec_indirection_page, PTRSIZE + + relocate_new_kernel_end: + + relocate_new_kernel_size: + EXPORT(relocate_new_kernel_size) +- PTR relocate_new_kernel_end - relocate_new_kernel ++ PTR_WD relocate_new_kernel_end - relocate_new_kernel + .size relocate_new_kernel_size, PTRSIZE +diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S +index b1b2e106f7118..9bfce5f75f601 100644 +--- a/arch/mips/kernel/scall32-o32.S ++++ b/arch/mips/kernel/scall32-o32.S +@@ -72,10 +72,10 @@ loads_done: + .set pop + + .section __ex_table,"a" +- PTR load_a4, bad_stack_a4 +- PTR load_a5, bad_stack_a5 +- PTR load_a6, bad_stack_a6 +- PTR load_a7, bad_stack_a7 ++ PTR_WD load_a4, bad_stack_a4 ++ PTR_WD load_a5, bad_stack_a5 ++ PTR_WD load_a6, bad_stack_a6 ++ PTR_WD load_a7, bad_stack_a7 + .previous + + lw t0, TI_FLAGS($28) # syscall tracing enabled? +@@ -216,7 +216,7 @@ einval: li v0, -ENOSYS + #endif /* CONFIG_MIPS_MT_FPAFF */ + + #define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native) +-#define __SYSCALL(nr, entry) PTR entry ++#define __SYSCALL(nr, entry) PTR_WD entry + .align 2 + .type sys_call_table, @object + EXPORT(sys_call_table) +diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S +index f650c55a17dc5..97456b2ca7dc3 100644 +--- a/arch/mips/kernel/scall64-n32.S ++++ b/arch/mips/kernel/scall64-n32.S +@@ -101,7 +101,7 @@ not_n32_scall: + + END(handle_sysn32) + +-#define __SYSCALL(nr, entry) PTR entry ++#define __SYSCALL(nr, entry) PTR_WD entry + .type sysn32_call_table, @object + EXPORT(sysn32_call_table) + #include +diff --git a/arch/mips/kernel/scall64-n64.S b/arch/mips/kernel/scall64-n64.S +index 5d7bfc65e4d0b..5f6ed4b4c3993 100644 +--- a/arch/mips/kernel/scall64-n64.S ++++ b/arch/mips/kernel/scall64-n64.S +@@ -109,7 +109,7 @@ illegal_syscall: + j n64_syscall_exit + END(handle_sys64) + +-#define __SYSCALL(nr, entry) PTR entry ++#define __SYSCALL(nr, entry) PTR_WD entry + .align 3 + .type sys_call_table, @object + EXPORT(sys_call_table) +diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S +index cedc8bd888046..d3c2616cba226 100644 +--- a/arch/mips/kernel/scall64-o32.S ++++ b/arch/mips/kernel/scall64-o32.S +@@ -73,10 +73,10 @@ load_a7: lw a7, 28(t0) # argument #8 from usp + loads_done: + + .section __ex_table,"a" +- PTR load_a4, bad_stack_a4 +- PTR load_a5, bad_stack_a5 +- PTR load_a6, bad_stack_a6 +- PTR load_a7, bad_stack_a7 ++ PTR_WD load_a4, bad_stack_a4 ++ PTR_WD load_a5, bad_stack_a5 ++ PTR_WD load_a6, bad_stack_a6 ++ PTR_WD load_a7, bad_stack_a7 + .previous + + li t1, _TIF_WORK_SYSCALL_ENTRY +@@ -214,7 +214,7 @@ einval: li v0, -ENOSYS + END(sys32_syscall) + + #define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compat) +-#define __SYSCALL(nr, entry) PTR entry ++#define __SYSCALL(nr, entry) PTR_WD entry + .align 3 + .type sys32_call_table,@object + EXPORT(sys32_call_table) +diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c +index 5512cd586e6e8..ae93a607ddf7e 100644 +--- a/arch/mips/kernel/syscall.c ++++ b/arch/mips/kernel/syscall.c +@@ -122,8 +122,8 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) + " j 3b \n" + " .previous \n" + " .section __ex_table,\"a\" \n" +- " "STR(PTR)" 1b, 4b \n" +- " "STR(PTR)" 2b, 4b \n" ++ " "STR(PTR_WD)" 1b, 4b \n" ++ " "STR(PTR_WD)" 2b, 4b \n" + " .previous \n" + " .set pop \n" + : [old] "=&r" (old), +@@ -152,8 +152,8 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) + " j 3b \n" + " .previous \n" + " .section __ex_table,\"a\" \n" +- " "STR(PTR)" 1b, 5b \n" +- " "STR(PTR)" 2b, 5b \n" ++ " "STR(PTR_WD)" 1b, 5b \n" ++ " "STR(PTR_WD)" 2b, 5b \n" + " .previous \n" + " .set pop \n" + : [old] "=&r" (old), +diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S +index a46db08071953..7767137c3e49a 100644 +--- a/arch/mips/lib/csum_partial.S ++++ b/arch/mips/lib/csum_partial.S +@@ -347,7 +347,7 @@ EXPORT_SYMBOL(csum_partial) + .if \mode == LEGACY_MODE; \ + 9: insn reg, addr; \ + .section __ex_table,"a"; \ +- PTR 9b, .L_exc; \ ++ PTR_WD 9b, .L_exc; \ + .previous; \ + /* This is enabled in EVA mode */ \ + .else; \ +@@ -356,7 +356,7 @@ EXPORT_SYMBOL(csum_partial) + ((\to == USEROP) && (type == ST_INSN)); \ + 9: __BUILD_EVA_INSN(insn##e, reg, addr); \ + .section __ex_table,"a"; \ +- PTR 9b, .L_exc; \ ++ PTR_WD 9b, .L_exc; \ + .previous; \ + .else; \ + /* EVA without exception */ \ +diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S +index 277c32296636d..18a43f2e29c81 100644 +--- a/arch/mips/lib/memcpy.S ++++ b/arch/mips/lib/memcpy.S +@@ -116,7 +116,7 @@ + .if \mode == LEGACY_MODE; \ + 9: insn reg, addr; \ + .section __ex_table,"a"; \ +- PTR 9b, handler; \ ++ PTR_WD 9b, handler; \ + .previous; \ + /* This is assembled in EVA mode */ \ + .else; \ +@@ -125,7 +125,7 @@ + ((\to == USEROP) && (type == ST_INSN)); \ + 9: __BUILD_EVA_INSN(insn##e, reg, addr); \ + .section __ex_table,"a"; \ +- PTR 9b, handler; \ ++ PTR_WD 9b, handler; \ + .previous; \ + .else; \ + /* \ +diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S +index b0baa3c79fad0..0b342bae9a98c 100644 +--- a/arch/mips/lib/memset.S ++++ b/arch/mips/lib/memset.S +@@ -52,7 +52,7 @@ + 9: ___BUILD_EVA_INSN(insn, reg, addr); \ + .endif; \ + .section __ex_table,"a"; \ +- PTR 9b, handler; \ ++ PTR_WD 9b, handler; \ + .previous + + .macro f_fill64 dst, offset, val, fixup, mode +diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S +index 556acf684d7be..13aaa9927ad12 100644 +--- a/arch/mips/lib/strncpy_user.S ++++ b/arch/mips/lib/strncpy_user.S +@@ -15,7 +15,7 @@ + #define EX(insn,reg,addr,handler) \ + 9: insn reg, addr; \ + .section __ex_table,"a"; \ +- PTR 9b, handler; \ ++ PTR_WD 9b, handler; \ + .previous + + /* +@@ -59,7 +59,7 @@ LEAF(__strncpy_from_user_asm) + jr ra + + .section __ex_table,"a" +- PTR 1b, .Lfault ++ PTR_WD 1b, .Lfault + .previous + + EXPORT_SYMBOL(__strncpy_from_user_asm) +diff --git a/arch/mips/lib/strnlen_user.S b/arch/mips/lib/strnlen_user.S +index 92b63f20ec05f..6de31b616f9c1 100644 +--- a/arch/mips/lib/strnlen_user.S ++++ b/arch/mips/lib/strnlen_user.S +@@ -14,7 +14,7 @@ + #define EX(insn,reg,addr,handler) \ + 9: insn reg, addr; \ + .section __ex_table,"a"; \ +- PTR 9b, handler; \ ++ PTR_WD 9b, handler; \ + .previous + + /* +-- +2.34.1 + diff --git a/queue-5.16/net-sched-clarify-error-message-when-qdisc-kind-is-u.patch b/queue-5.16/net-sched-clarify-error-message-when-qdisc-kind-is-u.patch new file mode 100644 index 00000000000..05eeb6949f5 --- /dev/null +++ b/queue-5.16/net-sched-clarify-error-message-when-qdisc-kind-is-u.patch @@ -0,0 +1,41 @@ +From a7363ea8d5a99e12893407d3a13d4351a1ff329a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jan 2022 14:19:09 -0300 +Subject: net: sched: Clarify error message when qdisc kind is unknown + +From: Victor Nogueira + +[ Upstream commit 973bf8fdd12f0e70ea351c018e68edd377a836d1 ] + +When adding a tc rule with a qdisc kind that is not supported or not +compiled into the kernel, the kernel emits the following error: "Error: +Specified qdisc not found.". Found via tdc testing when ETS qdisc was not +compiled in and it was not obvious right away what the message meant +without looking at the kernel code. + +Change the error message to be more explicit and say the qdisc kind is +unknown. + +Signed-off-by: Victor Nogueira +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/sched/sch_api.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/sched/sch_api.c b/net/sched/sch_api.c +index 910a36ed56343..e4a7ce5c79f4f 100644 +--- a/net/sched/sch_api.c ++++ b/net/sched/sch_api.c +@@ -1204,7 +1204,7 @@ static struct Qdisc *qdisc_create(struct net_device *dev, + + err = -ENOENT; + if (!ops) { +- NL_SET_ERR_MSG(extack, "Specified qdisc not found"); ++ NL_SET_ERR_MSG(extack, "Specified qdisc kind is unknown"); + goto err_out; + } + +-- +2.34.1 + diff --git a/queue-5.16/net-stmmac-dwmac-sun8i-use-return-val-of-readl_poll_.patch b/queue-5.16/net-stmmac-dwmac-sun8i-use-return-val-of-readl_poll_.patch new file mode 100644 index 00000000000..0871d5cbbb7 --- /dev/null +++ b/queue-5.16/net-stmmac-dwmac-sun8i-use-return-val-of-readl_poll_.patch @@ -0,0 +1,42 @@ +From 0aa123fddc0c75bfacc981cf6fe35e85f4a74752 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jan 2022 00:52:15 +0800 +Subject: net: stmmac: dwmac-sun8i: use return val of readl_poll_timeout() + +From: Jisheng Zhang + +[ Upstream commit 9e0db41e7a0b6f1271cbcfb16dbf5b8641b4e440 ] + +When readl_poll_timeout() timeout, we'd better directly use its return +value. + +Before this patch: +[ 2.145528] dwmac-sun8i: probe of 4500000.ethernet failed with error -14 + +After this patch: +[ 2.138520] dwmac-sun8i: probe of 4500000.ethernet failed with error -110 + +Signed-off-by: Jisheng Zhang +Acked-by: Jernej Skrabec +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index 617d0e4c64958..09644ab0d87a7 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -756,7 +756,7 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv) + + if (err) { + dev_err(priv->device, "EMAC reset timeout\n"); +- return -EFAULT; ++ return err; + } + return 0; + } +-- +2.34.1 + diff --git a/queue-5.16/net-stmmac-reduce-unnecessary-wakeups-from-eee-sw-ti.patch b/queue-5.16/net-stmmac-reduce-unnecessary-wakeups-from-eee-sw-ti.patch new file mode 100644 index 00000000000..5057c750bfe --- /dev/null +++ b/queue-5.16/net-stmmac-reduce-unnecessary-wakeups-from-eee-sw-ti.patch @@ -0,0 +1,75 @@ +From 58d1f7c3160f93f8584eed053c50ee7951d356aa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 23 Jan 2022 23:54:58 +0800 +Subject: net: stmmac: reduce unnecessary wakeups from eee sw timer + +From: Jisheng Zhang + +[ Upstream commit c74ead223deb88bdf18af8c772d7ca5a9b6c3c2b ] + +Currently, on EEE capable platforms, if EEE SW timer is used, the SW +timer cause 1 wakeup/s even if the TX has successfully entered EEE. +Remove this unnecessary wakeup by only calling mod_timer() if we +haven't successfully entered EEE. + +Signed-off-by: Jisheng Zhang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index c5ad28e543e43..f4015579e8adc 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -400,7 +400,7 @@ static void stmmac_lpi_entry_timer_config(struct stmmac_priv *priv, bool en) + * Description: this function is to verify and enter in LPI mode in case of + * EEE. + */ +-static void stmmac_enable_eee_mode(struct stmmac_priv *priv) ++static int stmmac_enable_eee_mode(struct stmmac_priv *priv) + { + u32 tx_cnt = priv->plat->tx_queues_to_use; + u32 queue; +@@ -410,13 +410,14 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv) + struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; + + if (tx_q->dirty_tx != tx_q->cur_tx) +- return; /* still unfinished work */ ++ return -EBUSY; /* still unfinished work */ + } + + /* Check and enter in LPI mode */ + if (!priv->tx_path_in_lpi_mode) + stmmac_set_eee_mode(priv, priv->hw, + priv->plat->en_tx_lpi_clockgating); ++ return 0; + } + + /** +@@ -448,8 +449,8 @@ static void stmmac_eee_ctrl_timer(struct timer_list *t) + { + struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer); + +- stmmac_enable_eee_mode(priv); +- mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer)); ++ if (stmmac_enable_eee_mode(priv)) ++ mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer)); + } + + /** +@@ -2641,8 +2642,8 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue) + + if (priv->eee_enabled && !priv->tx_path_in_lpi_mode && + priv->eee_sw_timer_en) { +- stmmac_enable_eee_mode(priv); +- mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer)); ++ if (stmmac_enable_eee_mode(priv)) ++ mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer)); + } + + /* We still have pending packets, let's call for a new scheduling */ +-- +2.34.1 + diff --git a/queue-5.16/net-sunrpc-fix-reference-count-leaks-in-rpc_sysfs_xp.patch b/queue-5.16/net-sunrpc-fix-reference-count-leaks-in-rpc_sysfs_xp.patch new file mode 100644 index 00000000000..60d4611ce0a --- /dev/null +++ b/queue-5.16/net-sunrpc-fix-reference-count-leaks-in-rpc_sysfs_xp.patch @@ -0,0 +1,49 @@ +From d8da015bc9a1c88d2462226a0e61936072eceed8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Sep 2021 12:32:38 +0800 +Subject: net/sunrpc: fix reference count leaks in rpc_sysfs_xprt_state_change + +From: Xiyu Yang + +[ Upstream commit 776d794f28c95051bc70405a7b1fa40115658a18 ] + +The refcount leak issues take place in an error handling path. When the +3rd argument buf doesn't match with "offline", "online" or "remove", the +function simply returns -EINVAL and forgets to decrease the reference +count of a rpc_xprt object and a rpc_xprt_switch object increased by +rpc_sysfs_xprt_kobj_get_xprt() and +rpc_sysfs_xprt_kobj_get_xprt_switch(), causing reference count leaks of +both unused objects. + +Fix this issue by jumping to the error handling path labelled with +out_put when buf matches none of "offline", "online" or "remove". + +Signed-off-by: Xiyu Yang +Signed-off-by: Xin Xiong +Signed-off-by: Xin Tan +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + net/sunrpc/sysfs.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/net/sunrpc/sysfs.c b/net/sunrpc/sysfs.c +index 2766dd21935b8..77e7d011c1ab1 100644 +--- a/net/sunrpc/sysfs.c ++++ b/net/sunrpc/sysfs.c +@@ -295,8 +295,10 @@ static ssize_t rpc_sysfs_xprt_state_change(struct kobject *kobj, + online = 1; + else if (!strncmp(buf, "remove", 6)) + remove = 1; +- else +- return -EINVAL; ++ else { ++ count = -EINVAL; ++ goto out_put; ++ } + + if (wait_on_bit_lock(&xprt->state, XPRT_LOCKED, TASK_KILLABLE)) { + count = -EINTR; +-- +2.34.1 + diff --git a/queue-5.16/nfs-change-nfs_access_get_cached-to-only-report-the-.patch b/queue-5.16/nfs-change-nfs_access_get_cached-to-only-report-the-.patch new file mode 100644 index 00000000000..9d04c319af7 --- /dev/null +++ b/queue-5.16/nfs-change-nfs_access_get_cached-to-only-report-the-.patch @@ -0,0 +1,171 @@ +From 4abb801729911a468a0d54f8d667895526b83812 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Sep 2021 09:47:57 +1000 +Subject: NFS: change nfs_access_get_cached to only report the mask + +From: NeilBrown + +[ Upstream commit b5e7b59c3480f355910f9d2c6ece5857922a5e54 ] + +Currently the nfs_access_get_cached family of functions report a +'struct nfs_access_entry' as the result, with both .mask and .cred set. +However the .cred is never used. This is probably good and there is no +guarantee that it won't be freed before use. + +Change to only report the 'mask' - as this is all that is used or needed. + +Signed-off-by: NeilBrown +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/dir.c | 20 +++++++++----------- + fs/nfs/nfs4proc.c | 18 +++++++++--------- + include/linux/nfs_fs.h | 4 ++-- + 3 files changed, 20 insertions(+), 22 deletions(-) + +diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c +index 24ce5652d9be8..faf5168880223 100644 +--- a/fs/nfs/dir.c ++++ b/fs/nfs/dir.c +@@ -2695,7 +2695,7 @@ static struct nfs_access_entry *nfs_access_search_rbtree(struct inode *inode, co + return NULL; + } + +-static int nfs_access_get_cached_locked(struct inode *inode, const struct cred *cred, struct nfs_access_entry *res, bool may_block) ++static int nfs_access_get_cached_locked(struct inode *inode, const struct cred *cred, u32 *mask, bool may_block) + { + struct nfs_inode *nfsi = NFS_I(inode); + struct nfs_access_entry *cache; +@@ -2725,8 +2725,7 @@ static int nfs_access_get_cached_locked(struct inode *inode, const struct cred * + spin_lock(&inode->i_lock); + retry = false; + } +- res->cred = cache->cred; +- res->mask = cache->mask; ++ *mask = cache->mask; + list_move_tail(&cache->lru, &nfsi->access_cache_entry_lru); + err = 0; + out: +@@ -2738,7 +2737,7 @@ static int nfs_access_get_cached_locked(struct inode *inode, const struct cred * + return -ENOENT; + } + +-static int nfs_access_get_cached_rcu(struct inode *inode, const struct cred *cred, struct nfs_access_entry *res) ++static int nfs_access_get_cached_rcu(struct inode *inode, const struct cred *cred, u32 *mask) + { + /* Only check the most recently returned cache entry, + * but do it without locking. +@@ -2760,22 +2759,21 @@ static int nfs_access_get_cached_rcu(struct inode *inode, const struct cred *cre + goto out; + if (nfs_check_cache_invalid(inode, NFS_INO_INVALID_ACCESS)) + goto out; +- res->cred = cache->cred; +- res->mask = cache->mask; ++ *mask = cache->mask; + err = 0; + out: + rcu_read_unlock(); + return err; + } + +-int nfs_access_get_cached(struct inode *inode, const struct cred *cred, struct +-nfs_access_entry *res, bool may_block) ++int nfs_access_get_cached(struct inode *inode, const struct cred *cred, ++ u32 *mask, bool may_block) + { + int status; + +- status = nfs_access_get_cached_rcu(inode, cred, res); ++ status = nfs_access_get_cached_rcu(inode, cred, mask); + if (status != 0) +- status = nfs_access_get_cached_locked(inode, cred, res, ++ status = nfs_access_get_cached_locked(inode, cred, mask, + may_block); + + return status; +@@ -2896,7 +2894,7 @@ static int nfs_do_access(struct inode *inode, const struct cred *cred, int mask) + + trace_nfs_access_enter(inode); + +- status = nfs_access_get_cached(inode, cred, &cache, may_block); ++ status = nfs_access_get_cached(inode, cred, &cache.mask, may_block); + if (status == 0) + goto out_cached; + +diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c +index ee3bc79f6ca3a..322ff45ad15ca 100644 +--- a/fs/nfs/nfs4proc.c ++++ b/fs/nfs/nfs4proc.c +@@ -7611,7 +7611,7 @@ static int nfs4_xattr_set_nfs4_user(const struct xattr_handler *handler, + const char *key, const void *buf, + size_t buflen, int flags) + { +- struct nfs_access_entry cache; ++ u32 mask; + int ret; + + if (!nfs_server_capable(inode, NFS_CAP_XATTR)) +@@ -7626,8 +7626,8 @@ static int nfs4_xattr_set_nfs4_user(const struct xattr_handler *handler, + * do a cached access check for the XA* flags to possibly avoid + * doing an RPC and getting EACCES back. + */ +- if (!nfs_access_get_cached(inode, current_cred(), &cache, true)) { +- if (!(cache.mask & NFS_ACCESS_XAWRITE)) ++ if (!nfs_access_get_cached(inode, current_cred(), &mask, true)) { ++ if (!(mask & NFS_ACCESS_XAWRITE)) + return -EACCES; + } + +@@ -7648,14 +7648,14 @@ static int nfs4_xattr_get_nfs4_user(const struct xattr_handler *handler, + struct dentry *unused, struct inode *inode, + const char *key, void *buf, size_t buflen) + { +- struct nfs_access_entry cache; ++ u32 mask; + ssize_t ret; + + if (!nfs_server_capable(inode, NFS_CAP_XATTR)) + return -EOPNOTSUPP; + +- if (!nfs_access_get_cached(inode, current_cred(), &cache, true)) { +- if (!(cache.mask & NFS_ACCESS_XAREAD)) ++ if (!nfs_access_get_cached(inode, current_cred(), &mask, true)) { ++ if (!(mask & NFS_ACCESS_XAREAD)) + return -EACCES; + } + +@@ -7680,13 +7680,13 @@ nfs4_listxattr_nfs4_user(struct inode *inode, char *list, size_t list_len) + ssize_t ret, size; + char *buf; + size_t buflen; +- struct nfs_access_entry cache; ++ u32 mask; + + if (!nfs_server_capable(inode, NFS_CAP_XATTR)) + return 0; + +- if (!nfs_access_get_cached(inode, current_cred(), &cache, true)) { +- if (!(cache.mask & NFS_ACCESS_XALIST)) ++ if (!nfs_access_get_cached(inode, current_cred(), &mask, true)) { ++ if (!(mask & NFS_ACCESS_XALIST)) + return 0; + } + +diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h +index 05f249f20f55d..f33559acbcc28 100644 +--- a/include/linux/nfs_fs.h ++++ b/include/linux/nfs_fs.h +@@ -533,8 +533,8 @@ extern int nfs_instantiate(struct dentry *dentry, struct nfs_fh *fh, + struct nfs_fattr *fattr); + extern int nfs_may_open(struct inode *inode, const struct cred *cred, int openflags); + extern void nfs_access_zap_cache(struct inode *inode); +-extern int nfs_access_get_cached(struct inode *inode, const struct cred *cred, struct nfs_access_entry *res, +- bool may_block); ++extern int nfs_access_get_cached(struct inode *inode, const struct cred *cred, ++ u32 *mask, bool may_block); + + /* + * linux/fs/nfs/symlink.c +-- +2.34.1 + diff --git a/queue-5.16/nfs-nfs4clinet-check-the-return-value-of-kstrdup.patch b/queue-5.16/nfs-nfs4clinet-check-the-return-value-of-kstrdup.patch new file mode 100644 index 00000000000..245c2821b8e --- /dev/null +++ b/queue-5.16/nfs-nfs4clinet-check-the-return-value-of-kstrdup.patch @@ -0,0 +1,40 @@ +From 55a402874709d75f1e859f5294f8e45a7e1a686d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 17 Dec 2021 01:01:33 +0800 +Subject: nfs: nfs4clinet: check the return value of kstrdup() + +From: Xiaoke Wang + +[ Upstream commit fbd2057e5329d3502a27491190237b6be52a1cb6 ] + +kstrdup() returns NULL when some internal memory errors happen, it is +better to check the return value of it so to catch the memory error in +time. + +Signed-off-by: Xiaoke Wang +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4client.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/fs/nfs/nfs4client.c b/fs/nfs/nfs4client.c +index d8b5a250ca050..47a6cf892c95a 100644 +--- a/fs/nfs/nfs4client.c ++++ b/fs/nfs/nfs4client.c +@@ -1343,8 +1343,11 @@ int nfs4_update_server(struct nfs_server *server, const char *hostname, + } + nfs_put_client(clp); + +- if (server->nfs_client->cl_hostname == NULL) ++ if (server->nfs_client->cl_hostname == NULL) { + server->nfs_client->cl_hostname = kstrdup(hostname, GFP_KERNEL); ++ if (server->nfs_client->cl_hostname == NULL) ++ return -ENOMEM; ++ } + nfs_server_insert_lists(server); + + return nfs_probe_server(server, NFS_FH(d_inode(server->super->s_root))); +-- +2.34.1 + diff --git a/queue-5.16/nfsv4-expose-nfs_parse_server_name-function.patch b/queue-5.16/nfsv4-expose-nfs_parse_server_name-function.patch new file mode 100644 index 00000000000..45cd167a27c --- /dev/null +++ b/queue-5.16/nfsv4-expose-nfs_parse_server_name-function.patch @@ -0,0 +1,51 @@ +From dc517a70824ef5aaf4466173bdbc4e0a6428f546 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Dec 2021 14:53:32 -0500 +Subject: NFSv4 expose nfs_parse_server_name function + +From: Olga Kornievskaia + +[ Upstream commit f5b27cc6761e27ee6387a24df1a99ca77b360fea ] + +Make nfs_parse_server_name available outside of nfs4namespace.c. + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4_fs.h | 3 ++- + fs/nfs/nfs4namespace.c | 4 ++-- + 2 files changed, 4 insertions(+), 3 deletions(-) + +diff --git a/fs/nfs/nfs4_fs.h b/fs/nfs/nfs4_fs.h +index 2402a3d8ba997..734ac09becf73 100644 +--- a/fs/nfs/nfs4_fs.h ++++ b/fs/nfs/nfs4_fs.h +@@ -280,7 +280,8 @@ struct rpc_clnt *nfs4_negotiate_security(struct rpc_clnt *, struct inode *, + int nfs4_submount(struct fs_context *, struct nfs_server *); + int nfs4_replace_transport(struct nfs_server *server, + const struct nfs4_fs_locations *locations); +- ++size_t nfs_parse_server_name(char *string, size_t len, struct sockaddr *sa, ++ size_t salen, struct net *net); + /* nfs4proc.c */ + extern int nfs4_handle_exception(struct nfs_server *, int, struct nfs4_exception *); + extern int nfs4_async_handle_error(struct rpc_task *task, +diff --git a/fs/nfs/nfs4namespace.c b/fs/nfs/nfs4namespace.c +index 873342308dc0d..f1ed4f60a7f33 100644 +--- a/fs/nfs/nfs4namespace.c ++++ b/fs/nfs/nfs4namespace.c +@@ -164,8 +164,8 @@ static int nfs4_validate_fspath(struct dentry *dentry, + return 0; + } + +-static size_t nfs_parse_server_name(char *string, size_t len, +- struct sockaddr *sa, size_t salen, struct net *net) ++size_t nfs_parse_server_name(char *string, size_t len, struct sockaddr *sa, ++ size_t salen, struct net *net) + { + ssize_t ret; + +-- +2.34.1 + diff --git a/queue-5.16/nfsv4-handle-port-presence-in-fs_location-server-str.patch b/queue-5.16/nfsv4-handle-port-presence-in-fs_location-server-str.patch new file mode 100644 index 00000000000..c02d2c24638 --- /dev/null +++ b/queue-5.16/nfsv4-handle-port-presence-in-fs_location-server-str.patch @@ -0,0 +1,86 @@ +From 98a7365fb1e57d18cc6a4e5da645e389a5bbde53 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Dec 2021 14:53:33 -0500 +Subject: NFSv4 handle port presence in fs_location server string + +From: Olga Kornievskaia + +[ Upstream commit a8d54baba7c65db2d3278873def61f8d3753d766 ] + +An fs_location attribute returns a string that can be ipv4, ipv6, +or DNS name. An ip location can have a port appended to it and if +no port is present a default port needs to be set. If rpc_pton() +fails to parse, try calling rpc_uaddr2socaddr() that can convert +an universal address. + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4_fs.h | 2 +- + fs/nfs/nfs4namespace.c | 17 +++++++++++------ + 2 files changed, 12 insertions(+), 7 deletions(-) + +diff --git a/fs/nfs/nfs4_fs.h b/fs/nfs/nfs4_fs.h +index 734ac09becf73..85c5d08dfa9cc 100644 +--- a/fs/nfs/nfs4_fs.h ++++ b/fs/nfs/nfs4_fs.h +@@ -281,7 +281,7 @@ int nfs4_submount(struct fs_context *, struct nfs_server *); + int nfs4_replace_transport(struct nfs_server *server, + const struct nfs4_fs_locations *locations); + size_t nfs_parse_server_name(char *string, size_t len, struct sockaddr *sa, +- size_t salen, struct net *net); ++ size_t salen, struct net *net, int port); + /* nfs4proc.c */ + extern int nfs4_handle_exception(struct nfs_server *, int, struct nfs4_exception *); + extern int nfs4_async_handle_error(struct rpc_task *task, +diff --git a/fs/nfs/nfs4namespace.c b/fs/nfs/nfs4namespace.c +index f1ed4f60a7f33..3680c8da510c9 100644 +--- a/fs/nfs/nfs4namespace.c ++++ b/fs/nfs/nfs4namespace.c +@@ -165,15 +165,20 @@ static int nfs4_validate_fspath(struct dentry *dentry, + } + + size_t nfs_parse_server_name(char *string, size_t len, struct sockaddr *sa, +- size_t salen, struct net *net) ++ size_t salen, struct net *net, int port) + { + ssize_t ret; + + ret = rpc_pton(net, string, len, sa, salen); + if (ret == 0) { +- ret = nfs_dns_resolve_name(net, string, len, sa, salen); +- if (ret < 0) +- ret = 0; ++ ret = rpc_uaddr2sockaddr(net, string, len, sa, salen); ++ if (ret == 0) { ++ ret = nfs_dns_resolve_name(net, string, len, sa, salen); ++ if (ret < 0) ++ ret = 0; ++ } ++ } else if (port) { ++ rpc_set_port(sa, port); + } + return ret; + } +@@ -328,7 +333,7 @@ static int try_location(struct fs_context *fc, + nfs_parse_server_name(buf->data, buf->len, + &ctx->nfs_server.address, + sizeof(ctx->nfs_server._address), +- fc->net_ns); ++ fc->net_ns, 0); + if (ctx->nfs_server.addrlen == 0) + continue; + +@@ -496,7 +501,7 @@ static int nfs4_try_replacing_one_location(struct nfs_server *server, + continue; + + salen = nfs_parse_server_name(buf->data, buf->len, +- sap, addr_bufsize, net); ++ sap, addr_bufsize, net, 0); + if (salen == 0) + continue; + rpc_set_port(sap, NFS_PORT); +-- +2.34.1 + diff --git a/queue-5.16/nfsv4-only-print-the-label-when-its-queried.patch b/queue-5.16/nfsv4-only-print-the-label-when-its-queried.patch new file mode 100644 index 00000000000..d2ff1a87503 --- /dev/null +++ b/queue-5.16/nfsv4-only-print-the-label-when-its-queried.patch @@ -0,0 +1,42 @@ +From 012cb42277d202e9f38eba2662322477e8c0fa85 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 29 Nov 2021 15:33:56 -0500 +Subject: NFSv4 only print the label when its queried + +From: Olga Kornievskaia + +[ Upstream commit 2c52c8376db7160a1dd8a681c61c9258405ef143 ] + +When the bitmask of the attributes doesn't include the security label, +don't bother printing it. Since the label might not be null terminated, +adjust the printing format accordingly. + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4xdr.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/fs/nfs/nfs4xdr.c b/fs/nfs/nfs4xdr.c +index 69862bf6db001..801119b7a5964 100644 +--- a/fs/nfs/nfs4xdr.c ++++ b/fs/nfs/nfs4xdr.c +@@ -4200,10 +4200,11 @@ static int decode_attr_security_label(struct xdr_stream *xdr, uint32_t *bitmap, + } else + printk(KERN_WARNING "%s: label too long (%u)!\n", + __func__, len); ++ if (label && label->label) ++ dprintk("%s: label=%.*s, len=%d, PI=%d, LFS=%d\n", ++ __func__, label->len, (char *)label->label, ++ label->len, label->pi, label->lfs); + } +- if (label && label->label) +- dprintk("%s: label=%s, len=%d, PI=%d, LFS=%d\n", __func__, +- (char *)label->label, label->len, label->pi, label->lfs); + return status; + } + +-- +2.34.1 + diff --git a/queue-5.16/nfsv4-remove-zero-number-of-fs_locations-entries-err.patch b/queue-5.16/nfsv4-remove-zero-number-of-fs_locations-entries-err.patch new file mode 100644 index 00000000000..862cb2a1b2d --- /dev/null +++ b/queue-5.16/nfsv4-remove-zero-number-of-fs_locations-entries-err.patch @@ -0,0 +1,50 @@ +From d14adcbf883d4370cb18ce8bce194c6e6def1340 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Dec 2021 14:53:29 -0500 +Subject: NFSv4 remove zero number of fs_locations entries error check + +From: Olga Kornievskaia + +[ Upstream commit 90e12a3191040bd3854d3e236c35921e4e92a044 ] + +Remove the check for the zero length fs_locations reply in the +xdr decoding, and instead check for that in the migration code. + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4state.c | 3 +++ + fs/nfs/nfs4xdr.c | 2 -- + 2 files changed, 3 insertions(+), 2 deletions(-) + +diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c +index f63dfa01001c9..f3265575c28d2 100644 +--- a/fs/nfs/nfs4state.c ++++ b/fs/nfs/nfs4state.c +@@ -2106,6 +2106,9 @@ static int nfs4_try_migration(struct nfs_server *server, const struct cred *cred + } + + result = -NFS4ERR_NXIO; ++ if (!locations->nlocations) ++ goto out; ++ + if (!(locations->fattr.valid & NFS_ATTR_FATTR_V4_LOCATIONS)) { + dprintk("<-- %s: No fs_locations data, migration skipped\n", + __func__); +diff --git a/fs/nfs/nfs4xdr.c b/fs/nfs/nfs4xdr.c +index 801119b7a5964..71a00e48bd2dd 100644 +--- a/fs/nfs/nfs4xdr.c ++++ b/fs/nfs/nfs4xdr.c +@@ -3696,8 +3696,6 @@ static int decode_attr_fs_locations(struct xdr_stream *xdr, uint32_t *bitmap, st + if (unlikely(!p)) + goto out_eio; + n = be32_to_cpup(p); +- if (n <= 0) +- goto out_eio; + for (res->nlocations = 0; res->nlocations < n; res->nlocations++) { + u32 m; + struct nfs4_fs_location *loc; +-- +2.34.1 + diff --git a/queue-5.16/nfsv4-store-server-support-for-fs_location-attribute.patch b/queue-5.16/nfsv4-store-server-support-for-fs_location-attribute.patch new file mode 100644 index 00000000000..8179926ec9c --- /dev/null +++ b/queue-5.16/nfsv4-store-server-support-for-fs_location-attribute.patch @@ -0,0 +1,47 @@ +From 33bc8aa8dc927ea1ebf22d38e82a57dc13350c24 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Dec 2021 14:53:30 -0500 +Subject: NFSv4 store server support for fs_location attribute + +From: Olga Kornievskaia + +[ Upstream commit 8a59bb93b7e3cca389af44781a429ac12ac49be6 ] + +Define and store if server returns it supports fs_locations attribute +as a capability. + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4proc.c | 2 ++ + include/linux/nfs_fs_sb.h | 2 +- + 2 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c +index 322ff45ad15ca..f924d3029d13b 100644 +--- a/fs/nfs/nfs4proc.c ++++ b/fs/nfs/nfs4proc.c +@@ -3874,6 +3874,8 @@ static int _nfs4_server_capabilities(struct nfs_server *server, struct nfs_fh *f + if (res.attr_bitmask[2] & FATTR4_WORD2_SECURITY_LABEL) + server->caps |= NFS_CAP_SECURITY_LABEL; + #endif ++ if (res.attr_bitmask[0] & FATTR4_WORD0_FS_LOCATIONS) ++ server->caps |= NFS_CAP_FS_LOCATIONS; + if (!(res.attr_bitmask[0] & FATTR4_WORD0_FILEID)) + server->fattr_valid &= ~NFS_ATTR_FATTR_FILEID; + if (!(res.attr_bitmask[1] & FATTR4_WORD1_MODE)) +diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h +index 2a9acbfe00f0f..9a6e70ccde56e 100644 +--- a/include/linux/nfs_fs_sb.h ++++ b/include/linux/nfs_fs_sb.h +@@ -287,5 +287,5 @@ struct nfs_server { + #define NFS_CAP_COPY_NOTIFY (1U << 27) + #define NFS_CAP_XATTR (1U << 28) + #define NFS_CAP_READ_PLUS (1U << 29) +- ++#define NFS_CAP_FS_LOCATIONS (1U << 30) + #endif +-- +2.34.1 + diff --git a/queue-5.16/nfsv4.1-fix-uninitialised-variable-in-devicenotify.patch b/queue-5.16/nfsv4.1-fix-uninitialised-variable-in-devicenotify.patch new file mode 100644 index 00000000000..216ffca8d3e --- /dev/null +++ b/queue-5.16/nfsv4.1-fix-uninitialised-variable-in-devicenotify.patch @@ -0,0 +1,106 @@ +From f2f728d9979541979dc639b4449ae4c9b2dca811 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jan 2022 14:50:16 -0500 +Subject: NFSv4.1: Fix uninitialised variable in devicenotify + +From: Trond Myklebust + +[ Upstream commit b05bf5c63b326ce1da84ef42498d8e0e292e694c ] + +When decode_devicenotify_args() exits with no entries, we need to +ensure that the struct cb_devicenotifyargs is initialised to +{ 0, NULL } in order to avoid problems in +nfs4_callback_devicenotify(). + +Reported-by: +Signed-off-by: Trond Myklebust +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/callback.h | 2 +- + fs/nfs/callback_proc.c | 2 +- + fs/nfs/callback_xdr.c | 18 +++++++++--------- + 3 files changed, 11 insertions(+), 11 deletions(-) + +diff --git a/fs/nfs/callback.h b/fs/nfs/callback.h +index 6a2033131c068..ccd4f245cae24 100644 +--- a/fs/nfs/callback.h ++++ b/fs/nfs/callback.h +@@ -170,7 +170,7 @@ struct cb_devicenotifyitem { + }; + + struct cb_devicenotifyargs { +- int ndevs; ++ uint32_t ndevs; + struct cb_devicenotifyitem *devs; + }; + +diff --git a/fs/nfs/callback_proc.c b/fs/nfs/callback_proc.c +index 09c5b1cb3e075..c343666d9a428 100644 +--- a/fs/nfs/callback_proc.c ++++ b/fs/nfs/callback_proc.c +@@ -358,7 +358,7 @@ __be32 nfs4_callback_devicenotify(void *argp, void *resp, + struct cb_process_state *cps) + { + struct cb_devicenotifyargs *args = argp; +- int i; ++ uint32_t i; + __be32 res = 0; + struct nfs_client *clp = cps->clp; + struct nfs_server *server = NULL; +diff --git a/fs/nfs/callback_xdr.c b/fs/nfs/callback_xdr.c +index a67c41ec545fd..f90de8043b0f9 100644 +--- a/fs/nfs/callback_xdr.c ++++ b/fs/nfs/callback_xdr.c +@@ -258,11 +258,9 @@ __be32 decode_devicenotify_args(struct svc_rqst *rqstp, + void *argp) + { + struct cb_devicenotifyargs *args = argp; ++ uint32_t tmp, n, i; + __be32 *p; + __be32 status = 0; +- u32 tmp; +- int n, i; +- args->ndevs = 0; + + /* Num of device notifications */ + p = xdr_inline_decode(xdr, sizeof(uint32_t)); +@@ -271,7 +269,7 @@ __be32 decode_devicenotify_args(struct svc_rqst *rqstp, + goto out; + } + n = ntohl(*p++); +- if (n <= 0) ++ if (n == 0) + goto out; + if (n > ULONG_MAX / sizeof(*args->devs)) { + status = htonl(NFS4ERR_BADXDR); +@@ -330,19 +328,21 @@ __be32 decode_devicenotify_args(struct svc_rqst *rqstp, + dev->cbd_immediate = 0; + } + +- args->ndevs++; +- + dprintk("%s: type %d layout 0x%x immediate %d\n", + __func__, dev->cbd_notify_type, dev->cbd_layout_type, + dev->cbd_immediate); + } ++ args->ndevs = n; ++ dprintk("%s: ndevs %d\n", __func__, args->ndevs); ++ return 0; ++err: ++ kfree(args->devs); + out: ++ args->devs = NULL; ++ args->ndevs = 0; + dprintk("%s: status %d ndevs %d\n", + __func__, ntohl(status), args->ndevs); + return status; +-err: +- kfree(args->devs); +- goto out; + } + + static __be32 decode_sessionid(struct xdr_stream *xdr, +-- +2.34.1 + diff --git a/queue-5.16/nfsv4.1-query-for-fs_location-attr-on-a-new-file-sys.patch b/queue-5.16/nfsv4.1-query-for-fs_location-attr-on-a-new-file-sys.patch new file mode 100644 index 00000000000..c47d0d85c01 --- /dev/null +++ b/queue-5.16/nfsv4.1-query-for-fs_location-attr-on-a-new-file-sys.patch @@ -0,0 +1,245 @@ +From 4ec974a57400dd42908ead3ca3a967722d45fa04 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jan 2022 10:27:38 -0500 +Subject: NFSv4.1 query for fs_location attr on a new file system + +From: Olga Kornievskaia + +[ Upstream commit 1976b2b31462151403c9fc110204fcc2a77bdfd1 ] + +Query the server for other possible trunkable locations for a given +file system on a 4.1+ mount. + +v2: +-- added missing static to nfs4_discover_trunking, +reported by the kernel test robot + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/client.c | 7 ++++ + fs/nfs/nfs4_fs.h | 9 ++--- + fs/nfs/nfs4proc.c | 76 +++++++++++++++++++++++++++++++++++------ + fs/nfs/nfs4state.c | 3 +- + include/linux/nfs_xdr.h | 1 + + 5 files changed, 81 insertions(+), 15 deletions(-) + +diff --git a/fs/nfs/client.c b/fs/nfs/client.c +index 2d2f2c091c65a..a1e87419f3a42 100644 +--- a/fs/nfs/client.c ++++ b/fs/nfs/client.c +@@ -860,6 +860,13 @@ static int nfs_probe_fsinfo(struct nfs_server *server, struct nfs_fh *mntfh, str + server->namelen = pathinfo.max_namelen; + } + ++ if (clp->rpc_ops->discover_trunking != NULL && ++ (server->caps & NFS_CAP_FS_LOCATIONS)) { ++ error = clp->rpc_ops->discover_trunking(server, mntfh); ++ if (error < 0) ++ return error; ++ } ++ + return 0; + } + +diff --git a/fs/nfs/nfs4_fs.h b/fs/nfs/nfs4_fs.h +index ed5eaca6801ee..2402a3d8ba997 100644 +--- a/fs/nfs/nfs4_fs.h ++++ b/fs/nfs/nfs4_fs.h +@@ -260,8 +260,8 @@ struct nfs4_state_maintenance_ops { + }; + + struct nfs4_mig_recovery_ops { +- int (*get_locations)(struct inode *, struct nfs4_fs_locations *, +- struct page *, const struct cred *); ++ int (*get_locations)(struct nfs_server *, struct nfs_fh *, ++ struct nfs4_fs_locations *, struct page *, const struct cred *); + int (*fsid_present)(struct inode *, const struct cred *); + }; + +@@ -302,8 +302,9 @@ extern int nfs4_do_close(struct nfs4_state *state, gfp_t gfp_mask, int wait); + extern int nfs4_server_capabilities(struct nfs_server *server, struct nfs_fh *fhandle); + extern int nfs4_proc_fs_locations(struct rpc_clnt *, struct inode *, const struct qstr *, + struct nfs4_fs_locations *, struct page *); +-extern int nfs4_proc_get_locations(struct inode *, struct nfs4_fs_locations *, +- struct page *page, const struct cred *); ++extern int nfs4_proc_get_locations(struct nfs_server *, struct nfs_fh *, ++ struct nfs4_fs_locations *, ++ struct page *page, const struct cred *); + extern int nfs4_proc_fsid_present(struct inode *, const struct cred *); + extern struct rpc_clnt *nfs4_proc_lookup_mountpoint(struct inode *, + struct dentry *, +diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c +index f924d3029d13b..9a94e758212c8 100644 +--- a/fs/nfs/nfs4proc.c ++++ b/fs/nfs/nfs4proc.c +@@ -3934,6 +3934,60 @@ int nfs4_server_capabilities(struct nfs_server *server, struct nfs_fh *fhandle) + return err; + } + ++static int _nfs4_discover_trunking(struct nfs_server *server, ++ struct nfs_fh *fhandle) ++{ ++ struct nfs4_fs_locations *locations = NULL; ++ struct page *page; ++ const struct cred *cred; ++ struct nfs_client *clp = server->nfs_client; ++ const struct nfs4_state_maintenance_ops *ops = ++ clp->cl_mvops->state_renewal_ops; ++ int status = -ENOMEM; ++ ++ cred = ops->get_state_renewal_cred(clp); ++ if (cred == NULL) { ++ cred = nfs4_get_clid_cred(clp); ++ if (cred == NULL) ++ return -ENOKEY; ++ } ++ ++ page = alloc_page(GFP_KERNEL); ++ locations = kmalloc(sizeof(struct nfs4_fs_locations), GFP_KERNEL); ++ if (page == NULL || locations == NULL) ++ goto out; ++ ++ status = nfs4_proc_get_locations(server, fhandle, locations, page, ++ cred); ++ if (status) ++ goto out; ++out: ++ if (page) ++ __free_page(page); ++ kfree(locations); ++ return status; ++} ++ ++static int nfs4_discover_trunking(struct nfs_server *server, ++ struct nfs_fh *fhandle) ++{ ++ struct nfs4_exception exception = { ++ .interruptible = true, ++ }; ++ struct nfs_client *clp = server->nfs_client; ++ int err = 0; ++ ++ if (!nfs4_has_session(clp)) ++ goto out; ++ do { ++ err = nfs4_handle_exception(server, ++ _nfs4_discover_trunking(server, fhandle), ++ &exception); ++ } while (exception.retry); ++out: ++ return err; ++} ++ + static int _nfs4_lookup_root(struct nfs_server *server, struct nfs_fh *fhandle, + struct nfs_fsinfo *info) + { +@@ -7820,18 +7874,18 @@ int nfs4_proc_fs_locations(struct rpc_clnt *client, struct inode *dir, + * appended to this compound to identify the client ID which is + * performing recovery. + */ +-static int _nfs40_proc_get_locations(struct inode *inode, ++static int _nfs40_proc_get_locations(struct nfs_server *server, ++ struct nfs_fh *fhandle, + struct nfs4_fs_locations *locations, + struct page *page, const struct cred *cred) + { +- struct nfs_server *server = NFS_SERVER(inode); + struct rpc_clnt *clnt = server->client; + u32 bitmask[2] = { + [0] = FATTR4_WORD0_FSID | FATTR4_WORD0_FS_LOCATIONS, + }; + struct nfs4_fs_locations_arg args = { + .clientid = server->nfs_client->cl_clientid, +- .fh = NFS_FH(inode), ++ .fh = fhandle, + .page = page, + .bitmask = bitmask, + .migration = 1, /* skip LOOKUP */ +@@ -7877,17 +7931,17 @@ static int _nfs40_proc_get_locations(struct inode *inode, + * When the client supports GETATTR(fs_locations_info), it can + * be plumbed in here. + */ +-static int _nfs41_proc_get_locations(struct inode *inode, ++static int _nfs41_proc_get_locations(struct nfs_server *server, ++ struct nfs_fh *fhandle, + struct nfs4_fs_locations *locations, + struct page *page, const struct cred *cred) + { +- struct nfs_server *server = NFS_SERVER(inode); + struct rpc_clnt *clnt = server->client; + u32 bitmask[2] = { + [0] = FATTR4_WORD0_FSID | FATTR4_WORD0_FS_LOCATIONS, + }; + struct nfs4_fs_locations_arg args = { +- .fh = NFS_FH(inode), ++ .fh = fhandle, + .page = page, + .bitmask = bitmask, + .migration = 1, /* skip LOOKUP */ +@@ -7936,11 +7990,11 @@ static int _nfs41_proc_get_locations(struct inode *inode, + * -NFS4ERR_LEASE_MOVED is returned if the server still has leases + * from this client that require migration recovery. + */ +-int nfs4_proc_get_locations(struct inode *inode, ++int nfs4_proc_get_locations(struct nfs_server *server, ++ struct nfs_fh *fhandle, + struct nfs4_fs_locations *locations, + struct page *page, const struct cred *cred) + { +- struct nfs_server *server = NFS_SERVER(inode); + struct nfs_client *clp = server->nfs_client; + const struct nfs4_mig_recovery_ops *ops = + clp->cl_mvops->mig_recovery_ops; +@@ -7953,10 +8007,11 @@ int nfs4_proc_get_locations(struct inode *inode, + (unsigned long long)server->fsid.major, + (unsigned long long)server->fsid.minor, + clp->cl_hostname); +- nfs_display_fhandle(NFS_FH(inode), __func__); ++ nfs_display_fhandle(fhandle, __func__); + + do { +- status = ops->get_locations(inode, locations, page, cred); ++ status = ops->get_locations(server, fhandle, locations, page, ++ cred); + if (status != -NFS4ERR_DELAY) + break; + nfs4_handle_exception(server, status, &exception); +@@ -10425,6 +10480,7 @@ const struct nfs_rpc_ops nfs_v4_clientops = { + .free_client = nfs4_free_client, + .create_server = nfs4_create_server, + .clone_server = nfs_clone_server, ++ .discover_trunking = nfs4_discover_trunking, + }; + + static const struct xattr_handler nfs4_xattr_nfs4_acl_handler = { +diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c +index f3265575c28d2..499bef9fe1186 100644 +--- a/fs/nfs/nfs4state.c ++++ b/fs/nfs/nfs4state.c +@@ -2098,7 +2098,8 @@ static int nfs4_try_migration(struct nfs_server *server, const struct cred *cred + } + + inode = d_inode(server->super->s_root); +- result = nfs4_proc_get_locations(inode, locations, page, cred); ++ result = nfs4_proc_get_locations(server, NFS_FH(inode), locations, ++ page, cred); + if (result) { + dprintk("<-- %s: failed to retrieve fs_locations: %d\n", + __func__, result); +diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h +index 967a0098f0a97..695fa84611b66 100644 +--- a/include/linux/nfs_xdr.h ++++ b/include/linux/nfs_xdr.h +@@ -1795,6 +1795,7 @@ struct nfs_rpc_ops { + struct nfs_server *(*create_server)(struct fs_context *); + struct nfs_server *(*clone_server)(struct nfs_server *, struct nfs_fh *, + struct nfs_fattr *, rpc_authflavor_t); ++ int (*discover_trunking)(struct nfs_server *, struct nfs_fh *); + }; + + /* +-- +2.34.1 + diff --git a/queue-5.16/nvme-pci-add-the-ignore_dev_subnqn-quirk-for-intel-p.patch b/queue-5.16/nvme-pci-add-the-ignore_dev_subnqn-quirk-for-intel-p.patch new file mode 100644 index 00000000000..77505592f74 --- /dev/null +++ b/queue-5.16/nvme-pci-add-the-ignore_dev_subnqn-quirk-for-intel-p.patch @@ -0,0 +1,41 @@ +From 66d2c36a67f0e5943a875712324e15a8aec6f809 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 21 Jun 2021 19:07:01 -0400 +Subject: nvme-pci: add the IGNORE_DEV_SUBNQN quirk for Intel P4500/P4600 SSDs + +From: Wu Zheng + +[ Upstream commit 25e58af4be412d59e056da65cc1cefbd89185bd2 ] + +The Intel P4500/P4600 SSDs do not report a subsystem NQN despite claiming +compliance to a standards version where reporting one is required. + +Add the IGNORE_DEV_SUBNQN quirk to not fail the initialization of a +second such SSDs in a system. + +Signed-off-by: Zheng Wu +Signed-off-by: Ye Jinhe +Reviewed-by: Keith Busch +Signed-off-by: Christoph Hellwig +Signed-off-by: Sasha Levin +--- + drivers/nvme/host/pci.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c +index ca2ee806d74b6..953ea3d5d4bfb 100644 +--- a/drivers/nvme/host/pci.c ++++ b/drivers/nvme/host/pci.c +@@ -3326,7 +3326,8 @@ static const struct pci_device_id nvme_id_table[] = { + NVME_QUIRK_DEALLOCATE_ZEROES, }, + { PCI_VDEVICE(INTEL, 0x0a54), /* Intel P4500/P4600 */ + .driver_data = NVME_QUIRK_STRIPE_SIZE | +- NVME_QUIRK_DEALLOCATE_ZEROES, }, ++ NVME_QUIRK_DEALLOCATE_ZEROES | ++ NVME_QUIRK_IGNORE_DEV_SUBNQN, }, + { PCI_VDEVICE(INTEL, 0x0a55), /* Dell Express Flash P4600 */ + .driver_data = NVME_QUIRK_STRIPE_SIZE | + NVME_QUIRK_DEALLOCATE_ZEROES, }, +-- +2.34.1 + diff --git a/queue-5.16/perf-always-wake-the-parent-event.patch b/queue-5.16/perf-always-wake-the-parent-event.patch new file mode 100644 index 00000000000..b87a4e51c8c --- /dev/null +++ b/queue-5.16/perf-always-wake-the-parent-event.patch @@ -0,0 +1,96 @@ +From 3ace183175035ad2b9dae1948227c41d003175d6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 6 Dec 2021 11:38:40 +0000 +Subject: perf: Always wake the parent event + +From: James Clark + +[ Upstream commit 961c39121759ad09a89598ec4ccdd34ae0468a19 ] + +When using per-process mode and event inheritance is set to true, +forked processes will create a new perf events via inherit_event() -> +perf_event_alloc(). But these events will not have ring buffers +assigned to them. Any call to wakeup will be dropped if it's called on +an event with no ring buffer assigned because that's the object that +holds the wakeup list. + +If the child event is disabled due to a call to +perf_aux_output_begin() or perf_aux_output_end(), the wakeup is +dropped leaving userspace hanging forever on the poll. + +Normally the event is explicitly re-enabled by userspace after it +wakes up to read the aux data, but in this case it does not get woken +up so the event remains disabled. + +This can be reproduced when using Arm SPE and 'stress' which forks once +before running the workload. By looking at the list of aux buffers read, +it's apparent that they stop after the fork: + + perf record -e arm_spe// -vvv -- stress -c 1 + +With this patch applied they continue to be printed. This behaviour +doesn't happen when using systemwide or per-cpu mode. + +Reported-by: Ruben Ayrapetyan +Signed-off-by: James Clark +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/20211206113840.130802-2-james.clark@arm.com +Signed-off-by: Sasha Levin +--- + kernel/events/core.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +diff --git a/kernel/events/core.c b/kernel/events/core.c +index 04e6e2dae60e4..a0e21d0f36d7a 100644 +--- a/kernel/events/core.c ++++ b/kernel/events/core.c +@@ -6004,6 +6004,8 @@ static void ring_buffer_attach(struct perf_event *event, + struct perf_buffer *old_rb = NULL; + unsigned long flags; + ++ WARN_ON_ONCE(event->parent); ++ + if (event->rb) { + /* + * Should be impossible, we set this when removing +@@ -6061,6 +6063,9 @@ static void ring_buffer_wakeup(struct perf_event *event) + { + struct perf_buffer *rb; + ++ if (event->parent) ++ event = event->parent; ++ + rcu_read_lock(); + rb = rcu_dereference(event->rb); + if (rb) { +@@ -6074,6 +6079,9 @@ struct perf_buffer *ring_buffer_get(struct perf_event *event) + { + struct perf_buffer *rb; + ++ if (event->parent) ++ event = event->parent; ++ + rcu_read_lock(); + rb = rcu_dereference(event->rb); + if (rb) { +@@ -6772,7 +6780,7 @@ static unsigned long perf_prepare_sample_aux(struct perf_event *event, + if (WARN_ON_ONCE(READ_ONCE(sampler->oncpu) != smp_processor_id())) + goto out; + +- rb = ring_buffer_get(sampler->parent ? sampler->parent : sampler); ++ rb = ring_buffer_get(sampler); + if (!rb) + goto out; + +@@ -6838,7 +6846,7 @@ static void perf_aux_sample_output(struct perf_event *event, + if (WARN_ON_ONCE(!sampler || !data->aux_size)) + return; + +- rb = ring_buffer_get(sampler->parent ? sampler->parent : sampler); ++ rb = ring_buffer_get(sampler); + if (!rb) + return; + +-- +2.34.1 + diff --git a/queue-5.16/perf-x86-rapl-fix-amd-event-handling.patch b/queue-5.16/perf-x86-rapl-fix-amd-event-handling.patch new file mode 100644 index 00000000000..c5e4f8d748c --- /dev/null +++ b/queue-5.16/perf-x86-rapl-fix-amd-event-handling.patch @@ -0,0 +1,69 @@ +From 87fa827fbea004bccc9f101d468fb9ec11f4db07 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jan 2022 10:56:59 -0800 +Subject: perf/x86/rapl: fix AMD event handling + +From: Stephane Eranian + +[ Upstream commit 0036fb00a756a2f6e360d44e2e3d2200a8afbc9b ] + +The RAPL events exposed under /sys/devices/power/events should only reflect +what the underlying hardware actually support. This is how it works on Intel +RAPL and Intel core/uncore PMUs in general. +But on AMD, this was not the case. All possible RAPL events were advertised. + +This is what it showed on an AMD Fam17h: +$ ls /sys/devices/power/events/ +energy-cores energy-gpu energy-pkg energy-psys +energy-ram energy-cores.scale energy-gpu.scale energy-pkg.scale +energy-psys.scale energy-ram.scale energy-cores.unit energy-gpu.unit +energy-pkg.unit energy-psys.unit energy-ram.unit + +Yet, on AMD Fam17h, only energy-pkg is supported. + +This patch fixes the problem. Given the way perf_msr_probe() works, the +amd_rapl_msrs[] table has to have all entries filled out and in particular +the group field, otherwise perf_msr_probe() defaults to making the event +visible. + +With the patch applied, the kernel now only shows was is actually supported: + +$ ls /sys/devices/power/events/ +energy-pkg energy-pkg.scale energy-pkg.unit + +The patch also uses the RAPL_MSR_MASK because only the 32-bits LSB of the +RAPL counters are relevant when reading power consumption. + +Signed-off-by: Stephane Eranian +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/20220105185659.643355-1-eranian@google.com +Signed-off-by: Sasha Levin +--- + arch/x86/events/rapl.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c +index 85feafacc445d..77e3a47af5ad5 100644 +--- a/arch/x86/events/rapl.c ++++ b/arch/x86/events/rapl.c +@@ -536,11 +536,14 @@ static struct perf_msr intel_rapl_spr_msrs[] = { + * - perf_msr_probe(PERF_RAPL_MAX) + * - want to use same event codes across both architectures + */ +-static struct perf_msr amd_rapl_msrs[PERF_RAPL_MAX] = { +- [PERF_RAPL_PKG] = { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr }, ++static struct perf_msr amd_rapl_msrs[] = { ++ [PERF_RAPL_PP0] = { 0, &rapl_events_cores_group, 0, false, 0 }, ++ [PERF_RAPL_PKG] = { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr, false, RAPL_MSR_MASK }, ++ [PERF_RAPL_RAM] = { 0, &rapl_events_ram_group, 0, false, 0 }, ++ [PERF_RAPL_PP1] = { 0, &rapl_events_gpu_group, 0, false, 0 }, ++ [PERF_RAPL_PSYS] = { 0, &rapl_events_psys_group, 0, false, 0 }, + }; + +- + static int rapl_cpu_offline(unsigned int cpu) + { + struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu); +-- +2.34.1 + diff --git a/queue-5.16/pm-hibernate-remove-register_nosave_region_late.patch b/queue-5.16/pm-hibernate-remove-register_nosave_region_late.patch new file mode 100644 index 00000000000..d1bdac1195c --- /dev/null +++ b/queue-5.16/pm-hibernate-remove-register_nosave_region_late.patch @@ -0,0 +1,96 @@ +From 7ab1208a400b57706279fea67cebe00a7ea08067 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jan 2022 11:47:51 +0100 +Subject: PM: hibernate: Remove register_nosave_region_late() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Amadeusz Sławiński + +[ Upstream commit 33569ef3c754a82010f266b7b938a66a3ccf90a4 ] + +It is an unused wrapper forcing kmalloc allocation for registering +nosave regions. Also, rename __register_nosave_region() to +register_nosave_region() now that there is no need for disambiguation. + +Signed-off-by: Amadeusz Sławiński +Reviewed-by: Cezary Rojewski +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + include/linux/suspend.h | 11 +---------- + kernel/power/snapshot.c | 21 +++++++-------------- + 2 files changed, 8 insertions(+), 24 deletions(-) + +diff --git a/include/linux/suspend.h b/include/linux/suspend.h +index 8af13ba60c7e4..c1310c571d805 100644 +--- a/include/linux/suspend.h ++++ b/include/linux/suspend.h +@@ -430,15 +430,7 @@ struct platform_hibernation_ops { + + #ifdef CONFIG_HIBERNATION + /* kernel/power/snapshot.c */ +-extern void __register_nosave_region(unsigned long b, unsigned long e, int km); +-static inline void __init register_nosave_region(unsigned long b, unsigned long e) +-{ +- __register_nosave_region(b, e, 0); +-} +-static inline void __init register_nosave_region_late(unsigned long b, unsigned long e) +-{ +- __register_nosave_region(b, e, 1); +-} ++extern void register_nosave_region(unsigned long b, unsigned long e); + extern int swsusp_page_is_forbidden(struct page *); + extern void swsusp_set_page_free(struct page *); + extern void swsusp_unset_page_free(struct page *); +@@ -457,7 +449,6 @@ int pfn_is_nosave(unsigned long pfn); + int hibernate_quiet_exec(int (*func)(void *data), void *data); + #else /* CONFIG_HIBERNATION */ + static inline void register_nosave_region(unsigned long b, unsigned long e) {} +-static inline void register_nosave_region_late(unsigned long b, unsigned long e) {} + static inline int swsusp_page_is_forbidden(struct page *p) { return 0; } + static inline void swsusp_set_page_free(struct page *p) {} + static inline void swsusp_unset_page_free(struct page *p) {} +diff --git a/kernel/power/snapshot.c b/kernel/power/snapshot.c +index f7a9860782135..330d499376924 100644 +--- a/kernel/power/snapshot.c ++++ b/kernel/power/snapshot.c +@@ -978,8 +978,7 @@ static void memory_bm_recycle(struct memory_bitmap *bm) + * Register a range of page frames the contents of which should not be saved + * during hibernation (to be used in the early initialization code). + */ +-void __init __register_nosave_region(unsigned long start_pfn, +- unsigned long end_pfn, int use_kmalloc) ++void __init register_nosave_region(unsigned long start_pfn, unsigned long end_pfn) + { + struct nosave_region *region; + +@@ -995,18 +994,12 @@ void __init __register_nosave_region(unsigned long start_pfn, + goto Report; + } + } +- if (use_kmalloc) { +- /* During init, this shouldn't fail */ +- region = kmalloc(sizeof(struct nosave_region), GFP_KERNEL); +- BUG_ON(!region); +- } else { +- /* This allocation cannot fail */ +- region = memblock_alloc(sizeof(struct nosave_region), +- SMP_CACHE_BYTES); +- if (!region) +- panic("%s: Failed to allocate %zu bytes\n", __func__, +- sizeof(struct nosave_region)); +- } ++ /* This allocation cannot fail */ ++ region = memblock_alloc(sizeof(struct nosave_region), ++ SMP_CACHE_BYTES); ++ if (!region) ++ panic("%s: Failed to allocate %zu bytes\n", __func__, ++ sizeof(struct nosave_region)); + region->start_pfn = start_pfn; + region->end_pfn = end_pfn; + list_add_tail(®ion->list, &nosave_regions); +-- +2.34.1 + diff --git a/queue-5.16/powerpc-fixmap-fix-vm-debug-warning-on-unmap.patch b/queue-5.16/powerpc-fixmap-fix-vm-debug-warning-on-unmap.patch new file mode 100644 index 00000000000..3c1b9b56436 --- /dev/null +++ b/queue-5.16/powerpc-fixmap-fix-vm-debug-warning-on-unmap.patch @@ -0,0 +1,148 @@ +From 7644b326b8f9ea6c1e93d6c0baf5f7078a4976ec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 6 Dec 2021 11:11:51 +0000 +Subject: powerpc/fixmap: Fix VM debug warning on unmap + +From: Christophe Leroy + +[ Upstream commit aec982603aa8cc0a21143681feb5f60ecc69d718 ] + +Unmapping a fixmap entry is done by calling __set_fixmap() +with FIXMAP_PAGE_CLEAR as flags. + +Today, powerpc __set_fixmap() calls map_kernel_page(). + +map_kernel_page() is not happy when called a second time +for the same page. + + WARNING: CPU: 0 PID: 1 at arch/powerpc/mm/pgtable.c:194 set_pte_at+0xc/0x1e8 + CPU: 0 PID: 1 Comm: swapper Not tainted 5.16.0-rc3-s3k-dev-01993-g350ff07feb7d-dirty #682 + NIP: c0017cd4 LR: c00187f0 CTR: 00000010 + REGS: e1011d50 TRAP: 0700 Not tainted (5.16.0-rc3-s3k-dev-01993-g350ff07feb7d-dirty) + MSR: 00029032 CR: 42000208 XER: 00000000 + + GPR00: c0165fec e1011e10 c14c0000 c0ee2550 ff800000 c0f3d000 00000000 c001686c + GPR08: 00001000 b00045a9 00000001 c0f58460 c0f50000 00000000 c0007e10 00000000 + GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 + GPR24: 00000000 00000000 c0ee2550 00000000 c0f57000 00000ff8 00000000 ff800000 + NIP [c0017cd4] set_pte_at+0xc/0x1e8 + LR [c00187f0] map_kernel_page+0x9c/0x100 + Call Trace: + [e1011e10] [c0736c68] vsnprintf+0x358/0x6c8 (unreliable) + [e1011e30] [c0165fec] __set_fixmap+0x30/0x44 + [e1011e40] [c0c13bdc] early_iounmap+0x11c/0x170 + [e1011e70] [c0c06cb0] ioremap_legacy_serial_console+0x88/0xc0 + [e1011e90] [c0c03634] do_one_initcall+0x80/0x178 + [e1011ef0] [c0c0385c] kernel_init_freeable+0xb4/0x250 + [e1011f20] [c0007e34] kernel_init+0x24/0x140 + [e1011f30] [c0016268] ret_from_kernel_thread+0x5c/0x64 + Instruction dump: + 7fe3fb78 48019689 80010014 7c630034 83e1000c 5463d97e 7c0803a6 38210010 + 4e800020 81250000 712a0001 41820008 <0fe00000> 9421ffe0 93e1001c 48000030 + +Implement unmap_kernel_page() which clears an existing pte. + +Reported-by: Maxime Bizon +Signed-off-by: Christophe Leroy +Tested-by: Maxime Bizon +Signed-off-by: Michael Ellerman +Link: https://lore.kernel.org/r/b0b752f6f6ecc60653e873f385c6f0dce4e9ab6a.1638789098.git.christophe.leroy@csgroup.eu +Signed-off-by: Sasha Levin +--- + arch/powerpc/include/asm/book3s/32/pgtable.h | 1 + + arch/powerpc/include/asm/book3s/64/pgtable.h | 2 ++ + arch/powerpc/include/asm/fixmap.h | 6 ++++-- + arch/powerpc/include/asm/nohash/32/pgtable.h | 1 + + arch/powerpc/include/asm/nohash/64/pgtable.h | 1 + + arch/powerpc/mm/pgtable.c | 9 +++++++++ + 6 files changed, 18 insertions(+), 2 deletions(-) + +diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h +index 609c80f671943..f8b94f78403f1 100644 +--- a/arch/powerpc/include/asm/book3s/32/pgtable.h ++++ b/arch/powerpc/include/asm/book3s/32/pgtable.h +@@ -178,6 +178,7 @@ static inline bool pte_user(pte_t pte) + #ifndef __ASSEMBLY__ + + int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot); ++void unmap_kernel_page(unsigned long va); + + #endif /* !__ASSEMBLY__ */ + +diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h +index 33e073d6b0c41..875730d5af408 100644 +--- a/arch/powerpc/include/asm/book3s/64/pgtable.h ++++ b/arch/powerpc/include/asm/book3s/64/pgtable.h +@@ -1082,6 +1082,8 @@ static inline int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t p + return hash__map_kernel_page(ea, pa, prot); + } + ++void unmap_kernel_page(unsigned long va); ++ + static inline int __meminit vmemmap_create_mapping(unsigned long start, + unsigned long page_size, + unsigned long phys) +diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h +index 947b5b9c44241..a832aeafe5601 100644 +--- a/arch/powerpc/include/asm/fixmap.h ++++ b/arch/powerpc/include/asm/fixmap.h +@@ -111,8 +111,10 @@ static inline void __set_fixmap(enum fixed_addresses idx, + BUILD_BUG_ON(idx >= __end_of_fixed_addresses); + else if (WARN_ON(idx >= __end_of_fixed_addresses)) + return; +- +- map_kernel_page(__fix_to_virt(idx), phys, flags); ++ if (pgprot_val(flags)) ++ map_kernel_page(__fix_to_virt(idx), phys, flags); ++ else ++ unmap_kernel_page(__fix_to_virt(idx)); + } + + #define __early_set_fixmap __set_fixmap +diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h +index b67742e2a9b22..d959c2a73fbf4 100644 +--- a/arch/powerpc/include/asm/nohash/32/pgtable.h ++++ b/arch/powerpc/include/asm/nohash/32/pgtable.h +@@ -64,6 +64,7 @@ extern int icache_44x_need_flush; + #ifndef __ASSEMBLY__ + + int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot); ++void unmap_kernel_page(unsigned long va); + + #endif /* !__ASSEMBLY__ */ + +diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h +index 9d2905a474103..2225991c69b55 100644 +--- a/arch/powerpc/include/asm/nohash/64/pgtable.h ++++ b/arch/powerpc/include/asm/nohash/64/pgtable.h +@@ -308,6 +308,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma, + #define __swp_entry_to_pte(x) __pte((x).val) + + int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot); ++void unmap_kernel_page(unsigned long va); + extern int __meminit vmemmap_create_mapping(unsigned long start, + unsigned long page_size, + unsigned long phys); +diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c +index ce94823831442..b7385e637e3e3 100644 +--- a/arch/powerpc/mm/pgtable.c ++++ b/arch/powerpc/mm/pgtable.c +@@ -203,6 +203,15 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, + __set_pte_at(mm, addr, ptep, pte, 0); + } + ++void unmap_kernel_page(unsigned long va) ++{ ++ pmd_t *pmdp = pmd_off_k(va); ++ pte_t *ptep = pte_offset_kernel(pmdp, va); ++ ++ pte_clear(&init_mm, va, ptep); ++ flush_tlb_kernel_range(va, va + PAGE_SIZE); ++} ++ + /* + * This is called when relaxing access to a PTE. It's also called in the page + * fault path when we don't hit any of the major fault cases, ie, a minor +-- +2.34.1 + diff --git a/queue-5.16/s390-module-test-loading-modules-with-a-lot-of-reloc.patch b/queue-5.16/s390-module-test-loading-modules-with-a-lot-of-reloc.patch new file mode 100644 index 00000000000..ae72d5266d9 --- /dev/null +++ b/queue-5.16/s390-module-test-loading-modules-with-a-lot-of-reloc.patch @@ -0,0 +1,190 @@ +From b23c7aeaa629d2000aa488f1f3ac2823defded79 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jan 2022 19:26:38 +0100 +Subject: s390/module: test loading modules with a lot of relocations + +From: Ilya Leoshkevich + +[ Upstream commit 90c5318795eefa09a9f9aef8d18a904e24962b5c ] + +Add a test in order to prevent regressions. + +Signed-off-by: Ilya Leoshkevich +Reviewed-by: Heiko Carstens +Cc: Vasily Gorbik +Cc: Christian Borntraeger +Signed-off-by: Heiko Carstens +Signed-off-by: Sasha Levin +--- + arch/s390/Kconfig | 15 +++++++++ + arch/s390/lib/Makefile | 3 ++ + arch/s390/lib/test_modules.c | 35 +++++++++++++++++++ + arch/s390/lib/test_modules.h | 50 ++++++++++++++++++++++++++++ + arch/s390/lib/test_modules_helpers.c | 13 ++++++++ + 5 files changed, 116 insertions(+) + create mode 100644 arch/s390/lib/test_modules.c + create mode 100644 arch/s390/lib/test_modules.h + create mode 100644 arch/s390/lib/test_modules_helpers.c + +diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig +index 2a5bb4f29cfed..0344c68f3ffde 100644 +--- a/arch/s390/Kconfig ++++ b/arch/s390/Kconfig +@@ -947,6 +947,9 @@ config S390_GUEST + + endmenu + ++config S390_MODULES_SANITY_TEST_HELPERS ++ def_bool n ++ + menu "Selftests" + + config S390_UNWIND_SELFTEST +@@ -973,4 +976,16 @@ config S390_KPROBES_SANITY_TEST + + Say N if you are unsure. + ++config S390_MODULES_SANITY_TEST ++ def_tristate n ++ depends on KUNIT ++ default KUNIT_ALL_TESTS ++ prompt "Enable s390 specific modules tests" ++ select S390_MODULES_SANITY_TEST_HELPERS ++ help ++ This option enables an s390 specific modules test. This option is ++ not useful for distributions or general kernels, but only for ++ kernel developers working on architecture code. ++ ++ Say N if you are unsure. + endmenu +diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile +index 707cd4622c132..69feb8ed3312d 100644 +--- a/arch/s390/lib/Makefile ++++ b/arch/s390/lib/Makefile +@@ -17,4 +17,7 @@ KASAN_SANITIZE_uaccess.o := n + obj-$(CONFIG_S390_UNWIND_SELFTEST) += test_unwind.o + CFLAGS_test_unwind.o += -fno-optimize-sibling-calls + ++obj-$(CONFIG_S390_MODULES_SANITY_TEST) += test_modules.o ++obj-$(CONFIG_S390_MODULES_SANITY_TEST_HELPERS) += test_modules_helpers.o ++ + lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o +diff --git a/arch/s390/lib/test_modules.c b/arch/s390/lib/test_modules.c +new file mode 100644 +index 0000000000000..d056baa8fbb0c +--- /dev/null ++++ b/arch/s390/lib/test_modules.c +@@ -0,0 +1,35 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++ ++#include ++#include ++ ++#include "test_modules.h" ++ ++#define DECLARE_RETURN(i) int test_modules_return_ ## i(void) ++REPEAT_10000(DECLARE_RETURN); ++ ++/* ++ * Test that modules with many relocations are loaded properly. ++ */ ++static void test_modules_many_vmlinux_relocs(struct kunit *test) ++{ ++ int result = 0; ++ ++#define CALL_RETURN(i) result += test_modules_return_ ## i() ++ REPEAT_10000(CALL_RETURN); ++ KUNIT_ASSERT_EQ(test, result, 49995000); ++} ++ ++static struct kunit_case modules_testcases[] = { ++ KUNIT_CASE(test_modules_many_vmlinux_relocs), ++ {} ++}; ++ ++static struct kunit_suite modules_test_suite = { ++ .name = "modules_test_s390", ++ .test_cases = modules_testcases, ++}; ++ ++kunit_test_suites(&modules_test_suite); ++ ++MODULE_LICENSE("GPL"); +diff --git a/arch/s390/lib/test_modules.h b/arch/s390/lib/test_modules.h +new file mode 100644 +index 0000000000000..43b5e4b4af3e4 +--- /dev/null ++++ b/arch/s390/lib/test_modules.h +@@ -0,0 +1,50 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++#ifndef TEST_MODULES_H ++#define TEST_MODULES_H ++ ++#define __REPEAT_10000_3(f, x) \ ++ f(x ## 0); \ ++ f(x ## 1); \ ++ f(x ## 2); \ ++ f(x ## 3); \ ++ f(x ## 4); \ ++ f(x ## 5); \ ++ f(x ## 6); \ ++ f(x ## 7); \ ++ f(x ## 8); \ ++ f(x ## 9) ++#define __REPEAT_10000_2(f, x) \ ++ __REPEAT_10000_3(f, x ## 0); \ ++ __REPEAT_10000_3(f, x ## 1); \ ++ __REPEAT_10000_3(f, x ## 2); \ ++ __REPEAT_10000_3(f, x ## 3); \ ++ __REPEAT_10000_3(f, x ## 4); \ ++ __REPEAT_10000_3(f, x ## 5); \ ++ __REPEAT_10000_3(f, x ## 6); \ ++ __REPEAT_10000_3(f, x ## 7); \ ++ __REPEAT_10000_3(f, x ## 8); \ ++ __REPEAT_10000_3(f, x ## 9) ++#define __REPEAT_10000_1(f, x) \ ++ __REPEAT_10000_2(f, x ## 0); \ ++ __REPEAT_10000_2(f, x ## 1); \ ++ __REPEAT_10000_2(f, x ## 2); \ ++ __REPEAT_10000_2(f, x ## 3); \ ++ __REPEAT_10000_2(f, x ## 4); \ ++ __REPEAT_10000_2(f, x ## 5); \ ++ __REPEAT_10000_2(f, x ## 6); \ ++ __REPEAT_10000_2(f, x ## 7); \ ++ __REPEAT_10000_2(f, x ## 8); \ ++ __REPEAT_10000_2(f, x ## 9) ++#define REPEAT_10000(f) \ ++ __REPEAT_10000_1(f, 0); \ ++ __REPEAT_10000_1(f, 1); \ ++ __REPEAT_10000_1(f, 2); \ ++ __REPEAT_10000_1(f, 3); \ ++ __REPEAT_10000_1(f, 4); \ ++ __REPEAT_10000_1(f, 5); \ ++ __REPEAT_10000_1(f, 6); \ ++ __REPEAT_10000_1(f, 7); \ ++ __REPEAT_10000_1(f, 8); \ ++ __REPEAT_10000_1(f, 9) ++ ++#endif +diff --git a/arch/s390/lib/test_modules_helpers.c b/arch/s390/lib/test_modules_helpers.c +new file mode 100644 +index 0000000000000..1670349a03eba +--- /dev/null ++++ b/arch/s390/lib/test_modules_helpers.c +@@ -0,0 +1,13 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++ ++#include ++ ++#include "test_modules.h" ++ ++#define DEFINE_RETURN(i) \ ++ int test_modules_return_ ## i(void) \ ++ { \ ++ return 1 ## i - 10000; \ ++ } \ ++ EXPORT_SYMBOL_GPL(test_modules_return_ ## i) ++REPEAT_10000(DEFINE_RETURN); +-- +2.34.1 + diff --git a/queue-5.16/sched-avoid-double-preemption-in-__cond_resched_-loc.patch b/queue-5.16/sched-avoid-double-preemption-in-__cond_resched_-loc.patch new file mode 100644 index 00000000000..990209b2ffc --- /dev/null +++ b/queue-5.16/sched-avoid-double-preemption-in-__cond_resched_-loc.patch @@ -0,0 +1,64 @@ +From 79ad9c6be2938ee2465df1de80d551e7c6526f38 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 25 Dec 2021 01:04:57 +0100 +Subject: sched: Avoid double preemption in __cond_resched_*lock*() + +From: Peter Zijlstra + +[ Upstream commit 7e406d1ff39b8ee574036418a5043c86723170cf ] + +For PREEMPT/DYNAMIC_PREEMPT the *_unlock() will already trigger a +preemption, no point in then calling preempt_schedule_common() +*again*. + +Use _cond_resched() instead, since this is a NOP for the preemptible +configs while it provide a preemption point for the others. + +Reported-by: xuhaifeng +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/YcGnvDEYBwOiV0cR@hirez.programming.kicks-ass.net +Signed-off-by: Sasha Levin +--- + kernel/sched/core.c | 12 +++--------- + 1 file changed, 3 insertions(+), 9 deletions(-) + +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +index 77563109c0ea0..d24823b3c3f9f 100644 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -8176,9 +8176,7 @@ int __cond_resched_lock(spinlock_t *lock) + + if (spin_needbreak(lock) || resched) { + spin_unlock(lock); +- if (resched) +- preempt_schedule_common(); +- else ++ if (!_cond_resched()) + cpu_relax(); + ret = 1; + spin_lock(lock); +@@ -8196,9 +8194,7 @@ int __cond_resched_rwlock_read(rwlock_t *lock) + + if (rwlock_needbreak(lock) || resched) { + read_unlock(lock); +- if (resched) +- preempt_schedule_common(); +- else ++ if (!_cond_resched()) + cpu_relax(); + ret = 1; + read_lock(lock); +@@ -8216,9 +8212,7 @@ int __cond_resched_rwlock_write(rwlock_t *lock) + + if (rwlock_needbreak(lock) || resched) { + write_unlock(lock); +- if (resched) +- preempt_schedule_common(); +- else ++ if (!_cond_resched()) + cpu_relax(); + ret = 1; + write_lock(lock); +-- +2.34.1 + diff --git a/queue-5.16/scsi-myrs-fix-crash-in-error-case.patch b/queue-5.16/scsi-myrs-fix-crash-in-error-case.patch new file mode 100644 index 00000000000..f668b943fef --- /dev/null +++ b/queue-5.16/scsi-myrs-fix-crash-in-error-case.patch @@ -0,0 +1,48 @@ +From 39234d7235a1ba0579b2fd775ba7b48866d14962 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 23 Jan 2022 14:57:17 -0800 +Subject: scsi: myrs: Fix crash in error case + +From: Tong Zhang + +[ Upstream commit 4db09593af0b0b4d7d4805ebb3273df51d7cc30d ] + +In myrs_detect(), cs->disable_intr is NULL when privdata->hw_init() fails +with non-zero. In this case, myrs_cleanup(cs) will call a NULL ptr and +crash the kernel. + +[ 1.105606] myrs 0000:00:03.0: Unknown Initialization Error 5A +[ 1.105872] myrs 0000:00:03.0: Failed to initialize Controller +[ 1.106082] BUG: kernel NULL pointer dereference, address: 0000000000000000 +[ 1.110774] Call Trace: +[ 1.110950] myrs_cleanup+0xe4/0x150 [myrs] +[ 1.111135] myrs_probe.cold+0x91/0x56a [myrs] +[ 1.111302] ? DAC960_GEM_intr_handler+0x1f0/0x1f0 [myrs] +[ 1.111500] local_pci_probe+0x48/0x90 + +Link: https://lore.kernel.org/r/20220123225717.1069538-1-ztong0001@gmail.com +Reviewed-by: Hannes Reinecke +Signed-off-by: Tong Zhang +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/myrs.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/scsi/myrs.c b/drivers/scsi/myrs.c +index 6ea323e9a2e34..f6dbc8f2f60a3 100644 +--- a/drivers/scsi/myrs.c ++++ b/drivers/scsi/myrs.c +@@ -2269,7 +2269,8 @@ static void myrs_cleanup(struct myrs_hba *cs) + myrs_unmap(cs); + + if (cs->mmio_base) { +- cs->disable_intr(cs); ++ if (cs->disable_intr) ++ cs->disable_intr(cs); + iounmap(cs->mmio_base); + cs->mmio_base = NULL; + } +-- +2.34.1 + diff --git a/queue-5.16/scsi-pm8001-fix-bogus-fw-crash-for-maxcpus-1.patch b/queue-5.16/scsi-pm8001-fix-bogus-fw-crash-for-maxcpus-1.patch new file mode 100644 index 00000000000..26abb67ea62 --- /dev/null +++ b/queue-5.16/scsi-pm8001-fix-bogus-fw-crash-for-maxcpus-1.patch @@ -0,0 +1,84 @@ +From 1790ebde6a62752aadfd51d15f66ae74ef66e44b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jan 2022 20:15:05 +0800 +Subject: scsi: pm8001: Fix bogus FW crash for maxcpus=1 + +From: John Garry + +[ Upstream commit 62afb379a0fee7e9c2f9f68e1abeb85ceddf51b9 ] + +According to the comment in check_fw_ready() we should not check the +IOP1_READY field in register SCRATCH_PAD_1 for 8008 or 8009 controllers. + +However we check this very field in process_oq() for processing the highest +index interrupt vector. The highest interrupt vector is checked as the FW +is programmed to signal fatal errors through this irq. + +Change that function to not check IOP1_READY for those mentioned +controllers, but do check ILA_READY in both cases. + +The reason I assume that this was not hit earlier was because we always +allocated 64 MSI(X), and just did not pass the vector index check in +process_oq(), i.e. the handler never ran for vector index 63. + +Link: https://lore.kernel.org/r/1642508105-95432-1-git-send-email-john.garry@huawei.com +Tested-by: Damien Le Moal +Reviewed-by: Damien Le Moal +Signed-off-by: John Garry +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/pm8001/pm80xx_hwi.c | 16 ++++++++++++++-- + drivers/scsi/pm8001/pm80xx_hwi.h | 6 +++++- + 2 files changed, 19 insertions(+), 3 deletions(-) + +diff --git a/drivers/scsi/pm8001/pm80xx_hwi.c b/drivers/scsi/pm8001/pm80xx_hwi.c +index 2101fc5761c3c..4c5b945bf3187 100644 +--- a/drivers/scsi/pm8001/pm80xx_hwi.c ++++ b/drivers/scsi/pm8001/pm80xx_hwi.c +@@ -4161,10 +4161,22 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) + u32 ret = MPI_IO_STATUS_FAIL; + u32 regval; + ++ /* ++ * Fatal errors are programmed to be signalled in irq vector ++ * pm8001_ha->max_q_num - 1 through pm8001_ha->main_cfg_tbl.pm80xx_tbl. ++ * fatal_err_interrupt ++ */ + if (vec == (pm8001_ha->max_q_num - 1)) { ++ u32 mipsall_ready; ++ ++ if (pm8001_ha->chip_id == chip_8008 || ++ pm8001_ha->chip_id == chip_8009) ++ mipsall_ready = SCRATCH_PAD_MIPSALL_READY_8PORT; ++ else ++ mipsall_ready = SCRATCH_PAD_MIPSALL_READY_16PORT; ++ + regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); +- if ((regval & SCRATCH_PAD_MIPSALL_READY) != +- SCRATCH_PAD_MIPSALL_READY) { ++ if ((regval & mipsall_ready) != mipsall_ready) { + pm8001_ha->controller_fatal_error = true; + pm8001_dbg(pm8001_ha, FAIL, + "Firmware Fatal error! Regval:0x%x\n", +diff --git a/drivers/scsi/pm8001/pm80xx_hwi.h b/drivers/scsi/pm8001/pm80xx_hwi.h +index c7e5d93bea924..c41ed039c92ac 100644 +--- a/drivers/scsi/pm8001/pm80xx_hwi.h ++++ b/drivers/scsi/pm8001/pm80xx_hwi.h +@@ -1405,8 +1405,12 @@ typedef struct SASProtocolTimerConfig SASProtocolTimerConfig_t; + #define SCRATCH_PAD_BOOT_LOAD_SUCCESS 0x0 + #define SCRATCH_PAD_IOP0_READY 0xC00 + #define SCRATCH_PAD_IOP1_READY 0x3000 +-#define SCRATCH_PAD_MIPSALL_READY (SCRATCH_PAD_IOP1_READY | \ ++#define SCRATCH_PAD_MIPSALL_READY_16PORT (SCRATCH_PAD_IOP1_READY | \ + SCRATCH_PAD_IOP0_READY | \ ++ SCRATCH_PAD_ILA_READY | \ ++ SCRATCH_PAD_RAAE_READY) ++#define SCRATCH_PAD_MIPSALL_READY_8PORT (SCRATCH_PAD_IOP0_READY | \ ++ SCRATCH_PAD_ILA_READY | \ + SCRATCH_PAD_RAAE_READY) + + /* boot loader state */ +-- +2.34.1 + diff --git a/queue-5.16/scsi-qedf-add-stag_work-to-all-the-vports.patch b/queue-5.16/scsi-qedf-add-stag_work-to-all-the-vports.patch new file mode 100644 index 00000000000..de99dd72d34 --- /dev/null +++ b/queue-5.16/scsi-qedf-add-stag_work-to-all-the-vports.patch @@ -0,0 +1,73 @@ +From 67e92eb372386d11f5447f34f48f28ed07a40370 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jan 2022 05:53:09 -0800 +Subject: scsi: qedf: Add stag_work to all the vports + +From: Saurav Kashyap + +[ Upstream commit b70a99fd13282d7885f69bf1372e28b7506a1613 ] + +Call trace seen when creating NPIV ports, only 32 out of 64 show online. +stag work was not initialized for vport, hence initialize the stag work. + +WARNING: CPU: 8 PID: 645 at kernel/workqueue.c:1635 __queue_delayed_work+0x68/0x80 +CPU: 8 PID: 645 Comm: kworker/8:1 Kdump: loaded Tainted: G IOE --------- -- + 4.18.0-348.el8.x86_64 #1 +Hardware name: Dell Inc. PowerEdge MX740c/0177V9, BIOS 2.12.2 07/09/2021 +Workqueue: events fc_lport_timeout [libfc] +RIP: 0010:__queue_delayed_work+0x68/0x80 +Code: 89 b2 88 00 00 00 44 89 82 90 00 00 00 48 01 c8 48 89 42 50 41 81 +f8 00 20 00 00 75 1d e9 60 24 07 00 44 89 c7 e9 98 f6 ff ff <0f> 0b eb +c5 0f 0b eb a1 0f 0b eb a7 0f 0b eb ac 44 89 c6 e9 40 23 +RSP: 0018:ffffae514bc3be40 EFLAGS: 00010006 +RAX: ffff8d25d6143750 RBX: 0000000000000202 RCX: 0000000000000002 +RDX: ffff8d2e31383748 RSI: ffff8d25c000d600 RDI: ffff8d2e31383788 +RBP: ffff8d2e31380de0 R08: 0000000000002000 R09: ffff8d2e31383750 +R10: ffffffffc0c957e0 R11: ffff8d2624800000 R12: ffff8d2e31380a58 +R13: ffff8d2d915eb000 R14: ffff8d25c499b5c0 R15: ffff8d2e31380e18 +FS: 0000000000000000(0000) GS:ffff8d2d1fb00000(0000) knlGS:0000000000000000 +CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +CR2: 000055fd0484b8b8 CR3: 00000008ffc10006 CR4: 00000000007706e0 +DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 +DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 +PKRU: 55555554 +Call Trace: + queue_delayed_work_on+0x36/0x40 + qedf_elsct_send+0x57/0x60 [qedf] + fc_lport_enter_flogi+0x90/0xc0 [libfc] + fc_lport_timeout+0xb7/0x140 [libfc] + process_one_work+0x1a7/0x360 + ? create_worker+0x1a0/0x1a0 + worker_thread+0x30/0x390 + ? create_worker+0x1a0/0x1a0 + kthread+0x116/0x130 + ? kthread_flush_work_fn+0x10/0x10 + ret_from_fork+0x35/0x40 + ---[ end trace 008f00f722f2c2ff ]-- + +Initialize stag work for all the vports. + +Link: https://lore.kernel.org/r/20220117135311.6256-2-njavali@marvell.com +Signed-off-by: Saurav Kashyap +Signed-off-by: Nilesh Javali +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedf/qedf_main.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/scsi/qedf/qedf_main.c b/drivers/scsi/qedf/qedf_main.c +index 1bf7a22d49480..6e367b40ecc96 100644 +--- a/drivers/scsi/qedf/qedf_main.c ++++ b/drivers/scsi/qedf/qedf_main.c +@@ -1862,6 +1862,7 @@ static int qedf_vport_create(struct fc_vport *vport, bool disabled) + vport_qedf->cmd_mgr = base_qedf->cmd_mgr; + init_completion(&vport_qedf->flogi_compl); + INIT_LIST_HEAD(&vport_qedf->fcports); ++ INIT_DELAYED_WORK(&vport_qedf->stag_work, qedf_stag_change_work); + + rc = qedf_vport_libfc_config(vport, vn_port); + if (rc) { +-- +2.34.1 + diff --git a/queue-5.16/scsi-qedf-change-context-reset-messages-to-ratelimit.patch b/queue-5.16/scsi-qedf-change-context-reset-messages-to-ratelimit.patch new file mode 100644 index 00000000000..14024f6c234 --- /dev/null +++ b/queue-5.16/scsi-qedf-change-context-reset-messages-to-ratelimit.patch @@ -0,0 +1,50 @@ +From 78d50e8fc2702869e184175311b7ea3825f902a0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jan 2022 05:53:11 -0800 +Subject: scsi: qedf: Change context reset messages to ratelimited + +From: Saurav Kashyap + +[ Upstream commit 64fd4af6274eb0f49d29772c228fffcf6bde1635 ] + +If FCoE is not configured, libfc/libfcoe keeps on retrying FLOGI and after +3 retries driver does a context reset and tries fipvlan again. This leads +to context reset message flooding the logs. Hence ratelimit the message to +prevent flooding the logs. + +Link: https://lore.kernel.org/r/20220117135311.6256-4-njavali@marvell.com +Signed-off-by: Saurav Kashyap +Signed-off-by: Nilesh Javali +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedf/qedf_main.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/scsi/qedf/qedf_main.c b/drivers/scsi/qedf/qedf_main.c +index 6e367b40ecc96..e0e03443d7703 100644 +--- a/drivers/scsi/qedf/qedf_main.c ++++ b/drivers/scsi/qedf/qedf_main.c +@@ -911,7 +911,7 @@ void qedf_ctx_soft_reset(struct fc_lport *lport) + struct qed_link_output if_link; + + if (lport->vport) { +- QEDF_ERR(NULL, "Cannot issue host reset on NPIV port.\n"); ++ printk_ratelimited("Cannot issue host reset on NPIV port.\n"); + return; + } + +@@ -3979,7 +3979,9 @@ void qedf_stag_change_work(struct work_struct *work) + struct qedf_ctx *qedf = + container_of(work, struct qedf_ctx, stag_work.work); + +- QEDF_ERR(&qedf->dbg_ctx, "Performing software context reset.\n"); ++ printk_ratelimited("[%s]:[%s:%d]:%d: Performing software context reset.", ++ dev_name(&qedf->pdev->dev), __func__, __LINE__, ++ qedf->dbg_ctx.host_no); + qedf_ctx_soft_reset(qedf->lport); + } + +-- +2.34.1 + diff --git a/queue-5.16/scsi-qedf-fix-refcount-issue-when-logo-is-received-d.patch b/queue-5.16/scsi-qedf-fix-refcount-issue-when-logo-is-received-d.patch new file mode 100644 index 00000000000..5464b6eb87d --- /dev/null +++ b/queue-5.16/scsi-qedf-fix-refcount-issue-when-logo-is-received-d.patch @@ -0,0 +1,72 @@ +From 36bf4b521afc7da22a56683d093a54f4054fadae Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jan 2022 05:53:10 -0800 +Subject: scsi: qedf: Fix refcount issue when LOGO is received during TMF + +From: Saurav Kashyap + +[ Upstream commit 5239ab63f17cee643bd4bf6addfedebaa7d4f41e ] + +Hung task call trace was seen during LOGO processing. + +[ 974.309060] [0000:00:00.0]:[qedf_eh_device_reset:868]: 1:0:2:0: LUN RESET Issued... +[ 974.309065] [0000:00:00.0]:[qedf_initiate_tmf:2422]: tm_flags 0x10 sc_cmd 00000000c16b930f op = 0x2a target_id = 0x2 lun=0 +[ 974.309178] [0000:00:00.0]:[qedf_initiate_tmf:2431]: portid=016900 tm_flags =LUN RESET +[ 974.309222] [0000:00:00.0]:[qedf_initiate_tmf:2438]: orig io_req = 00000000ec78df8f xid = 0x180 ref_cnt = 1. +[ 974.309625] host1: rport 016900: Received LOGO request while in state Ready +[ 974.309627] host1: rport 016900: Delete port +[ 974.309642] host1: rport 016900: work event 3 +[ 974.309644] host1: rport 016900: lld callback ev 3 +[ 974.313243] [0000:61:00.2]:[qedf_execute_tmf:2383]:1: fcport is uploading, not executing flush. +[ 974.313295] [0000:61:00.2]:[qedf_execute_tmf:2400]:1: task mgmt command success... +[ 984.031088] INFO: task jbd2/dm-15-8:7645 blocked for more than 120 seconds. +[ 984.031136] Not tainted 4.18.0-305.el8.x86_64 #1 + +[ 984.031166] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. +[ 984.031209] jbd2/dm-15-8 D 0 7645 2 0x80004080 +[ 984.031212] Call Trace: +[ 984.031222] __schedule+0x2c4/0x700 +[ 984.031230] ? unfreeze_partials.isra.83+0x16e/0x1a0 +[ 984.031233] ? bit_wait_timeout+0x90/0x90 +[ 984.031235] schedule+0x38/0xa0 +[ 984.031238] io_schedule+0x12/0x40 +[ 984.031240] bit_wait_io+0xd/0x50 +[ 984.031243] __wait_on_bit+0x6c/0x80 +[ 984.031248] ? free_buffer_head+0x21/0x50 +[ 984.031251] out_of_line_wait_on_bit+0x91/0xb0 +[ 984.031257] ? init_wait_var_entry+0x50/0x50 +[ 984.031268] jbd2_journal_commit_transaction+0x112e/0x19f0 [jbd2] +[ 984.031280] kjournald2+0xbd/0x270 [jbd2] +[ 984.031284] ? finish_wait+0x80/0x80 +[ 984.031291] ? commit_timeout+0x10/0x10 [jbd2] +[ 984.031294] kthread+0x116/0x130 +[ 984.031300] ? kthread_flush_work_fn+0x10/0x10 +[ 984.031305] ret_from_fork+0x1f/0x40 + +There was a ref count issue when LOGO is received during TMF. This leads to +one of the I/Os hanging with the driver. Fix the ref count. + +Link: https://lore.kernel.org/r/20220117135311.6256-3-njavali@marvell.com +Signed-off-by: Saurav Kashyap +Signed-off-by: Nilesh Javali +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedf/qedf_io.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/scsi/qedf/qedf_io.c b/drivers/scsi/qedf/qedf_io.c +index 99a56ca1fb163..fab43dabe5b31 100644 +--- a/drivers/scsi/qedf/qedf_io.c ++++ b/drivers/scsi/qedf/qedf_io.c +@@ -2250,6 +2250,7 @@ int qedf_initiate_cleanup(struct qedf_ioreq *io_req, + io_req->tm_flags == FCP_TMF_TGT_RESET) { + clear_bit(QEDF_CMD_OUTSTANDING, &io_req->flags); + io_req->sc_cmd = NULL; ++ kref_put(&io_req->refcount, qedf_release_cmd); + complete(&io_req->tm_done); + } + +-- +2.34.1 + diff --git a/queue-5.16/scsi-target-iscsi-make-sure-the-np-under-each-tpg-is.patch b/queue-5.16/scsi-target-iscsi-make-sure-the-np-under-each-tpg-is.patch new file mode 100644 index 00000000000..6dadac173e7 --- /dev/null +++ b/queue-5.16/scsi-target-iscsi-make-sure-the-np-under-each-tpg-is.patch @@ -0,0 +1,43 @@ +From d3c2cc412f819c5dde40556f1f0857e4ba074465 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 11 Jan 2022 13:47:42 +0800 +Subject: scsi: target: iscsi: Make sure the np under each tpg is unique + +From: ZouMingzhe + +[ Upstream commit a861790afaa8b6369eee8a88c5d5d73f5799c0c6 ] + +iscsit_tpg_check_network_portal() has nested for_each loops and is supposed +to return true when a match is found. However, the tpg loop will still +continue after existing the tpg_np loop. If this tpg_np is not the last the +match value will be changed. + +Break the outer loop after finding a match and make sure the np under each +tpg is unique. + +Link: https://lore.kernel.org/r/20220111054742.19582-1-mingzhe.zou@easystack.cn +Signed-off-by: ZouMingzhe +Reviewed-by: Mike Christie +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/target/iscsi/iscsi_target_tpg.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/target/iscsi/iscsi_target_tpg.c b/drivers/target/iscsi/iscsi_target_tpg.c +index 8075f60fd02c3..2d5cf1714ae05 100644 +--- a/drivers/target/iscsi/iscsi_target_tpg.c ++++ b/drivers/target/iscsi/iscsi_target_tpg.c +@@ -443,6 +443,9 @@ static bool iscsit_tpg_check_network_portal( + break; + } + spin_unlock(&tpg->tpg_np_lock); ++ ++ if (match) ++ break; + } + spin_unlock(&tiqn->tiqn_tpg_lock); + +-- +2.34.1 + diff --git a/queue-5.16/scsi-ufs-treat-link-loss-as-fatal-error.patch b/queue-5.16/scsi-ufs-treat-link-loss-as-fatal-error.patch new file mode 100644 index 00000000000..03d8509aa8e --- /dev/null +++ b/queue-5.16/scsi-ufs-treat-link-loss-as-fatal-error.patch @@ -0,0 +1,41 @@ +From 15f3af6ce22157c8b9b5d29327d9ab9bf20aa68d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jan 2022 14:37:55 +0900 +Subject: scsi: ufs: Treat link loss as fatal error + +From: Kiwoong Kim + +[ Upstream commit c99b9b2301492b665b6e51ba6c06ec362eddcd10 ] + +This event is raised when link is lost as specified in UFSHCI spec and that +means communication is not possible. Thus initializing UFS interface needs +to be done. + +Make UFS driver considers Link Lost as fatal in the INT_FATAL_ERRORS +mask. This will trigger a host reset whenever a link lost interrupt occurs. + +Link: https://lore.kernel.org/r/1642743475-54275-1-git-send-email-kwmad.kim@samsung.com +Signed-off-by: Kiwoong Kim +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshci.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h +index 6a295c88d850f..a7ff0e5b54946 100644 +--- a/drivers/scsi/ufs/ufshci.h ++++ b/drivers/scsi/ufs/ufshci.h +@@ -142,7 +142,8 @@ static inline u32 ufshci_version(u32 major, u32 minor) + #define INT_FATAL_ERRORS (DEVICE_FATAL_ERROR |\ + CONTROLLER_FATAL_ERROR |\ + SYSTEM_BUS_FATAL_ERROR |\ +- CRYPTO_ENGINE_FATAL_ERROR) ++ CRYPTO_ENGINE_FATAL_ERROR |\ ++ UIC_LINK_LOST) + + /* HCS - Host Controller Status 30h */ + #define DEVICE_PRESENT 0x1 +-- +2.34.1 + diff --git a/queue-5.16/scsi-ufs-ufshcd-pltfrm-check-the-return-value-of-dev.patch b/queue-5.16/scsi-ufs-ufshcd-pltfrm-check-the-return-value-of-dev.patch new file mode 100644 index 00000000000..6c89919c648 --- /dev/null +++ b/queue-5.16/scsi-ufs-ufshcd-pltfrm-check-the-return-value-of-dev.patch @@ -0,0 +1,49 @@ +From 88105b8ca99380f042364eceec43c0fc67a723df Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 16 Jan 2022 11:06:49 +0800 +Subject: scsi: ufs: ufshcd-pltfrm: Check the return value of devm_kstrdup() + +From: Xiaoke Wang + +[ Upstream commit a65b32748f4566f986ba2495a8236c141fa42a26 ] + +devm_kstrdup() returns pointer to allocated string on success, NULL on +failure. So it is better to check the return value of it. + +Link: https://lore.kernel.org/r/tencent_4257E15D4A94FF9020DDCC4BB9B21C041408@qq.com +Reviewed-by: Bean Huo +Signed-off-by: Xiaoke Wang +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshcd-pltfrm.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c +index 8b16bbbcb806c..87975d1a21c8b 100644 +--- a/drivers/scsi/ufs/ufshcd-pltfrm.c ++++ b/drivers/scsi/ufs/ufshcd-pltfrm.c +@@ -92,6 +92,11 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) + clki->min_freq = clkfreq[i]; + clki->max_freq = clkfreq[i+1]; + clki->name = devm_kstrdup(dev, name, GFP_KERNEL); ++ if (!clki->name) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ + if (!strcmp(name, "ref_clk")) + clki->keep_link_active = true; + dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", +@@ -127,6 +132,8 @@ static int ufshcd_populate_vreg(struct device *dev, const char *name, + return -ENOMEM; + + vreg->name = devm_kstrdup(dev, name, GFP_KERNEL); ++ if (!vreg->name) ++ return -ENOMEM; + + snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name); + if (of_property_read_u32(np, prop_name, &vreg->max_uA)) { +-- +2.34.1 + diff --git a/queue-5.16/scsi-ufs-use-generic-error-code-in-ufshcd_set_dev_pw.patch b/queue-5.16/scsi-ufs-use-generic-error-code-in-ufshcd_set_dev_pw.patch new file mode 100644 index 00000000000..0947a9e9aa7 --- /dev/null +++ b/queue-5.16/scsi-ufs-use-generic-error-code-in-ufshcd_set_dev_pw.patch @@ -0,0 +1,55 @@ +From a8a0a07ce24ba85057193a00f0548eecb3327121 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jan 2022 14:33:02 +0900 +Subject: scsi: ufs: Use generic error code in ufshcd_set_dev_pwr_mode() + +From: Kiwoong Kim + +[ Upstream commit ad6c8a426446873febc98140d81d5353f8c0825b ] + +The return value of ufshcd_set_dev_pwr_mode() is passed to device PM +core. However, the function currently returns a SCSI result which the PM +core doesn't understand. This might lead to unexpected behaviors in +userland; a platform reset was observed in Android. + +Use a generic error code for SSU failures. + +Link: https://lore.kernel.org/r/1642743182-54098-1-git-send-email-kwmad.kim@samsung.com +Reviewed-by: Bart Van Assche +Signed-off-by: Kiwoong Kim +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshcd.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c +index c94377aa82739..ec7d7e01231d7 100644 +--- a/drivers/scsi/ufs/ufshcd.c ++++ b/drivers/scsi/ufs/ufshcd.c +@@ -8587,7 +8587,7 @@ static void ufshcd_hba_exit(struct ufs_hba *hba) + * @pwr_mode: device power mode to set + * + * Returns 0 if requested power mode is set successfully +- * Returns non-zero if failed to set the requested power mode ++ * Returns < 0 if failed to set the requested power mode + */ + static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba, + enum ufs_dev_pwr_mode pwr_mode) +@@ -8641,8 +8641,11 @@ static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba, + sdev_printk(KERN_WARNING, sdp, + "START_STOP failed for power mode: %d, result %x\n", + pwr_mode, ret); +- if (ret > 0 && scsi_sense_valid(&sshdr)) +- scsi_print_sense_hdr(sdp, NULL, &sshdr); ++ if (ret > 0) { ++ if (scsi_sense_valid(&sshdr)) ++ scsi_print_sense_hdr(sdp, NULL, &sshdr); ++ ret = -EIO; ++ } + } + + if (!ret) +-- +2.34.1 + diff --git a/queue-5.16/series b/queue-5.16/series index 1d8701b98c6..d2cf01071e3 100644 --- a/queue-5.16/series +++ b/queue-5.16/series @@ -17,3 +17,56 @@ nfsd-fix-ia_size-underflow.patch nfsd-clamp-write-offsets.patch nfsd-fix-offset-type-in-i-o-trace-points.patch nfsd-fix-the-behavior-of-read-near-offset_max.patch +nfs-change-nfs_access_get_cached-to-only-report-the-.patch +nfsv4-only-print-the-label-when-its-queried.patch +nfs-nfs4clinet-check-the-return-value-of-kstrdup.patch +nfsv4.1-fix-uninitialised-variable-in-devicenotify.patch +nfsv4-remove-zero-number-of-fs_locations-entries-err.patch +nfsv4-store-server-support-for-fs_location-attribute.patch +nfsv4.1-query-for-fs_location-attr-on-a-new-file-sys.patch +nfsv4-expose-nfs_parse_server_name-function.patch +nfsv4-handle-port-presence-in-fs_location-server-str.patch +sunrpc-allow-for-unspecified-transport-time-in-rpc_c.patch +net-sunrpc-fix-reference-count-leaks-in-rpc_sysfs_xp.patch +sunrpc-fix-potential-race-conditions-in-rpc_sysfs_xp.patch +irqchip-realtek-rtl-service-all-pending-interrupts.patch +perf-x86-rapl-fix-amd-event-handling.patch +x86-perf-avoid-warning-for-arch-lbr-without-xsave.patch +sched-avoid-double-preemption-in-__cond_resched_-loc.patch +drm-vc4-fix-deadlock-on-dsi-device-attach-error.patch +drm-panel-orientation-quirks-add-quirk-for-the-1netb.patch +net-sched-clarify-error-message-when-qdisc-kind-is-u.patch +powerpc-fixmap-fix-vm-debug-warning-on-unmap.patch +s390-module-test-loading-modules-with-a-lot-of-reloc.patch +arm64-add-cortex-x2-cpu-part-definition.patch +arm64-errata-update-arm64_erratum_-2119858-2224489-w.patch +scsi-target-iscsi-make-sure-the-np-under-each-tpg-is.patch +scsi-ufs-ufshcd-pltfrm-check-the-return-value-of-dev.patch +scsi-qedf-add-stag_work-to-all-the-vports.patch +scsi-qedf-fix-refcount-issue-when-logo-is-received-d.patch +scsi-qedf-change-context-reset-messages-to-ratelimit.patch +scsi-pm8001-fix-bogus-fw-crash-for-maxcpus-1.patch +scsi-ufs-use-generic-error-code-in-ufshcd_set_dev_pw.patch +scsi-ufs-treat-link-loss-as-fatal-error.patch +scsi-myrs-fix-crash-in-error-case.patch +net-stmmac-reduce-unnecessary-wakeups-from-eee-sw-ti.patch +pm-hibernate-remove-register_nosave_region_late.patch +drm-amd-display-correct-mpc-split-policy-for-dcn301.patch +drm-amdgpu-display-adjust-msleep-limit-in-dp_wait_fo.patch +drm-amdgpu-display-use-msleep-rather-than-udelay-for.patch +usb-dwc2-gadget-don-t-try-to-disable-ep0-in-dwc2_hso.patch +perf-always-wake-the-parent-event.patch +nvme-pci-add-the-ignore_dev_subnqn-quirk-for-intel-p.patch +mips-fix-build-error-due-to-ptr-used-in-more-places.patch +net-stmmac-dwmac-sun8i-use-return-val-of-readl_poll_.patch +arm64-errata-add-detection-for-trbe-ignored-system-r.patch +arm64-errata-add-detection-for-trbe-invalid-prohibit.patch +arm64-errata-add-detection-for-trbe-trace-data-corru.patch +arm64-cpufeature-list-early-cortex-a510-parts-as-hav.patch +kasan-test-fix-compatibility-with-fortify_source.patch +kvm-eventfd-fix-false-positive-rcu-usage-warning.patch +kvm-nvmx-evmcs-filter-out-vm_exit_save_vmx_preemptio.patch +kvm-nvmx-also-filter-msr_ia32_vmx_true_pinbased_ctls.patch +kvm-svm-don-t-kill-sev-guest-if-smap-erratum-trigger.patch +kvm-vmx-set-vmcs.pending_dbg.bs-on-db-in-sti-movss-b.patch +kvm-x86-report-deprecated-x87-features-in-supported-.patch diff --git a/queue-5.16/sunrpc-allow-for-unspecified-transport-time-in-rpc_c.patch b/queue-5.16/sunrpc-allow-for-unspecified-transport-time-in-rpc_c.patch new file mode 100644 index 00000000000..2186737e8f3 --- /dev/null +++ b/queue-5.16/sunrpc-allow-for-unspecified-transport-time-in-rpc_c.patch @@ -0,0 +1,47 @@ +From 11cd926928c89257de093cf52384306b800d009f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 Dec 2021 14:53:34 -0500 +Subject: SUNRPC allow for unspecified transport time in rpc_clnt_add_xprt + +From: Olga Kornievskaia + +[ Upstream commit b8a09619a56334414cbd7f935a0796240d0cc07e ] + +If the supplied argument doesn't specify the transport type, use the +type of the existing rpc clnt and its existing transport. + +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + net/sunrpc/clnt.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/net/sunrpc/clnt.c b/net/sunrpc/clnt.c +index a312ea2bc4405..c83fe618767c4 100644 +--- a/net/sunrpc/clnt.c ++++ b/net/sunrpc/clnt.c +@@ -2900,7 +2900,7 @@ int rpc_clnt_add_xprt(struct rpc_clnt *clnt, + unsigned long connect_timeout; + unsigned long reconnect_timeout; + unsigned char resvport, reuseport; +- int ret = 0; ++ int ret = 0, ident; + + rcu_read_lock(); + xps = xprt_switch_get(rcu_dereference(clnt->cl_xpi.xpi_xpswitch)); +@@ -2914,8 +2914,11 @@ int rpc_clnt_add_xprt(struct rpc_clnt *clnt, + reuseport = xprt->reuseport; + connect_timeout = xprt->connect_timeout; + reconnect_timeout = xprt->max_reconnect_timeout; ++ ident = xprt->xprt_class->ident; + rcu_read_unlock(); + ++ if (!xprtargs->ident) ++ xprtargs->ident = ident; + xprt = xprt_create_transport(xprtargs); + if (IS_ERR(xprt)) { + ret = PTR_ERR(xprt); +-- +2.34.1 + diff --git a/queue-5.16/sunrpc-fix-potential-race-conditions-in-rpc_sysfs_xp.patch b/queue-5.16/sunrpc-fix-potential-race-conditions-in-rpc_sysfs_xp.patch new file mode 100644 index 00000000000..e7efa5fe879 --- /dev/null +++ b/queue-5.16/sunrpc-fix-potential-race-conditions-in-rpc_sysfs_xp.patch @@ -0,0 +1,71 @@ +From c30735a0762814502da35b147eb4e13136ec33e5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Nov 2021 11:54:25 -0500 +Subject: sunrpc: Fix potential race conditions in + rpc_sysfs_xprt_state_change() + +From: Anna Schumaker + +[ Upstream commit 1a48db3fef499f615b56093947ec4b0d3d8e3021 ] + +We need to use test_and_set_bit() when changing xprt state flags to +avoid potentially getting xps->xps_nactive out of sync. + +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + net/sunrpc/sysfs.c | 35 +++++++++++++++++++---------------- + 1 file changed, 19 insertions(+), 16 deletions(-) + +diff --git a/net/sunrpc/sysfs.c b/net/sunrpc/sysfs.c +index 77e7d011c1ab1..8f309bcdf84fe 100644 +--- a/net/sunrpc/sysfs.c ++++ b/net/sunrpc/sysfs.c +@@ -309,25 +309,28 @@ static ssize_t rpc_sysfs_xprt_state_change(struct kobject *kobj, + goto release_tasks; + } + if (offline) { +- set_bit(XPRT_OFFLINE, &xprt->state); +- spin_lock(&xps->xps_lock); +- xps->xps_nactive--; +- spin_unlock(&xps->xps_lock); ++ if (!test_and_set_bit(XPRT_OFFLINE, &xprt->state)) { ++ spin_lock(&xps->xps_lock); ++ xps->xps_nactive--; ++ spin_unlock(&xps->xps_lock); ++ } + } else if (online) { +- clear_bit(XPRT_OFFLINE, &xprt->state); +- spin_lock(&xps->xps_lock); +- xps->xps_nactive++; +- spin_unlock(&xps->xps_lock); ++ if (test_and_clear_bit(XPRT_OFFLINE, &xprt->state)) { ++ spin_lock(&xps->xps_lock); ++ xps->xps_nactive++; ++ spin_unlock(&xps->xps_lock); ++ } + } else if (remove) { + if (test_bit(XPRT_OFFLINE, &xprt->state)) { +- set_bit(XPRT_REMOVE, &xprt->state); +- xprt_force_disconnect(xprt); +- if (test_bit(XPRT_CONNECTED, &xprt->state)) { +- if (!xprt->sending.qlen && +- !xprt->pending.qlen && +- !xprt->backlog.qlen && +- !atomic_long_read(&xprt->queuelen)) +- rpc_xprt_switch_remove_xprt(xps, xprt); ++ if (!test_and_set_bit(XPRT_REMOVE, &xprt->state)) { ++ xprt_force_disconnect(xprt); ++ if (test_bit(XPRT_CONNECTED, &xprt->state)) { ++ if (!xprt->sending.qlen && ++ !xprt->pending.qlen && ++ !xprt->backlog.qlen && ++ !atomic_long_read(&xprt->queuelen)) ++ rpc_xprt_switch_remove_xprt(xps, xprt); ++ } + } + } else { + count = -EINVAL; +-- +2.34.1 + diff --git a/queue-5.16/usb-dwc2-gadget-don-t-try-to-disable-ep0-in-dwc2_hso.patch b/queue-5.16/usb-dwc2-gadget-don-t-try-to-disable-ep0-in-dwc2_hso.patch new file mode 100644 index 00000000000..85ae32efc6b --- /dev/null +++ b/queue-5.16/usb-dwc2-gadget-don-t-try-to-disable-ep0-in-dwc2_hso.patch @@ -0,0 +1,50 @@ +From 1e45386389b8986ccc5f204e2ee95b65445771f1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 7 Dec 2021 14:01:01 +0100 +Subject: usb: dwc2: gadget: don't try to disable ep0 in dwc2_hsotg_suspend + +From: Amelie Delaunay + +[ Upstream commit ac55d163855924aa5af9f1560977da8f346963c8 ] + +Calling dwc2_hsotg_ep_disable on ep0 (in/out) will lead to the following +logs before returning -EINVAL: +dwc2 49000000.usb-otg: dwc2_hsotg_ep_disable: called for ep0 +dwc2 49000000.usb-otg: dwc2_hsotg_ep_disable: called for ep0 + +To avoid these two logs while suspending, start disabling the endpoint +from the index 1, as done in dwc2_hsotg_udc_stop: + + /* all endpoints should be shutdown */ + for (ep = 1; ep < hsotg->num_of_eps; ep++) { + if (hsotg->eps_in[ep]) + dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep); + if (hsotg->eps_out[ep]) + dwc2_hsotg_ep_disable_lock(&hsotg->eps_out[ep]->ep); + } + +Acked-by: Minas Harutyunyan +Signed-off-by: Amelie Delaunay +Link: https://lore.kernel.org/r/20211207130101.270314-1-amelie.delaunay@foss.st.com +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/usb/dwc2/gadget.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c +index 43cf49c4e5e59..da82e4140d545 100644 +--- a/drivers/usb/dwc2/gadget.c ++++ b/drivers/usb/dwc2/gadget.c +@@ -5097,7 +5097,7 @@ int dwc2_hsotg_suspend(struct dwc2_hsotg *hsotg) + hsotg->gadget.speed = USB_SPEED_UNKNOWN; + spin_unlock_irqrestore(&hsotg->lock, flags); + +- for (ep = 0; ep < hsotg->num_of_eps; ep++) { ++ for (ep = 1; ep < hsotg->num_of_eps; ep++) { + if (hsotg->eps_in[ep]) + dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep); + if (hsotg->eps_out[ep]) +-- +2.34.1 + diff --git a/queue-5.16/x86-perf-avoid-warning-for-arch-lbr-without-xsave.patch b/queue-5.16/x86-perf-avoid-warning-for-arch-lbr-without-xsave.patch new file mode 100644 index 00000000000..7450a57b411 --- /dev/null +++ b/queue-5.16/x86-perf-avoid-warning-for-arch-lbr-without-xsave.patch @@ -0,0 +1,38 @@ +From 7eecdd3291c389a346d234ccdc62ade6a511935b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 Dec 2021 12:40:29 -0800 +Subject: x86/perf: Avoid warning for Arch LBR without XSAVE + +From: Andi Kleen + +[ Upstream commit 8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc ] + +Some hypervisors support Arch LBR, but without the LBR XSAVE support. +The current Arch LBR init code prints a warning when the xsave size (0) is +unexpected. Avoid printing the warning for the "no LBR XSAVE" case. + +Signed-off-by: Andi Kleen +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/events/intel/lbr.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c +index 8043213b75a52..fa947c4fbd1f8 100644 +--- a/arch/x86/events/intel/lbr.c ++++ b/arch/x86/events/intel/lbr.c +@@ -1726,6 +1726,9 @@ static bool is_arch_lbr_xsave_available(void) + * Check the LBR state with the corresponding software structure. + * Disable LBR XSAVES support if the size doesn't match. + */ ++ if (xfeature_size(XFEATURE_LBR) == 0) ++ return false; ++ + if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size())) + return false; + +-- +2.34.1 +