From: H.J. Lu <hongjiu.lu@intel.com>
Date: Wed, 8 Oct 2008 05:08:04 +0000 (+0000)
Subject: i386.md: Remove trailing white spaces.
X-Git-Tag: releases/gcc-4.4.0~2128
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=1ffcdc0226e4cd06e28251b8836569356bb9b445;p=thirdparty%2Fgcc.git

i386.md: Remove trailing white spaces.

2008-10-07  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.md: Remove trailing white spaces.

From-SVN: r140962
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9e891381eafb..abe7fdc4959b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2008-10-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/i386.md: Remove trailing white spaces.
+
 2008-10-07  Kenneth Zadeck <zadeck@naturalbridge.com>
 
 	PR rtl-optimization/37448
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 7c0440c9d045..88040fc22018 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2559,14 +2559,14 @@
 	 to stack may result in unaligned memory access.  */
       if (misaligned_operand (operands[0], TImode)
 	  || misaligned_operand (operands[1], TImode))
-	{ 
+	{
 	  if (get_attr_mode (insn) == MODE_V4SF)
 	    return "%vmovups\t{%1, %0|%0, %1}";
 	 else
 	   return "%vmovdqu\t{%1, %0|%0, %1}";
 	}
       else
-	{ 
+	{
 	  if (get_attr_mode (insn) == MODE_V4SF)
 	    return "%vmovaps\t{%1, %0|%0, %1}";
 	 else
@@ -2610,14 +2610,14 @@
 	 to stack may result in unaligned memory access.  */
       if (misaligned_operand (operands[0], TImode)
 	  || misaligned_operand (operands[1], TImode))
-	{ 
+	{
 	  if (get_attr_mode (insn) == MODE_V4SF)
 	    return "%vmovups\t{%1, %0|%0, %1}";
 	 else
 	   return "%vmovdqu\t{%1, %0|%0, %1}";
 	}
       else
-	{ 
+	{
 	  if (get_attr_mode (insn) == MODE_V4SF)
 	    return "%vmovaps\t{%1, %0|%0, %1}";
 	 else
@@ -5150,8 +5150,8 @@
 
   /* Avoid store forwarding (partial memory) stall penalty
      by passing DImode value through XMM registers.  */
-  if (<SSEMODEI24:MODE>mode == DImode && !TARGET_64BIT 
-      && TARGET_80387 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES 
+  if (<SSEMODEI24:MODE>mode == DImode && !TARGET_64BIT
+      && TARGET_80387 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES
       && optimize_function_for_speed_p (cfun))
     {
       emit_insn (gen_floatdi<X87MODEF:mode>2_i387_with_xmm (operands[0],