From: Julian Seward <jseward@acm.org>
Date: Thu, 29 Jul 2010 07:19:30 +0000 (+0000)
Subject: Handle mov[ua[pd G(xmm) -> E(xmm) case, which is something binutils
X-Git-Tag: svn/VALGRIND_3_6_1^2~79
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=20ba256ee25ff9e87f4c1a092ff813c03e3cc0a5;p=thirdparty%2Fvalgrind.git

Handle mov[ua[pd G(xmm) -> E(xmm) case, which is something binutils
doesn't produce, presumably because it uses the E->G encoding for xmm
reg-reg moves.  Fixes #238713.  (Pierre Willenbrock,
pierre@pirsoft.de).



git-svn-id: svn://svn.valgrind.org/vex/trunk@1993
---

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index 21d5b6f2d6..4ce3b1e32a 100644
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -11036,19 +11036,24 @@ DisResult disInstr_AMD64_WRK (
 
    /* 66 0F 29 = MOVAPD -- move from G (xmm) to E (mem or xmm). */
    /* 66 0F 11 = MOVUPD -- move from G (xmm) to E (mem or xmm). */
-   if (have66noF2noF3(pfx) && insn[0] == 0x0F 
+   if (have66noF2noF3(pfx) && insn[0] == 0x0F
        && (insn[1] == 0x29 || insn[1] == 0x11)) {
+      HChar* wot = insn[1]==0x29 ? "apd" : "upd";
       modrm = getUChar(delta+2);
       if (epartIsReg(modrm)) {
-         /* fall through; awaiting test case */
+         putXMMReg( eregOfRexRM(pfx,modrm),
+		    getXMMReg( gregOfRexRM(pfx,modrm) ) );
+         DIP("mov%s %s,%s\n", wot, nameXMMReg(gregOfRexRM(pfx,modrm)),
+	                           nameXMMReg(eregOfRexRM(pfx,modrm)));
+         delta += 2+1;
       } else {
          addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
          storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
-         DIP("mov[ua]pd %s,%s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
-                                  dis_buf );
+         DIP("mov%s %s,%s\n", wot, nameXMMReg(gregOfRexRM(pfx,modrm)),
+                              dis_buf );
          delta += 2+alen;
-         goto decode_success;
       }
+      goto decode_success;
    }
 
    /* 66 0F 6E = MOVD from ireg32/m32 to xmm lo 1/4, zeroing high 3/4 of xmm. */