From: Michal Simek Date: Tue, 2 Sep 2025 07:56:21 +0000 (+0200) Subject: arm64: zynqmp: Enable DP in kr260/kv260 revA X-Git-Tag: v6.18-rc1~147^2~29^2~1 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=21ad89cfade7724960a02ce675f6cd33f89515ed;p=thirdparty%2Fkernel%2Flinux.git arm64: zynqmp: Enable DP in kr260/kv260 revA Enable DP output in both CC (Carrier Cards). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/3160658ea2c4dd09a1d68918271177cf55437a8f.1756799774.git.michal.simek@amd.com --- diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso index fbacfa984d764..b92dcb86e87e9 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso @@ -71,6 +71,17 @@ #clock-cells = <0>; clock-frequency = <25000000>; }; + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ @@ -145,6 +156,12 @@ assigned-clock-rates = <27000000>, <25000000>, <300000000>; }; +&out_dp { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; +}; + &zynqmp_dpdma { status = "okay"; assigned-clock-rates = <600000000>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso index 3c36eb52e9684..d7351a17d3e88 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso @@ -72,6 +72,17 @@ #clock-cells = <0>; clock-frequency = <27000000>; }; + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -122,6 +133,12 @@ assigned-clock-rates = <27000000>, <25000000>, <300000000>; }; +&out_dp { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; +}; + &zynqmp_dpdma { status = "okay"; assigned-clock-rates = <600000000>;