From: Richard Earnshaw Date: Thu, 16 Apr 2026 13:50:07 +0000 (+0100) Subject: arm: support +CDECP options on cortex-m85 X-Git-Tag: basepoints/gcc-17~98 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=257daea0bf0ff41ca3278bc27db65a6aa475cc62;p=thirdparty%2Fgcc.git arm: support +CDECP options on cortex-m85 The Cortex-m85 CPU supports the CDE extension, which requires use of the +cdecp CPU name modifiers. This patch enables these options. This is all pretty-much boiler-plate since Srinath added support on Cortex-m55. gcc/ChangeLog: * config/arm/arm-cpus.in (cortex-m85): Allow +cdecp. * doc/invoke.texi: Document this gcc/testsuite/ChangeLog: * gcc.target/arm/multilib.exp: Test CDE options on cortex-m85. --- diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index f66870a303d..db674b85af1 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1694,6 +1694,14 @@ begin cpu cortex-m85 option nomve remove mve mve_float option nofp remove ALL_FP mve_float option nodsp remove MVE mve_float + option cdecp0 add cdecp0 + option cdecp1 add cdecp1 + option cdecp2 add cdecp2 + option cdecp3 add cdecp3 + option cdecp4 add cdecp4 + option cdecp5 add cdecp5 + option cdecp6 add cdecp6 + option cdecp7 add cdecp7 isa quirk_no_asmcpu quirk_vlldm costs v7m part 0xd23 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a3ac487eeaa..dc83623d48b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -23683,7 +23683,7 @@ instructions on @samp{cortex-m52}, @samp{cortex-m55} and @samp{cortex-m85}. @item +cdecp0, +cdecp1, ... , +cdecp7 Enable the Custom Datapath Extension (CDE) on selected coprocessors according to the numbers given in the options in the range 0 to 7 on @samp{cortex-m52}, -@samp{cortex-m55} and @samp{star-mc1}. +@samp{cortex-m55}, @samp{cortex-m85} and @samp{star-mc1}. @item +nofp Disables the floating-point instructions on @samp{arm9e}, diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp index b824173e798..29376c49df8 100644 --- a/gcc/testsuite/gcc.target/arm/multilib.exp +++ b/gcc/testsuite/gcc.target/arm/multilib.exp @@ -526,6 +526,7 @@ if {[multilib_config "rmprofile"] } { {-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" {-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m85+nopacbti -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" {-mcpu=cortex-m85+nopacbti+nofp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" {-mcpu=cortex-m85+nopacbti+nomve -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" @@ -535,6 +536,16 @@ if {[multilib_config "rmprofile"] } { {-mcpu=cortex-m85+nomve.fp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" {-mcpu=cortex-m85+nomve -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" {-mcpu=cortex-m85+nodsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+nopacbti+cdecp0 -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+nopacbti+cdecp1+nofp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+nopacbti+cdecp7+nomve -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+nopacbti+cdecp0+cdecp1+nodsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+nopacbti+cdecp0+cdecp1+cdecp2+cdecp3+cdecp4+cdecp5+cdecp6+cdecp7+nomve.fp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+cdecp6 -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+cdecp4+nomve.fp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+cdecp5+nomve -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m85+cdecp2+nodsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard" {-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+dp/hard" {-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"