From: Sasha Levin Date: Sun, 24 Jan 2021 15:36:32 +0000 (-0500) Subject: Fixes for 5.4 X-Git-Tag: v4.19.171~37 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=282540ca1e9f2c546a95c5497a0348616decc89a;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.4 Signed-off-by: Sasha Levin --- diff --git a/queue-5.4/arm64-make-atomic-helpers-__always_inline.patch b/queue-5.4/arm64-make-atomic-helpers-__always_inline.patch new file mode 100644 index 00000000000..97eec73735e --- /dev/null +++ b/queue-5.4/arm64-make-atomic-helpers-__always_inline.patch @@ -0,0 +1,111 @@ +From d08de0ec104e425cf6bc59e867a3c332e83243dc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 8 Jan 2021 10:19:56 +0100 +Subject: arm64: make atomic helpers __always_inline + +From: Arnd Bergmann + +[ Upstream commit c35a824c31834d947fb99b0c608c1b9f922b4ba0 ] + +With UBSAN enabled and building with clang, there are occasionally +warnings like + +WARNING: modpost: vmlinux.o(.text+0xc533ec): Section mismatch in reference from the function arch_atomic64_or() to the variable .init.data:numa_nodes_parsed +The function arch_atomic64_or() references +the variable __initdata numa_nodes_parsed. +This is often because arch_atomic64_or lacks a __initdata +annotation or the annotation of numa_nodes_parsed is wrong. + +for functions that end up not being inlined as intended but operating +on __initdata variables. Mark these as __always_inline, along with +the corresponding asm-generic wrappers. + +Signed-off-by: Arnd Bergmann +Acked-by: Will Deacon +Link: https://lore.kernel.org/r/20210108092024.4034860-1-arnd@kernel.org +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/atomic.h | 10 +++++----- + include/asm-generic/bitops/atomic.h | 6 +++--- + 2 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/include/asm/atomic.h b/arch/arm64/include/asm/atomic.h +index 9543b5e0534d2..6e0f48ddfc656 100644 +--- a/arch/arm64/include/asm/atomic.h ++++ b/arch/arm64/include/asm/atomic.h +@@ -17,7 +17,7 @@ + #include + + #define ATOMIC_OP(op) \ +-static inline void arch_##op(int i, atomic_t *v) \ ++static __always_inline void arch_##op(int i, atomic_t *v) \ + { \ + __lse_ll_sc_body(op, i, v); \ + } +@@ -32,7 +32,7 @@ ATOMIC_OP(atomic_sub) + #undef ATOMIC_OP + + #define ATOMIC_FETCH_OP(name, op) \ +-static inline int arch_##op##name(int i, atomic_t *v) \ ++static __always_inline int arch_##op##name(int i, atomic_t *v) \ + { \ + return __lse_ll_sc_body(op##name, i, v); \ + } +@@ -56,7 +56,7 @@ ATOMIC_FETCH_OPS(atomic_sub_return) + #undef ATOMIC_FETCH_OPS + + #define ATOMIC64_OP(op) \ +-static inline void arch_##op(long i, atomic64_t *v) \ ++static __always_inline void arch_##op(long i, atomic64_t *v) \ + { \ + __lse_ll_sc_body(op, i, v); \ + } +@@ -71,7 +71,7 @@ ATOMIC64_OP(atomic64_sub) + #undef ATOMIC64_OP + + #define ATOMIC64_FETCH_OP(name, op) \ +-static inline long arch_##op##name(long i, atomic64_t *v) \ ++static __always_inline long arch_##op##name(long i, atomic64_t *v) \ + { \ + return __lse_ll_sc_body(op##name, i, v); \ + } +@@ -94,7 +94,7 @@ ATOMIC64_FETCH_OPS(atomic64_sub_return) + #undef ATOMIC64_FETCH_OP + #undef ATOMIC64_FETCH_OPS + +-static inline long arch_atomic64_dec_if_positive(atomic64_t *v) ++static __always_inline long arch_atomic64_dec_if_positive(atomic64_t *v) + { + return __lse_ll_sc_body(atomic64_dec_if_positive, v); + } +diff --git a/include/asm-generic/bitops/atomic.h b/include/asm-generic/bitops/atomic.h +index dd90c9792909d..0e7316a86240b 100644 +--- a/include/asm-generic/bitops/atomic.h ++++ b/include/asm-generic/bitops/atomic.h +@@ -11,19 +11,19 @@ + * See Documentation/atomic_bitops.txt for details. + */ + +-static inline void set_bit(unsigned int nr, volatile unsigned long *p) ++static __always_inline void set_bit(unsigned int nr, volatile unsigned long *p) + { + p += BIT_WORD(nr); + atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p); + } + +-static inline void clear_bit(unsigned int nr, volatile unsigned long *p) ++static __always_inline void clear_bit(unsigned int nr, volatile unsigned long *p) + { + p += BIT_WORD(nr); + atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p); + } + +-static inline void change_bit(unsigned int nr, volatile unsigned long *p) ++static __always_inline void change_bit(unsigned int nr, volatile unsigned long *p) + { + p += BIT_WORD(nr); + atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p); +-- +2.27.0 + diff --git a/queue-5.4/asoc-intel-haswell-add-missing-pm_ops.patch b/queue-5.4/asoc-intel-haswell-add-missing-pm_ops.patch new file mode 100644 index 00000000000..ea8309d03a4 --- /dev/null +++ b/queue-5.4/asoc-intel-haswell-add-missing-pm_ops.patch @@ -0,0 +1,36 @@ +From a5b656bc79d598846e71db718464e529750f8741 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 17 Dec 2020 11:54:01 +0100 +Subject: ASoC: Intel: haswell: Add missing pm_ops + +From: Cezary Rojewski + +[ Upstream commit bb224c3e3e41d940612d4cc9573289cdbd5cb8f5 ] + +haswell machine board is missing pm_ops what prevents it from undergoing +suspend-resume procedure successfully. Assign default snd_soc_pm_ops so +this is no longer the case. + +Signed-off-by: Cezary Rojewski +Link: https://lore.kernel.org/r/20201217105401.27865-1-cezary.rojewski@intel.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/intel/boards/haswell.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/soc/intel/boards/haswell.c b/sound/soc/intel/boards/haswell.c +index 3dadf9bff796a..cf47fd9cd506b 100644 +--- a/sound/soc/intel/boards/haswell.c ++++ b/sound/soc/intel/boards/haswell.c +@@ -206,6 +206,7 @@ static struct platform_driver haswell_audio = { + .probe = haswell_audio_probe, + .driver = { + .name = "haswell-audio", ++ .pm = &snd_soc_pm_ops, + }, + }; + +-- +2.27.0 + diff --git a/queue-5.4/clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch b/queue-5.4/clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch new file mode 100644 index 00000000000..c1b5b757a74 --- /dev/null +++ b/queue-5.4/clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch @@ -0,0 +1,43 @@ +From 2fc5375c7998208612d2822a769a8d24f99d6dc2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 8 Jan 2021 13:59:12 +0000 +Subject: clk: tegra30: Add hda clock default rates to clock driver + +From: Peter Geis + +[ Upstream commit f4eccc7fea203cfb35205891eced1ab51836f362 ] + +Current implementation defaults the hda clocks to clk_m. This causes hda +to run too slow to operate correctly. Fix this by defaulting to pll_p and +setting the frequency to the correct rate. + +This matches upstream t124 and downstream t30. + +Acked-by: Jon Hunter +Tested-by: Ion Agorria +Acked-by: Sameer Pujar +Acked-by: Thierry Reding +Signed-off-by: Peter Geis +Link: https://lore.kernel.org/r/20210108135913.2421585-2-pgwipeout@gmail.com +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + drivers/clk/tegra/clk-tegra30.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c +index 7b4c6a488527d..501929d9f70ed 100644 +--- a/drivers/clk/tegra/clk-tegra30.c ++++ b/drivers/clk/tegra/clk-tegra30.c +@@ -1263,6 +1263,8 @@ static struct tegra_clk_init_table init_table[] __initdata = { + { TEGRA30_CLK_I2S3_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, + { TEGRA30_CLK_I2S4_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, + { TEGRA30_CLK_VIMCLK_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, ++ { TEGRA30_CLK_HDA, TEGRA30_CLK_PLL_P, 102000000, 0 }, ++ { TEGRA30_CLK_HDA2CODEC_2X, TEGRA30_CLK_PLL_P, 48000000, 0 }, + /* must be the last entry */ + { TEGRA30_CLK_CLK_MAX, TEGRA30_CLK_CLK_MAX, 0, 0 }, + }; +-- +2.27.0 + diff --git a/queue-5.4/dm-integrity-select-crypto_skcipher.patch b/queue-5.4/dm-integrity-select-crypto_skcipher.patch new file mode 100644 index 00000000000..d458c3d098c --- /dev/null +++ b/queue-5.4/dm-integrity-select-crypto_skcipher.patch @@ -0,0 +1,37 @@ +From b9531fdb74d418d190e5df67a21ccbdec4ccb3f6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 14 Dec 2020 18:18:11 +0100 +Subject: dm integrity: select CRYPTO_SKCIPHER + +From: Anthony Iliopoulos + +[ Upstream commit f7b347acb5f6c29d9229bb64893d8b6a2c7949fb ] + +The integrity target relies on skcipher for encryption/decryption, but +certain kernel configurations may not enable CRYPTO_SKCIPHER, leading to +compilation errors due to unresolved symbols. Explicitly select +CRYPTO_SKCIPHER for DM_INTEGRITY, since it is unconditionally dependent +on it. + +Signed-off-by: Anthony Iliopoulos +Signed-off-by: Mike Snitzer +Signed-off-by: Sasha Levin +--- + drivers/md/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/md/Kconfig b/drivers/md/Kconfig +index aa98953f4462e..7dd6e98257c72 100644 +--- a/drivers/md/Kconfig ++++ b/drivers/md/Kconfig +@@ -565,6 +565,7 @@ config DM_INTEGRITY + select BLK_DEV_INTEGRITY + select DM_BUFIO + select CRYPTO ++ select CRYPTO_SKCIPHER + select ASYNC_XOR + ---help--- + This device-mapper target emulates a block device that has +-- +2.27.0 + diff --git a/queue-5.4/drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch b/queue-5.4/drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch new file mode 100644 index 00000000000..ceeacbd4cc8 --- /dev/null +++ b/queue-5.4/drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch @@ -0,0 +1,46 @@ +From a338a96e41e813a311f52192ca23fd482c9eeee4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 24 Nov 2020 19:57:03 +0800 +Subject: drm/amd/display: Fix to be able to stop crc calculation + +From: Wayne Lin + +[ Upstream commit 02ce73b01e09e388614b22b7ebc71debf4a588f0 ] + +[Why] +Find out when we try to disable CRC calculation, +crc generation is still enabled. Main reason is +that dc_stream_configure_crc() will never get +called when the source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE. + +[How] +Add checking condition that when source is +AMDGPU_DM_PIPE_CRC_SOURCE_NONE, we should also call +dc_stream_configure_crc() to disable crc calculation. +Also, clean up crc window when disable crc calculation. + +Signed-off-by: Wayne Lin +Reviewed-by: Nicholas Kazlauskas +Acked-by: Qingqing Zhuo +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +index a549c7c717ddc..f0b001b3af578 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +@@ -113,7 +113,7 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, + mutex_lock(&adev->dm.dc_lock); + + /* Enable CRTC CRC generation if necessary. */ +- if (dm_is_crc_source_crtc(source)) { ++ if (dm_is_crc_source_crtc(source) || source == AMDGPU_DM_PIPE_CRC_SOURCE_NONE) { + if (!dc_stream_configure_crc(stream_state->ctx->dc, + stream_state, enable, enable)) { + ret = -EINVAL; +-- +2.27.0 + diff --git a/queue-5.4/drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch b/queue-5.4/drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch new file mode 100644 index 00000000000..09e33dd5617 --- /dev/null +++ b/queue-5.4/drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch @@ -0,0 +1,38 @@ +From a22b7c8a619818cbbf66772a378d9a564d7d774a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 5 Jan 2021 15:04:01 +0800 +Subject: drm/amdgpu/psp: fix psp gfx ctrl cmds + +From: Victor Zhao + +[ Upstream commit f14a5c34d143f6627f0be70c0de1d962f3a6ff1c ] + +psp GFX_CTRL_CMD_ID_CONSUME_CMD different for windows and linux, +according to psp, linux cmds are not correct. + +v2: only correct GFX_CTRL_CMD_ID_CONSUME_CMD. + +Signed-off-by: Victor Zhao +Reviewed-by: Emily.Deng +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h +index 74a9fe8e0cfb9..8c54f0be51bab 100644 +--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h ++++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h +@@ -44,7 +44,7 @@ enum psp_gfx_crtl_cmd_id + GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */ + GFX_CTRL_CMD_ID_MODE1_RST = 0x00070000, /* trigger the Mode 1 reset */ + GFX_CTRL_CMD_ID_GBR_IH_SET = 0x00080000, /* set Gbr IH_RB_CNTL registers */ +- GFX_CTRL_CMD_ID_CONSUME_CMD = 0x000A0000, /* send interrupt to psp for updating write pointer of vf */ ++ GFX_CTRL_CMD_ID_CONSUME_CMD = 0x00090000, /* send interrupt to psp for updating write pointer of vf */ + GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING = 0x000C0000, /* destroy GPCOM ring */ + + GFX_CTRL_CMD_ID_MAX = 0x000F0000, /* max command ID */ +-- +2.27.0 + diff --git a/queue-5.4/drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch b/queue-5.4/drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch new file mode 100644 index 00000000000..a3208898b2f --- /dev/null +++ b/queue-5.4/drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch @@ -0,0 +1,50 @@ +From 1ae175e34d921c46c1bf8815e3dd2165961d86a7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/bios: fix issue shadowing expansion ROMs + +From: Ben Skeggs + +[ Upstream commit 402a89660e9dc880710b12773076a336c9dab3d7 ] + +This issue has generally been covered up by the presence of additional +expansion ROMs after the ones we're interested in, with header fetches +of subsequent images loading enough of the ROM to hide the issue. + +Noticed on GA102, which lacks a type 0x70 image compared to TU102,. + +[ 906.364197] nouveau 0000:09:00.0: bios: 00000000: type 00, 65024 bytes +[ 906.381205] nouveau 0000:09:00.0: bios: 0000fe00: type 03, 91648 bytes +[ 906.405213] nouveau 0000:09:00.0: bios: 00026400: type e0, 22016 bytes +[ 906.410984] nouveau 0000:09:00.0: bios: 0002ba00: type e0, 366080 bytes + +vs + +[ 22.961901] nouveau 0000:09:00.0: bios: 00000000: type 00, 60416 bytes +[ 22.984174] nouveau 0000:09:00.0: bios: 0000ec00: type 03, 71168 bytes +[ 23.010446] nouveau 0000:09:00.0: bios: 00020200: type e0, 48128 bytes +[ 23.028220] nouveau 0000:09:00.0: bios: 0002be00: type e0, 140800 bytes +[ 23.080196] nouveau 0000:09:00.0: bios: 0004e400: type 70, 7168 bytes + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c +index 7deb81b6dbac6..4b571cc6bc70f 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c +@@ -75,7 +75,7 @@ shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) + nvkm_debug(subdev, "%08x: type %02x, %d bytes\n", + image.base, image.type, image.size); + +- if (!shadow_fetch(bios, mthd, image.size)) { ++ if (!shadow_fetch(bios, mthd, image.base + image.size)) { + nvkm_debug(subdev, "%08x: fetch failed\n", image.base); + return 0; + } +-- +2.27.0 + diff --git a/queue-5.4/drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch b/queue-5.4/drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch new file mode 100644 index 00000000000..3833d754a7b --- /dev/null +++ b/queue-5.4/drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch @@ -0,0 +1,55 @@ +From 7371ff67f964d06a420f825516d8778506dc1f47 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/i2c/gm200: increase width of aux semaphore owner fields + +From: Ben Skeggs + +[ Upstream commit ba6e9ab0fcf3d76e3952deb12b5f993991621d9c ] + +Noticed while debugging GA102. + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +index edb6148cbca04..d0e80ad526845 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +@@ -33,7 +33,7 @@ static void + gm200_i2c_aux_fini(struct gm200_i2c_aux *aux) + { + struct nvkm_device *device = aux->base.pad->i2c->subdev.device; +- nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00310000, 0x00000000); ++ nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00710000, 0x00000000); + } + + static int +@@ -54,10 +54,10 @@ gm200_i2c_aux_init(struct gm200_i2c_aux *aux) + AUX_ERR(&aux->base, "begin idle timeout %08x", ctrl); + return -EBUSY; + } +- } while (ctrl & 0x03010000); ++ } while (ctrl & 0x07010000); + + /* set some magic, and wait up to 1ms for it to appear */ +- nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00300000, ureq); ++ nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00700000, ureq); + timeout = 1000; + do { + ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50)); +@@ -67,7 +67,7 @@ gm200_i2c_aux_init(struct gm200_i2c_aux *aux) + gm200_i2c_aux_fini(aux); + return -EBUSY; + } +- } while ((ctrl & 0x03000000) != urep); ++ } while ((ctrl & 0x07000000) != urep); + + return 0; + } +-- +2.27.0 + diff --git a/queue-5.4/drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch b/queue-5.4/drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch new file mode 100644 index 00000000000..1f7832bc273 --- /dev/null +++ b/queue-5.4/drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch @@ -0,0 +1,70 @@ +From 95e588bd505eeb769d8e1fd6fd942693deb3526c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/kms/nv50-: fix case where notifier buffer is at offset 0 + +From: Ben Skeggs + +[ Upstream commit caeb6ab899c3d36a74cda6e299c6e1c9c4e2a22e ] + +VRAM offset 0 is a valid address, triggered on GA102. + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/dispnv50/disp.c | 4 ++-- + drivers/gpu/drm/nouveau/dispnv50/disp.h | 2 +- + drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c | 2 +- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c +index ee2b1e1199e09..daa79d39201f9 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c +@@ -132,7 +132,7 @@ nv50_dmac_destroy(struct nv50_dmac *dmac) + + int + nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, +- const s32 *oclass, u8 head, void *data, u32 size, u64 syncbuf, ++ const s32 *oclass, u8 head, void *data, u32 size, s64 syncbuf, + struct nv50_dmac *dmac) + { + struct nouveau_cli *cli = (void *)device->object.client; +@@ -167,7 +167,7 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, + if (ret) + return ret; + +- if (!syncbuf) ++ if (syncbuf < 0) + return 0; + + ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY, +diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.h b/drivers/gpu/drm/nouveau/dispnv50/disp.h +index 7c41b0599d1ac..284068fa6d007 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/disp.h ++++ b/drivers/gpu/drm/nouveau/dispnv50/disp.h +@@ -70,7 +70,7 @@ struct nv50_dmac { + + int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, + const s32 *oclass, u8 head, void *data, u32 size, +- u64 syncbuf, struct nv50_dmac *dmac); ++ s64 syncbuf, struct nv50_dmac *dmac); + void nv50_dmac_destroy(struct nv50_dmac *); + + u32 *evo_wait(struct nv50_dmac *, int nr); +diff --git a/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c b/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c +index f7dbd965e4e72..b49a212af4d8d 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c +@@ -68,7 +68,7 @@ wimmc37b_init_(const struct nv50_wimm_func *func, struct nouveau_drm *drm, + int ret; + + ret = nv50_dmac_create(&drm->client.device, &disp->disp->object, +- &oclass, 0, &args, sizeof(args), 0, ++ &oclass, 0, &args, sizeof(args), -1, + &wndw->wimm); + if (ret) { + NV_ERROR(drm, "wimm%04x allocation failed: %d\n", oclass, ret); +-- +2.27.0 + diff --git a/queue-5.4/drm-nouveau-mmu-fix-vram-heap-sizing.patch b/queue-5.4/drm-nouveau-mmu-fix-vram-heap-sizing.patch new file mode 100644 index 00000000000..dbd31d90318 --- /dev/null +++ b/queue-5.4/drm-nouveau-mmu-fix-vram-heap-sizing.patch @@ -0,0 +1,35 @@ +From 7e5de250cc6a2cde9cd5a010a1984c63040b3c9c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/mmu: fix vram heap sizing + +From: Ben Skeggs + +[ Upstream commit add42781ad76c5ae65127bf13852a4c6b2f08849 ] + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c +index ee11ccaf0563c..cb51e248cb41b 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c +@@ -316,9 +316,9 @@ nvkm_mmu_vram(struct nvkm_mmu *mmu) + { + struct nvkm_device *device = mmu->subdev.device; + struct nvkm_mm *mm = &device->fb->ram->vram; +- const u32 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL); +- const u32 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP); +- const u32 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED); ++ const u64 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL); ++ const u64 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP); ++ const u64 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED); + u8 type = NVKM_MEM_KIND * !!mmu->func->kind; + u8 heap = NVKM_MEM_VRAM; + int heapM, heapN, heapU; +-- +2.27.0 + diff --git a/queue-5.4/drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch b/queue-5.4/drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch new file mode 100644 index 00000000000..3ec2181e8f7 --- /dev/null +++ b/queue-5.4/drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch @@ -0,0 +1,119 @@ +From dce4d5440af634c104e054c929c4852d1145c04f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/privring: ack interrupts the same way as RM + +From: Ben Skeggs + +[ Upstream commit e05e06cd34f5311f677294a08b609acfbc315236 ] + +Whatever it is that we were doing before doesn't work on Ampere. + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c | 10 +++++++--- + drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c | 10 +++++++--- + 2 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c +index d80dbc8f09b20..55a4ea4393c62 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c +@@ -22,6 +22,7 @@ + * Authors: Ben Skeggs + */ + #include "priv.h" ++#include + + static void + gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) +@@ -31,7 +32,6 @@ gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400)); + nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000); + } + + static void +@@ -42,7 +42,6 @@ gf100_ibus_intr_rop(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400)); + nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000); + } + + static void +@@ -53,7 +52,6 @@ gf100_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400)); + nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000); + } + + void +@@ -90,6 +88,12 @@ gf100_ibus_intr(struct nvkm_subdev *ibus) + intr1 &= ~stat; + } + } ++ ++ nvkm_mask(device, 0x121c4c, 0x0000003f, 0x00000002); ++ nvkm_msec(device, 2000, ++ if (!(nvkm_rd32(device, 0x121c4c) & 0x0000003f)) ++ break; ++ ); + } + + static int +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c +index 9025ed1bd2a99..4caf3ef087e1d 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c +@@ -22,6 +22,7 @@ + * Authors: Ben Skeggs + */ + #include "priv.h" ++#include + + static void + gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) +@@ -31,7 +32,6 @@ gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800)); + nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000); + } + + static void +@@ -42,7 +42,6 @@ gk104_ibus_intr_rop(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800)); + nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000); + } + + static void +@@ -53,7 +52,6 @@ gk104_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800)); + nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000); + } + + void +@@ -90,6 +88,12 @@ gk104_ibus_intr(struct nvkm_subdev *ibus) + intr1 &= ~stat; + } + } ++ ++ nvkm_mask(device, 0x12004c, 0x0000003f, 0x00000002); ++ nvkm_msec(device, 2000, ++ if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f)) ++ break; ++ ); + } + + static int +-- +2.27.0 + diff --git a/queue-5.4/dts-phy-add-gpio-number-and-active-state-used-for-ph.patch b/queue-5.4/dts-phy-add-gpio-number-and-active-state-used-for-ph.patch new file mode 100644 index 00000000000..acfc792a8cd --- /dev/null +++ b/queue-5.4/dts-phy-add-gpio-number-and-active-state-used-for-ph.patch @@ -0,0 +1,35 @@ +From 2f3a208bf85b2618f9fb627de6e3460a1dc68b9c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 07:22:11 -0800 +Subject: dts: phy: add GPIO number and active state used for phy reset + +From: Sagar Shrikant Kadam + +[ Upstream commit a0fa9d727043da2238432471e85de0bdb8a8df65 ] + +The GEMGXL_RST line on HiFive Unleashed is pulled low and is +using GPIO number 12. Add these reset-gpio details to dt-node +using which the linux phylib can reset the phy. + +Signed-off-by: Sagar Shrikant Kadam +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +index cc04e66752aac..1ad3dc2fb6343 100644 +--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts ++++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +@@ -85,6 +85,7 @@ + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0007.0771"; + reg = <0>; ++ reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + }; + +-- +2.27.0 + diff --git a/queue-5.4/dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch b/queue-5.4/dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch new file mode 100644 index 00000000000..b5236c83552 --- /dev/null +++ b/queue-5.4/dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch @@ -0,0 +1,53 @@ +From 97baee3dd16c9e78f84e3864a9e3029e52efc244 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 07:22:10 -0800 +Subject: dts: phy: fix missing mdio device and probe failure of vsc8541-01 + device + +From: Sagar Shrikant Kadam + +[ Upstream commit be969b7cfbcfa8a835a528f1dc467f0975c6d883 ] + +HiFive unleashed A00 board has VSC8541-01 ethernet phy, this device is +identified as a Revision B device as described in device identification +registers. In order to use this phy in the unmanaged mode, it requires +a specific reset sequence of logical 0-1-0-1 transition on the NRESET pin +as documented here [1]. + +Currently, the bootloader (fsbl or u-boot-spl) takes care of the phy reset. +If due to some reason the phy device hasn't received the reset by the prior +stages before the linux macb driver comes into the picture, the MACB mii +bus gets probed but the mdio scan fails and is not even able to read the +phy ID registers. It gives an error message: + +"libphy: MACB_mii_bus: probed +mdio_bus 10090000.ethernet-ffffffff: MDIO device at address 0 is missing." + +Thus adding the device OUI (Organizationally Unique Identifier) to the phy +device node helps to probe the phy device. + +[1]: VSC8541-01 datasheet: +https://www.mouser.com/ds/2/523/Microsemi_VSC8541-01_Datasheet_10496_V40-1148034.pdf + +Signed-off-by: Sagar Shrikant Kadam +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +index 88cfcb96bf233..cc04e66752aac 100644 +--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts ++++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +@@ -83,6 +83,7 @@ + phy-mode = "gmii"; + phy-handle = <&phy0>; + phy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-id0007.0771"; + reg = <0>; + }; + }; +-- +2.27.0 + diff --git a/queue-5.4/hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch b/queue-5.4/hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch new file mode 100644 index 00000000000..6d87b4f688f --- /dev/null +++ b/queue-5.4/hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch @@ -0,0 +1,49 @@ +From e4eeea8389f469aabe2bf7f4be1ce2b0086d3a2c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Jan 2021 22:58:12 -0600 +Subject: HID: Ignore battery for Elan touchscreen on ASUS UX550 + +From: Seth Miller + +[ Upstream commit 7c38e769d5c508939ce5dc26df72602f3c902342 ] + +Battery status is being reported for the Elan touchscreen on ASUS +UX550 laptops despite not having a batter. It always shows either 0 or +1%. + +Signed-off-by: Seth Miller +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-ids.h | 1 + + drivers/hid/hid-input.c | 2 ++ + 2 files changed, 3 insertions(+) + +diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h +index 2aa810665a78c..33183933337af 100644 +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -393,6 +393,7 @@ + #define USB_DEVICE_ID_TOSHIBA_CLICK_L9W 0x0401 + #define USB_DEVICE_ID_HP_X2 0x074d + #define USB_DEVICE_ID_HP_X2_10_COVER 0x0755 ++#define USB_DEVICE_ID_ASUS_UX550_TOUCHSCREEN 0x2706 + + #define USB_VENDOR_ID_ELECOM 0x056e + #define USB_DEVICE_ID_ELECOM_BM084 0x0061 +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index b2da8476d0d30..ec08895e7b1dc 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -322,6 +322,8 @@ static const struct hid_device_id hid_battery_quirks[] = { + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_DINOVO_EDGE_KBD), + HID_BATTERY_QUIRK_IGNORE }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_ELAN, USB_DEVICE_ID_ASUS_UX550_TOUCHSCREEN), ++ HID_BATTERY_QUIRK_IGNORE }, + {} + }; + +-- +2.27.0 + diff --git a/queue-5.4/hid-logitech-dj-add-the-g602-receiver.patch b/queue-5.4/hid-logitech-dj-add-the-g602-receiver.patch new file mode 100644 index 00000000000..fb38f5af172 --- /dev/null +++ b/queue-5.4/hid-logitech-dj-add-the-g602-receiver.patch @@ -0,0 +1,40 @@ +From fd15cf7e5f7697e7c4640c6a9072f5e96ff701a0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Jan 2021 20:47:17 +0000 +Subject: HID: logitech-dj: add the G602 receiver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Filipe Laíns + +[ Upstream commit e400071a805d6229223a98899e9da8c6233704a1 ] + +Tested. The device gets correctly exported to userspace and I can see +mouse and keyboard events. + +Signed-off-by: Filipe Laíns +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-logitech-dj.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c +index 54d811fdcdb44..e5550a5bf49d0 100644 +--- a/drivers/hid/hid-logitech-dj.c ++++ b/drivers/hid/hid-logitech-dj.c +@@ -1862,6 +1862,10 @@ static const struct hid_device_id logi_dj_receivers[] = { + HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + 0xc531), + .driver_data = recvr_type_gaming_hidpp}, ++ { /* Logitech G602 receiver (0xc537) */ ++ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, ++ 0xc537), ++ .driver_data = recvr_type_gaming_hidpp}, + { /* Logitech lightspeed receiver (0xc539) */ + HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1), +-- +2.27.0 + diff --git a/queue-5.4/hid-multitouch-enable-multi-input-for-synaptics-poin.patch b/queue-5.4/hid-multitouch-enable-multi-input-for-synaptics-poin.patch new file mode 100644 index 00000000000..b34398d6ec3 --- /dev/null +++ b/queue-5.4/hid-multitouch-enable-multi-input-for-synaptics-poin.patch @@ -0,0 +1,38 @@ +From 604edce4c95c7e6a336c70b1ea396c1c2941a0a6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 30 Dec 2020 20:44:07 +0800 +Subject: HID: multitouch: Enable multi-input for Synaptics pointstick/touchpad + device + +From: Kai-Heng Feng + +[ Upstream commit c3d6eb6e54373f297313b65c1f2319d36914d579 ] + +Pointstick and its left/right buttons on HP EliteBook 850 G7 need +multi-input quirk to work correctly. + +Signed-off-by: Kai-Heng Feng +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-multitouch.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index 128d8f4319b9f..d91e6679afb18 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -2084,6 +2084,10 @@ static const struct hid_device_id mt_devices[] = { + HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8, + USB_VENDOR_ID_SYNAPTICS, 0xce08) }, + ++ { .driver_data = MT_CLS_WIN_8_FORCE_MULTI_INPUT, ++ HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8, ++ USB_VENDOR_ID_SYNAPTICS, 0xce09) }, ++ + /* TopSeed panels */ + { .driver_data = MT_CLS_TOPSEED, + MT_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, +-- +2.27.0 + diff --git a/queue-5.4/riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch b/queue-5.4/riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch new file mode 100644 index 00000000000..39a9c3935f4 --- /dev/null +++ b/queue-5.4/riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch @@ -0,0 +1,36 @@ +From 21a5a4f450a32d0786bfdb7e7d8d40ba1a03bdb5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 07:22:12 -0800 +Subject: riscv: defconfig: enable gpio support for HiFive Unleashed + +From: Sagar Shrikant Kadam + +[ Upstream commit 0983834a83931606a647c275e5d4165ce4e7b49f ] + +Ethernet phy VSC8541-01 on HiFive Unleashed has its reset line +connected to a gpio, so enable GPIO driver's required to reset +the phy. + +Signed-off-by: Sagar Shrikant Kadam +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/configs/defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig +index 420a0dbef3866..3c656fe97e583 100644 +--- a/arch/riscv/configs/defconfig ++++ b/arch/riscv/configs/defconfig +@@ -62,6 +62,8 @@ CONFIG_HW_RANDOM=y + CONFIG_HW_RANDOM_VIRTIO=y + CONFIG_SPI=y + CONFIG_SPI_SIFIVE=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIO_SIFIVE=y + # CONFIG_PTP_1588_CLOCK is not set + CONFIG_DRM=y + CONFIG_DRM_RADEON=y +-- +2.27.0 + diff --git a/queue-5.4/riscv-fix-kernel-time_init.patch b/queue-5.4/riscv-fix-kernel-time_init.patch new file mode 100644 index 00000000000..65352e75295 --- /dev/null +++ b/queue-5.4/riscv-fix-kernel-time_init.patch @@ -0,0 +1,48 @@ +From abd124e4a9aead315687dfc78f7696f589a4a59f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 13 Dec 2020 22:50:34 +0900 +Subject: riscv: Fix kernel time_init() + +From: Damien Le Moal + +[ Upstream commit 11f4c2e940e2f317c9d8fb5a79702f2a4a02ff98 ] + +If of_clk_init() is not called in time_init(), clock providers defined +in the system device tree are not initialized, resulting in failures for +other devices to initialize due to missing clocks. +Similarly to other architectures and to the default kernel time_init() +implementation, call of_clk_init() before executing timer_probe() in +time_init(). + +Signed-off-by: Damien Le Moal +Acked-by: Stephen Boyd +Reviewed-by: Palmer Dabbelt +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/kernel/time.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c +index 6a53c02e9c734..8aa70b519e04f 100644 +--- a/arch/riscv/kernel/time.c ++++ b/arch/riscv/kernel/time.c +@@ -4,6 +4,7 @@ + * Copyright (C) 2017 SiFive + */ + ++#include + #include + #include + #include +@@ -24,5 +25,7 @@ void __init time_init(void) + riscv_timebase = prop; + + lpj_fine = riscv_timebase / HZ; ++ ++ of_clk_init(NULL); + timer_probe(); + } +-- +2.27.0 + diff --git a/queue-5.4/riscv-fix-sifive-serial-driver.patch b/queue-5.4/riscv-fix-sifive-serial-driver.patch new file mode 100644 index 00000000000..704dc093ac5 --- /dev/null +++ b/queue-5.4/riscv-fix-sifive-serial-driver.patch @@ -0,0 +1,45 @@ +From 59e8c8656b89fe895ff415a777524f85dea45712 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 13 Dec 2020 22:50:35 +0900 +Subject: riscv: Fix sifive serial driver + +From: Damien Le Moal + +[ Upstream commit 1f1496a923b6ba16679074fe77100e1b53cdb880 ] + +Setup the port uartclk in sifive_serial_probe() so that the base baud +rate is correctly printed during device probe instead of always showing +"0". I.e. the probe message is changed from + +38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1, +base_baud = 0) is a SiFive UART v0 + +to the correct: + +38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1, +base_baud = 115200) is a SiFive UART v0 + +Signed-off-by: Damien Le Moal +Reviewed-by: Palmer Dabbelt +Acked-by: Palmer Dabbelt +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + drivers/tty/serial/sifive.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c +index b4343c6aa6512..6a2dc823ea828 100644 +--- a/drivers/tty/serial/sifive.c ++++ b/drivers/tty/serial/sifive.c +@@ -973,6 +973,7 @@ static int sifive_serial_probe(struct platform_device *pdev) + /* Set up clock divider */ + ssp->clkin_rate = clk_get_rate(ssp->clk); + ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE; ++ ssp->port.uartclk = ssp->baud_rate * 16; + __ssp_update_div(ssp); + + platform_set_drvdata(pdev, ssp); +-- +2.27.0 + diff --git a/queue-5.4/scsi-qedi-correct-max-length-of-chap-secret.patch b/queue-5.4/scsi-qedi-correct-max-length-of-chap-secret.patch new file mode 100644 index 00000000000..aed1db7c9c6 --- /dev/null +++ b/queue-5.4/scsi-qedi-correct-max-length-of-chap-secret.patch @@ -0,0 +1,46 @@ +From c753f45638261918180b566c5ed2aa996289bbc4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 17 Dec 2020 02:51:44 -0800 +Subject: scsi: qedi: Correct max length of CHAP secret + +From: Nilesh Javali + +[ Upstream commit d50c7986fbf0e2167279e110a2ed5bd8e811c660 ] + +The CHAP secret displayed garbage characters causing iSCSI login +authentication failure. Correct the CHAP password max length. + +Link: https://lore.kernel.org/r/20201217105144.8055-1-njavali@marvell.com +Reviewed-by: Lee Duncan +Signed-off-by: Nilesh Javali +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedi/qedi_main.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/scsi/qedi/qedi_main.c b/drivers/scsi/qedi/qedi_main.c +index 35c96ea2653be..fdd966fea7f6a 100644 +--- a/drivers/scsi/qedi/qedi_main.c ++++ b/drivers/scsi/qedi/qedi_main.c +@@ -2175,7 +2175,7 @@ qedi_show_boot_tgt_info(struct qedi_ctx *qedi, int type, + chap_name); + break; + case ISCSI_BOOT_TGT_CHAP_SECRET: +- rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN, ++ rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN, + chap_secret); + break; + case ISCSI_BOOT_TGT_REV_CHAP_NAME: +@@ -2183,7 +2183,7 @@ qedi_show_boot_tgt_info(struct qedi_ctx *qedi, int type, + mchap_name); + break; + case ISCSI_BOOT_TGT_REV_CHAP_SECRET: +- rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN, ++ rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN, + mchap_secret); + break; + case ISCSI_BOOT_TGT_FLAGS: +-- +2.27.0 + diff --git a/queue-5.4/scsi-sd-suppress-spurious-errors-when-write-same-is-.patch b/queue-5.4/scsi-sd-suppress-spurious-errors-when-write-same-is-.patch new file mode 100644 index 00000000000..f9d91ec30cd --- /dev/null +++ b/queue-5.4/scsi-sd-suppress-spurious-errors-when-write-same-is-.patch @@ -0,0 +1,49 @@ +From 6574e653db7d211731cef6c13ba56baccda3813c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Dec 2020 17:10:21 -0500 +Subject: scsi: sd: Suppress spurious errors when WRITE SAME is being disabled + +From: Ewan D. Milne + +[ Upstream commit e5cc9002caafacbaa8dab878d17a313192c3b03b ] + +The block layer code will split a large zeroout request into multiple bios +and if WRITE SAME is disabled because the storage device reports that it +does not support it (or support the length used), we can get an error +message from the block layer despite the setting of RQF_QUIET on the first +request. This is because more than one request may have already been +submitted. + +Fix this by setting RQF_QUIET when BLK_STS_TARGET is returned to fail the +request early, we don't need to log a message because we did not actually +submit the command to the device, and the block layer code will handle the +error by submitting individual write bios. + +Link: https://lore.kernel.org/r/20201207221021.28243-1-emilne@redhat.com +Reviewed-by: Christoph Hellwig +Signed-off-by: Ewan D. Milne +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/sd.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c +index 6a2f8bacfacea..f55249766d224 100644 +--- a/drivers/scsi/sd.c ++++ b/drivers/scsi/sd.c +@@ -934,8 +934,10 @@ static blk_status_t sd_setup_write_zeroes_cmnd(struct scsi_cmnd *cmd) + } + } + +- if (sdp->no_write_same) ++ if (sdp->no_write_same) { ++ rq->rq_flags |= RQF_QUIET; + return BLK_STS_TARGET; ++ } + + if (sdkp->ws16 || lba > 0xffffffff || nr_blocks > 0xffff) + return sd_setup_write_same16_cmnd(cmd, false); +-- +2.27.0 + diff --git a/queue-5.4/scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch b/queue-5.4/scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch new file mode 100644 index 00000000000..b816fd7d96e --- /dev/null +++ b/queue-5.4/scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch @@ -0,0 +1,65 @@ +From d0e96c59911a50f046a57f73dea74af7278cc98a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 28 Dec 2020 04:04:36 -0800 +Subject: scsi: ufs: Correct the LUN used in eh_device_reset_handler() callback + +From: Can Guo + +[ Upstream commit 35fc4cd34426c242ab015ef280853b7bff101f48 ] + +Users can initiate resets to specific SCSI device/target/host through +IOCTL. When this happens, the SCSI cmd passed to eh_device/target/host +_reset_handler() callbacks is initialized with a request whose tag is -1. +In this case it is not right for eh_device_reset_handler() callback to +count on the LUN get from hba->lrb[-1]. Fix it by getting LUN from the SCSI +device associated with the SCSI cmd. + +Link: https://lore.kernel.org/r/1609157080-26283-1-git-send-email-cang@codeaurora.org +Reviewed-by: Avri Altman +Reviewed-by: Stanley Chu +Signed-off-by: Can Guo +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshcd.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c +index b888117f4ecd3..476ef8044ae59 100644 +--- a/drivers/scsi/ufs/ufshcd.c ++++ b/drivers/scsi/ufs/ufshcd.c +@@ -5980,19 +5980,16 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) + { + struct Scsi_Host *host; + struct ufs_hba *hba; +- unsigned int tag; + u32 pos; + int err; +- u8 resp = 0xF; +- struct ufshcd_lrb *lrbp; ++ u8 resp = 0xF, lun; + unsigned long flags; + + host = cmd->device->host; + hba = shost_priv(host); +- tag = cmd->request->tag; + +- lrbp = &hba->lrb[tag]; +- err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp); ++ lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun); ++ err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp); + if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) { + if (!err) + err = resp; +@@ -6001,7 +5998,7 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) + + /* clear the commands that were pending for corresponding LUN */ + for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) { +- if (hba->lrb[pos].lun == lrbp->lun) { ++ if (hba->lrb[pos].lun == lun) { + err = ufshcd_clear_cmd(hba, pos); + if (err) + break; +-- +2.27.0 + diff --git a/queue-5.4/series b/queue-5.4/series index 76af7ebdbf3..4c609732112 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -15,3 +15,27 @@ dm-integrity-fix-a-crash-if-recalculate-used-without-internal_hash.patch drm-atomic-put-state-on-error-path.patch drm-syncobj-fix-use-after-free.patch drm-i915-gt-prevent-use-of-engine-wa_ctx-after-error.patch +asoc-intel-haswell-add-missing-pm_ops.patch +hid-multitouch-enable-multi-input-for-synaptics-poin.patch +dm-integrity-select-crypto_skcipher.patch +scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch +scsi-qedi-correct-max-length-of-chap-secret.patch +scsi-sd-suppress-spurious-errors-when-write-same-is-.patch +riscv-fix-kernel-time_init.patch +riscv-fix-sifive-serial-driver.patch +hid-logitech-dj-add-the-g602-receiver.patch +hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch +clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch +arm64-make-atomic-helpers-__always_inline.patch +xen-fix-event-channel-callback-via-intx-gsi.patch +x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch +dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch +dts-phy-add-gpio-number-and-active-state-used-for-ph.patch +riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch +drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch +drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch +drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch +drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch +drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch +drm-nouveau-mmu-fix-vram-heap-sizing.patch +drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch diff --git a/queue-5.4/x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch b/queue-5.4/x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch new file mode 100644 index 00000000000..442321e45da --- /dev/null +++ b/queue-5.4/x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch @@ -0,0 +1,80 @@ +From 43e2d230542424963b726f7c161d51b09ad1a1c6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Jan 2021 15:39:56 +0000 +Subject: x86/xen: Add xen_no_vector_callback option to test PCI INTX delivery + +From: David Woodhouse + +[ Upstream commit b36b0fe96af13460278bf9b173beced1bd15f85d ] + +It's useful to be able to test non-vector event channel delivery, to make +sure Linux will work properly on older Xen which doesn't have it. + +It's also useful for those working on Xen and Xen-compatible hypervisors, +because there are guest kernels still in active use which use PCI INTX +even when vector delivery is available. + +Signed-off-by: David Woodhouse +Reviewed-by: Boris Ostrovsky +Link: https://lore.kernel.org/r/20210106153958.584169-4-dwmw2@infradead.org +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + Documentation/admin-guide/kernel-parameters.txt | 4 ++++ + arch/x86/xen/enlighten_hvm.c | 11 ++++++++++- + 2 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt +index 74ba077e99e56..a19ae163c0589 100644 +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -5452,6 +5452,10 @@ + This option is obsoleted by the "nopv" option, which + has equivalent effect for XEN platform. + ++ xen_no_vector_callback ++ [KNL,X86,XEN] Disable the vector callback for Xen ++ event channel interrupts. ++ + xen_scrub_pages= [XEN] + Boolean option to control scrubbing pages before giving them back + to Xen, for use by other domains. Can be also changed at runtime +diff --git a/arch/x86/xen/enlighten_hvm.c b/arch/x86/xen/enlighten_hvm.c +index e138f7de52d20..6024fafed1642 100644 +--- a/arch/x86/xen/enlighten_hvm.c ++++ b/arch/x86/xen/enlighten_hvm.c +@@ -175,6 +175,8 @@ static int xen_cpu_dead_hvm(unsigned int cpu) + return 0; + } + ++static bool no_vector_callback __initdata; ++ + static void __init xen_hvm_guest_init(void) + { + if (xen_pv_domain()) +@@ -194,7 +196,7 @@ static void __init xen_hvm_guest_init(void) + + xen_panic_handler_init(); + +- if (xen_feature(XENFEAT_hvm_callback_vector)) ++ if (!no_vector_callback && xen_feature(XENFEAT_hvm_callback_vector)) + xen_have_vector_callback = 1; + + xen_hvm_smp_init(); +@@ -220,6 +222,13 @@ static __init int xen_parse_nopv(char *arg) + } + early_param("xen_nopv", xen_parse_nopv); + ++static __init int xen_parse_no_vector_callback(char *arg) ++{ ++ no_vector_callback = true; ++ return 0; ++} ++early_param("xen_no_vector_callback", xen_parse_no_vector_callback); ++ + bool __init xen_hvm_need_lapic(void) + { + if (xen_pv_domain()) +-- +2.27.0 + diff --git a/queue-5.4/xen-fix-event-channel-callback-via-intx-gsi.patch b/queue-5.4/xen-fix-event-channel-callback-via-intx-gsi.patch new file mode 100644 index 00000000000..aa494c69dd1 --- /dev/null +++ b/queue-5.4/xen-fix-event-channel-callback-via-intx-gsi.patch @@ -0,0 +1,253 @@ +From 5eff01df4374bb2a2c83d67eca1fd97aa8824376 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 13:26:02 +0000 +Subject: xen: Fix event channel callback via INTX/GSI + +From: David Woodhouse + +[ Upstream commit 3499ba8198cad47b731792e5e56b9ec2a78a83a2 ] + +For a while, event channel notification via the PCI platform device +has been broken, because we attempt to communicate with xenstore before +we even have notifications working, with the xs_reset_watches() call +in xs_init(). + +We tend to get away with this on Xen versions below 4.0 because we avoid +calling xs_reset_watches() anyway, because xenstore might not cope with +reading a non-existent key. And newer Xen *does* have the vector +callback support, so we rarely fall back to INTX/GSI delivery. + +To fix it, clean up a bit of the mess of xs_init() and xenbus_probe() +startup. Call xs_init() directly from xenbus_init() only in the !XS_HVM +case, deferring it to be called from xenbus_probe() in the XS_HVM case +instead. + +Then fix up the invocation of xenbus_probe() to happen either from its +device_initcall if the callback is available early enough, or when the +callback is finally set up. This means that the hack of calling +xenbus_probe() from a workqueue after the first interrupt, or directly +from the PCI platform device setup, is no longer needed. + +Signed-off-by: David Woodhouse +Reviewed-by: Boris Ostrovsky +Link: https://lore.kernel.org/r/20210113132606.422794-2-dwmw2@infradead.org +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + arch/arm/xen/enlighten.c | 2 +- + drivers/xen/events/events_base.c | 10 ---- + drivers/xen/platform-pci.c | 1 - + drivers/xen/xenbus/xenbus.h | 1 + + drivers/xen/xenbus/xenbus_comms.c | 8 --- + drivers/xen/xenbus/xenbus_probe.c | 81 +++++++++++++++++++++++++------ + include/xen/xenbus.h | 2 +- + 7 files changed, 70 insertions(+), 35 deletions(-) + +diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c +index dd6804a64f1a0..f45bff158fc20 100644 +--- a/arch/arm/xen/enlighten.c ++++ b/arch/arm/xen/enlighten.c +@@ -371,7 +371,7 @@ static int __init xen_guest_init(void) + } + gnttab_init(); + if (!xen_initial_domain()) +- xenbus_probe(NULL); ++ xenbus_probe(); + + /* + * Making sure board specific code will not set up ops for +diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c +index 26df84c45db4e..7b94a6c316643 100644 +--- a/drivers/xen/events/events_base.c ++++ b/drivers/xen/events/events_base.c +@@ -1988,16 +1988,6 @@ static struct irq_chip xen_percpu_chip __read_mostly = { + .irq_ack = ack_dynirq, + }; + +-int xen_set_callback_via(uint64_t via) +-{ +- struct xen_hvm_param a; +- a.domid = DOMID_SELF; +- a.index = HVM_PARAM_CALLBACK_IRQ; +- a.value = via; +- return HYPERVISOR_hvm_op(HVMOP_set_param, &a); +-} +-EXPORT_SYMBOL_GPL(xen_set_callback_via); +- + #ifdef CONFIG_XEN_PVHVM + /* Vector callbacks are better than PCI interrupts to receive event + * channel notifications because we can receive vector callbacks on any +diff --git a/drivers/xen/platform-pci.c b/drivers/xen/platform-pci.c +index 5e30602fdbad8..c45646450135f 100644 +--- a/drivers/xen/platform-pci.c ++++ b/drivers/xen/platform-pci.c +@@ -149,7 +149,6 @@ static int platform_pci_probe(struct pci_dev *pdev, + ret = gnttab_init(); + if (ret) + goto grant_out; +- xenbus_probe(NULL); + return 0; + grant_out: + gnttab_free_auto_xlat_frames(); +diff --git a/drivers/xen/xenbus/xenbus.h b/drivers/xen/xenbus/xenbus.h +index 88516a8a9f932..a9bb5f91082d3 100644 +--- a/drivers/xen/xenbus/xenbus.h ++++ b/drivers/xen/xenbus/xenbus.h +@@ -115,6 +115,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, + const char *type, + const char *nodename); + int xenbus_probe_devices(struct xen_bus_type *bus); ++void xenbus_probe(void); + + void xenbus_dev_changed(const char *node, struct xen_bus_type *bus); + +diff --git a/drivers/xen/xenbus/xenbus_comms.c b/drivers/xen/xenbus/xenbus_comms.c +index eb5151fc8efab..e5fda0256feb3 100644 +--- a/drivers/xen/xenbus/xenbus_comms.c ++++ b/drivers/xen/xenbus/xenbus_comms.c +@@ -57,16 +57,8 @@ DEFINE_MUTEX(xs_response_mutex); + static int xenbus_irq; + static struct task_struct *xenbus_task; + +-static DECLARE_WORK(probe_work, xenbus_probe); +- +- + static irqreturn_t wake_waiting(int irq, void *unused) + { +- if (unlikely(xenstored_ready == 0)) { +- xenstored_ready = 1; +- schedule_work(&probe_work); +- } +- + wake_up(&xb_waitq); + return IRQ_HANDLED; + } +diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c +index e6d0903459e11..14ccf13ab8fa1 100644 +--- a/drivers/xen/xenbus/xenbus_probe.c ++++ b/drivers/xen/xenbus/xenbus_probe.c +@@ -683,29 +683,76 @@ void unregister_xenstore_notifier(struct notifier_block *nb) + } + EXPORT_SYMBOL_GPL(unregister_xenstore_notifier); + +-void xenbus_probe(struct work_struct *unused) ++void xenbus_probe(void) + { + xenstored_ready = 1; + ++ /* ++ * In the HVM case, xenbus_init() deferred its call to ++ * xs_init() in case callbacks were not operational yet. ++ * So do it now. ++ */ ++ if (xen_store_domain_type == XS_HVM) ++ xs_init(); ++ + /* Notify others that xenstore is up */ + blocking_notifier_call_chain(&xenstore_chain, 0, NULL); + } +-EXPORT_SYMBOL_GPL(xenbus_probe); + +-static int __init xenbus_probe_initcall(void) ++/* ++ * Returns true when XenStore init must be deferred in order to ++ * allow the PCI platform device to be initialised, before we ++ * can actually have event channel interrupts working. ++ */ ++static bool xs_hvm_defer_init_for_callback(void) + { +- if (!xen_domain()) +- return -ENODEV; ++#ifdef CONFIG_XEN_PVHVM ++ return xen_store_domain_type == XS_HVM && ++ !xen_have_vector_callback; ++#else ++ return false; ++#endif ++} + +- if (xen_initial_domain() || xen_hvm_domain()) +- return 0; ++static int __init xenbus_probe_initcall(void) ++{ ++ /* ++ * Probe XenBus here in the XS_PV case, and also XS_HVM unless we ++ * need to wait for the platform PCI device to come up. ++ */ ++ if (xen_store_domain_type == XS_PV || ++ (xen_store_domain_type == XS_HVM && ++ !xs_hvm_defer_init_for_callback())) ++ xenbus_probe(); + +- xenbus_probe(NULL); + return 0; + } +- + device_initcall(xenbus_probe_initcall); + ++int xen_set_callback_via(uint64_t via) ++{ ++ struct xen_hvm_param a; ++ int ret; ++ ++ a.domid = DOMID_SELF; ++ a.index = HVM_PARAM_CALLBACK_IRQ; ++ a.value = via; ++ ++ ret = HYPERVISOR_hvm_op(HVMOP_set_param, &a); ++ if (ret) ++ return ret; ++ ++ /* ++ * If xenbus_probe_initcall() deferred the xenbus_probe() ++ * due to the callback not functioning yet, we can do it now. ++ */ ++ if (!xenstored_ready && xs_hvm_defer_init_for_callback()) ++ xenbus_probe(); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(xen_set_callback_via); ++ + /* Set up event channel for xenstored which is run as a local process + * (this is normally used only in dom0) + */ +@@ -818,11 +865,17 @@ static int __init xenbus_init(void) + break; + } + +- /* Initialize the interface to xenstore. */ +- err = xs_init(); +- if (err) { +- pr_warn("Error initializing xenstore comms: %i\n", err); +- goto out_error; ++ /* ++ * HVM domains may not have a functional callback yet. In that ++ * case let xs_init() be called from xenbus_probe(), which will ++ * get invoked at an appropriate time. ++ */ ++ if (xen_store_domain_type != XS_HVM) { ++ err = xs_init(); ++ if (err) { ++ pr_warn("Error initializing xenstore comms: %i\n", err); ++ goto out_error; ++ } + } + + if ((xen_store_domain_type != XS_LOCAL) && +diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h +index eba01ab5a55e0..fe9a9fa2ebc45 100644 +--- a/include/xen/xenbus.h ++++ b/include/xen/xenbus.h +@@ -187,7 +187,7 @@ void xs_suspend_cancel(void); + + struct work_struct; + +-void xenbus_probe(struct work_struct *); ++void xenbus_probe(void); + + #define XENBUS_IS_ERR_READ(str) ({ \ + if (!IS_ERR(str) && strlen(str) == 0) { \ +-- +2.27.0 +