From: Greg Kroah-Hartman Date: Thu, 15 Jun 2017 14:56:12 +0000 (+0200) Subject: 4.9-stable patches X-Git-Tag: v4.9.33~4 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=28d965b582ff624590a678ea01376bab50c1375c;p=thirdparty%2Fkernel%2Fstable-queue.git 4.9-stable patches added patches: drm-i915-always-recompute-watermarks-when-distrust_bios_wm-is-set-v2.patch drm-i915-workaround-vlv-chv-dsi-scanline-counter-hardware-fail.patch s390-kvm-do-not-rely-on-the-ilc-on-kvm-host-protection-fauls.patch xtensa-don-t-use-linux-irq-0.patch --- diff --git a/queue-4.9/drm-i915-always-recompute-watermarks-when-distrust_bios_wm-is-set-v2.patch b/queue-4.9/drm-i915-always-recompute-watermarks-when-distrust_bios_wm-is-set-v2.patch new file mode 100644 index 00000000000..473c42b8de8 --- /dev/null +++ b/queue-4.9/drm-i915-always-recompute-watermarks-when-distrust_bios_wm-is-set-v2.patch @@ -0,0 +1,66 @@ +From 4e3aed844547f63614363a386de126e6304e55fb Mon Sep 17 00:00:00 2001 +From: Maarten Lankhorst +Date: Wed, 31 May 2017 17:42:36 +0200 +Subject: drm/i915: Always recompute watermarks when distrust_bios_wm is set, v2. + +From: Maarten Lankhorst + +commit 4e3aed844547f63614363a386de126e6304e55fb upstream. + +On some systems there can be a race condition in which no crtc state is +added to the first atomic commit. This results in all crtc's having a +null DDB allocation, causing a FIFO underrun on any update until the +first modeset. + +Changes since v1: +- Do not take the connection_mutex, this is already done below. + +Reported-by: Maarten Lankhorst +Inspired-by: Mahesh Kumar +Signed-off-by: Maarten Lankhorst +Fixes: 98d39494d375 ("drm/i915/gen9: Compute DDB allocation at atomic +check time (v4)") +Cc: Mahesh Kumar +Cc: Matt Roper +Link: http://patchwork.freedesktop.org/patch/msgid/20170531154236.27180-1-maarten.lankhorst@linux.intel.com +Reviewed-by: Mahesh Kumar +Reviewed-by: Matt Roper +Signed-off-by: Greg Kroah-Hartman + +(cherry picked from commit 367d73d2806085bb507ab44c1f532640917fd5ca) +Signed-off-by: Jani Nikula + +--- + drivers/gpu/drm/i915/intel_pm.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -4114,11 +4114,19 @@ skl_compute_wm(struct drm_atomic_state * + struct drm_crtc_state *cstate; + struct intel_atomic_state *intel_state = to_intel_atomic_state(state); + struct skl_wm_values *results = &intel_state->wm_results; ++ struct drm_device *dev = state->dev; + struct skl_pipe_wm *pipe_wm; + bool changed = false; + int ret, i; + + /* ++ * When we distrust bios wm we always need to recompute to set the ++ * expected DDB allocations for each CRTC. ++ */ ++ if (to_i915(dev)->wm.distrust_bios_wm) ++ changed = true; ++ ++ /* + * If this transaction isn't actually touching any CRTC's, don't + * bother with watermark calculation. Note that if we pass this + * test, we're guaranteed to hold at least one CRTC state mutex, +@@ -4128,6 +4136,7 @@ skl_compute_wm(struct drm_atomic_state * + */ + for_each_crtc_in_state(state, crtc, cstate, i) + changed = true; ++ + if (!changed) + return 0; + diff --git a/queue-4.9/drm-i915-workaround-vlv-chv-dsi-scanline-counter-hardware-fail.patch b/queue-4.9/drm-i915-workaround-vlv-chv-dsi-scanline-counter-hardware-fail.patch new file mode 100644 index 00000000000..a175ed795e9 --- /dev/null +++ b/queue-4.9/drm-i915-workaround-vlv-chv-dsi-scanline-counter-hardware-fail.patch @@ -0,0 +1,115 @@ +From 8f4d38099b3098eae75f7755e1801931f8141350 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Thu, 15 Dec 2016 19:47:34 +0200 +Subject: drm/i915: Workaround VLV/CHV DSI scanline counter hardware fail +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit 8f4d38099b3098eae75f7755e1801931f8141350 upstream. + +The scanline counter is bonkers on VLV/CHV DSI. The scanline counter +increment is not lined up with the start of vblank like it is on +every other platform and output type. This causes problems for +both the vblank timestamping and atomic update vblank evasion. + +On my FFRD8 machine at least, the scanline counter increment +happens about 1/3 of a scanline ahead of the start of vblank (which +is where all register latching happens still). That means we can't +trust the scanline counter to tell us whether we're in vblank or not +while we're on that particular line. In order to keep vblank +timestamping in working condition when called from the vblank irq, +we'll leave scanline_offset at one, which means that the entire +line containing the start of vblank is considered to be inside +the vblank. + +For the vblank evasion we'll need to consider that entire line +to be bad, since we can't tell whether the registers already +got latched or not. And we can't actually use the start of vblank +interrupt to get us past that line as the interrupt would fire +too soon, and then we'd up waiting for the next start of vblank +instead. One way around that would using the frame start +interrupt instead since that wouldn't fire until the next +scanline, but that would require some bigger changes in the +interrupt code. So for simplicity we'll just poll until we get +past the bad line. + +v2: Adjust the comments a bit + +Cc: Jonas Aaberg +Tested-by: Jonas Aaberg +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99086 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/20161215174734.28779-1-ville.syrjala@linux.intel.com +Tested-by: Mika Kahola +Reviewed-by: Mika Kahola +(cherry picked from commit ec1b4ee2834e66884e5b0d3d465f347ff212e372) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 9 +++++++++ + drivers/gpu/drm/i915/intel_sprite.c | 21 +++++++++++++++++++++ + 2 files changed, 30 insertions(+) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13767,6 +13767,15 @@ static void update_scanline_offset(struc + * type. For DP ports it behaves like most other platforms, but on HDMI + * there's an extra 1 line difference. So we need to add two instead of + * one to the value. ++ * ++ * On VLV/CHV DSI the scanline counter would appear to increment ++ * approx. 1/3 of a scanline before start of vblank. Unfortunately ++ * that means we can't tell whether we're in vblank or not while ++ * we're on that particular line. We must still set scanline_offset ++ * to 1 so that the vblank timestamps come out correct when we query ++ * the scanline counter from within the vblank interrupt handler. ++ * However if queried just before the start of vblank we'll get an ++ * answer that's slightly in the future. + */ + if (IS_GEN2(dev)) { + const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; +--- a/drivers/gpu/drm/i915/intel_sprite.c ++++ b/drivers/gpu/drm/i915/intel_sprite.c +@@ -81,10 +81,13 @@ int intel_usecs_to_scanlines(const struc + */ + void intel_pipe_update_start(struct intel_crtc *crtc) + { ++ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; + long timeout = msecs_to_jiffies_timeout(1); + int scanline, min, max, vblank_start; + wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base); ++ bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && ++ intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DSI); + DEFINE_WAIT(wait); + + vblank_start = adjusted_mode->crtc_vblank_start; +@@ -136,6 +139,24 @@ void intel_pipe_update_start(struct inte + + drm_crtc_vblank_put(&crtc->base); + ++ /* ++ * On VLV/CHV DSI the scanline counter would appear to ++ * increment approx. 1/3 of a scanline before start of vblank. ++ * The registers still get latched at start of vblank however. ++ * This means we must not write any registers on the first ++ * line of vblank (since not the whole line is actually in ++ * vblank). And unfortunately we can't use the interrupt to ++ * wait here since it will fire too soon. We could use the ++ * frame start interrupt instead since it will fire after the ++ * critical scanline, but that would require more changes ++ * in the interrupt code. So for now we'll just do the nasty ++ * thing and poll for the bad scanline to pass us by. ++ * ++ * FIXME figure out if BXT+ DSI suffers from this as well ++ */ ++ while (need_vlv_dsi_wa && scanline == vblank_start) ++ scanline = intel_get_crtc_scanline(crtc); ++ + crtc->debug.scanline_start = scanline; + crtc->debug.start_vbl_time = ktime_get(); + crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc); diff --git a/queue-4.9/s390-kvm-do-not-rely-on-the-ilc-on-kvm-host-protection-fauls.patch b/queue-4.9/s390-kvm-do-not-rely-on-the-ilc-on-kvm-host-protection-fauls.patch new file mode 100644 index 00000000000..7d4b9a319eb --- /dev/null +++ b/queue-4.9/s390-kvm-do-not-rely-on-the-ilc-on-kvm-host-protection-fauls.patch @@ -0,0 +1,62 @@ +From c0e7bb38c07cbd8269549ee0a0566021a3c729de Mon Sep 17 00:00:00 2001 +From: Christian Borntraeger +Date: Mon, 15 May 2017 14:11:03 +0200 +Subject: s390/kvm: do not rely on the ILC on kvm host protection fauls + +From: Christian Borntraeger + +commit c0e7bb38c07cbd8269549ee0a0566021a3c729de upstream. + +For most cases a protection exception in the host (e.g. copy +on write or dirty tracking) on the sie instruction will indicate +an instruction length of 4. Turns out that there are some corner +cases (e.g. runtime instrumentation) where this is not necessarily +true and the ILC is unpredictable. + +Let's replace our 4 byte rewind_pad with 3 byte nops to prepare for +all possible ILCs. + +Signed-off-by: Christian Borntraeger +Signed-off-by: Martin Schwidefsky +Signed-off-by: Greg Kroah-Hartman + +--- + arch/s390/kernel/entry.S | 19 +++++++++++++------ + 1 file changed, 13 insertions(+), 6 deletions(-) + +--- a/arch/s390/kernel/entry.S ++++ b/arch/s390/kernel/entry.S +@@ -240,12 +240,17 @@ ENTRY(sie64a) + lctlg %c1,%c1,__LC_USER_ASCE # load primary asce + .Lsie_done: + # some program checks are suppressing. C code (e.g. do_protection_exception) +-# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other +-# instructions between sie64a and .Lsie_done should not cause program +-# interrupts. So lets use a nop (47 00 00 00) as a landing pad. ++# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There ++# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. ++# Other instructions between sie64a and .Lsie_done should not cause program ++# interrupts. So lets use 3 nops as a landing pad for all possible rewinds. + # See also .Lcleanup_sie +-.Lrewind_pad: +- nop 0 ++.Lrewind_pad6: ++ nopr 7 ++.Lrewind_pad4: ++ nopr 7 ++.Lrewind_pad2: ++ nopr 7 + .globl sie_exit + sie_exit: + lg %r14,__SF_EMPTY+8(%r15) # load guest register save area +@@ -258,7 +263,9 @@ sie_exit: + stg %r14,__SF_EMPTY+16(%r15) # set exit reason code + j sie_exit + +- EX_TABLE(.Lrewind_pad,.Lsie_fault) ++ EX_TABLE(.Lrewind_pad6,.Lsie_fault) ++ EX_TABLE(.Lrewind_pad4,.Lsie_fault) ++ EX_TABLE(.Lrewind_pad2,.Lsie_fault) + EX_TABLE(sie_exit,.Lsie_fault) + EXPORT_SYMBOL(sie64a) + EXPORT_SYMBOL(sie_exit) diff --git a/queue-4.9/series b/queue-4.9/series index c479f5b6bef..b18d06a3e34 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -101,3 +101,7 @@ rdma-qedr-fix-and-simplify-memory-leak-in-pd-alloc.patch rdma-qedr-don-t-reset-qp-when-queues-aren-t-flushed.patch rdma-qedr-don-t-spam-dmesg-if-qp-is-in-error-state.patch rdma-qedr-return-max-inline-data-in-qp-query-result.patch +xtensa-don-t-use-linux-irq-0.patch +s390-kvm-do-not-rely-on-the-ilc-on-kvm-host-protection-fauls.patch +drm-i915-workaround-vlv-chv-dsi-scanline-counter-hardware-fail.patch +drm-i915-always-recompute-watermarks-when-distrust_bios_wm-is-set-v2.patch diff --git a/queue-4.9/xtensa-don-t-use-linux-irq-0.patch b/queue-4.9/xtensa-don-t-use-linux-irq-0.patch new file mode 100644 index 00000000000..77d178725f6 --- /dev/null +++ b/queue-4.9/xtensa-don-t-use-linux-irq-0.patch @@ -0,0 +1,143 @@ +From e5c86679d5e864947a52fb31e45a425dea3e7fa9 Mon Sep 17 00:00:00 2001 +From: Max Filippov +Date: Mon, 5 Jun 2017 02:43:51 -0700 +Subject: xtensa: don't use linux IRQ #0 + +From: Max Filippov + +commit e5c86679d5e864947a52fb31e45a425dea3e7fa9 upstream. + +Linux IRQ #0 is reserved for error reporting and may not be used. +Increase NR_IRQS for one additional slot and increase +irq_domain_add_legacy parameter first_irq value to 1, so that linux +IRQ #0 is not associated with hardware IRQ #0 in legacy IRQ domains. +Introduce macro XTENSA_PIC_LINUX_IRQ for static translation of xtensa +PIC hardware IRQ # to linux IRQ #. Use this macro in XTFPGA platform +data definitions. + +This fixes inability to use hardware IRQ #0 in configurations that don't +use device tree and allows for non-identity mapping between linux IRQ # +and hardware IRQ #. + +Signed-off-by: Max Filippov +Signed-off-by: Greg Kroah-Hartman + +--- + arch/xtensa/include/asm/irq.h | 3 ++- + arch/xtensa/kernel/irq.c | 5 ----- + arch/xtensa/platforms/xtfpga/include/platform/hardware.h | 6 ++++-- + arch/xtensa/platforms/xtfpga/setup.c | 10 +++++----- + drivers/irqchip/irq-xtensa-mx.c | 2 +- + drivers/irqchip/irq-xtensa-pic.c | 2 +- + 6 files changed, 13 insertions(+), 15 deletions(-) + +--- a/arch/xtensa/include/asm/irq.h ++++ b/arch/xtensa/include/asm/irq.h +@@ -29,7 +29,8 @@ static inline void variant_irq_disable(u + # define PLATFORM_NR_IRQS 0 + #endif + #define XTENSA_NR_IRQS XCHAL_NUM_INTERRUPTS +-#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS) ++#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS + 1) ++#define XTENSA_PIC_LINUX_IRQ(hwirq) ((hwirq) + 1) + + #if VARIANT_NR_IRQS == 0 + static inline void variant_init_irq(void) { } +--- a/arch/xtensa/kernel/irq.c ++++ b/arch/xtensa/kernel/irq.c +@@ -34,11 +34,6 @@ asmlinkage void do_IRQ(int hwirq, struct + { + int irq = irq_find_mapping(NULL, hwirq); + +- if (hwirq >= NR_IRQS) { +- printk(KERN_EMERG "%s: cannot handle IRQ %d\n", +- __func__, hwirq); +- } +- + #ifdef CONFIG_DEBUG_STACKOVERFLOW + /* Debugging check for stack overflow: is there less than 1KB free? */ + { +--- a/arch/xtensa/platforms/xtfpga/include/platform/hardware.h ++++ b/arch/xtensa/platforms/xtfpga/include/platform/hardware.h +@@ -24,16 +24,18 @@ + + /* Interrupt configuration. */ + +-#define PLATFORM_NR_IRQS 10 ++#define PLATFORM_NR_IRQS 0 + + /* Default assignment of LX60 devices to external interrupts. */ + + #ifdef CONFIG_XTENSA_MX + #define DUART16552_INTNUM XCHAL_EXTINT3_NUM + #define OETH_IRQ XCHAL_EXTINT4_NUM ++#define C67X00_IRQ XCHAL_EXTINT8_NUM + #else + #define DUART16552_INTNUM XCHAL_EXTINT0_NUM + #define OETH_IRQ XCHAL_EXTINT1_NUM ++#define C67X00_IRQ XCHAL_EXTINT5_NUM + #endif + + /* +@@ -63,5 +65,5 @@ + + #define C67X00_PADDR (XCHAL_KIO_PADDR + 0x0D0D0000) + #define C67X00_SIZE 0x10 +-#define C67X00_IRQ 5 ++ + #endif /* __XTENSA_XTAVNET_HARDWARE_H */ +--- a/arch/xtensa/platforms/xtfpga/setup.c ++++ b/arch/xtensa/platforms/xtfpga/setup.c +@@ -175,8 +175,8 @@ static struct resource ethoc_res[] = { + .flags = IORESOURCE_MEM, + }, + [2] = { /* IRQ number */ +- .start = OETH_IRQ, +- .end = OETH_IRQ, ++ .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ), ++ .end = XTENSA_PIC_LINUX_IRQ(OETH_IRQ), + .flags = IORESOURCE_IRQ, + }, + }; +@@ -213,8 +213,8 @@ static struct resource c67x00_res[] = { + .flags = IORESOURCE_MEM, + }, + [1] = { /* IRQ number */ +- .start = C67X00_IRQ, +- .end = C67X00_IRQ, ++ .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ), ++ .end = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ), + .flags = IORESOURCE_IRQ, + }, + }; +@@ -247,7 +247,7 @@ static struct resource serial_resource = + static struct plat_serial8250_port serial_platform_data[] = { + [0] = { + .mapbase = DUART16552_PADDR, +- .irq = DUART16552_INTNUM, ++ .irq = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM), + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_IOREMAP, + .iotype = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32, +--- a/drivers/irqchip/irq-xtensa-mx.c ++++ b/drivers/irqchip/irq-xtensa-mx.c +@@ -142,7 +142,7 @@ static struct irq_chip xtensa_mx_irq_chi + int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent) + { + struct irq_domain *root_domain = +- irq_domain_add_legacy(NULL, NR_IRQS, 0, 0, ++ irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, + &xtensa_mx_irq_domain_ops, + &xtensa_mx_irq_chip); + irq_set_default_host(root_domain); +--- a/drivers/irqchip/irq-xtensa-pic.c ++++ b/drivers/irqchip/irq-xtensa-pic.c +@@ -89,7 +89,7 @@ static struct irq_chip xtensa_irq_chip = + int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent) + { + struct irq_domain *root_domain = +- irq_domain_add_legacy(NULL, NR_IRQS, 0, 0, ++ irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, + &xtensa_irq_domain_ops, &xtensa_irq_chip); + irq_set_default_host(root_domain); + return 0;