From: Ville Syrjälä Date: Fri, 18 Jul 2025 12:01:51 +0000 (+0300) Subject: drm/dp: Add definitions for POST_LT_ADJ training sequence X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=2b8e4b94c1b6cea1b4d3f989b3dfe4301d0d3a4a;p=thirdparty%2Fkernel%2Flinux.git drm/dp: Add definitions for POST_LT_ADJ training sequence Add the bit definitions needed for POST_LT_ADJ sequence. v2: DP_POST_LT_ADJ_REQ_IN_PROGRESS is bit 1 not 5 (Jani) Tested-by: Imre Deak Reviewed-by: Imre Deak Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250718120154.15492-2-ville.syrjala@linux.intel.com --- diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 811e9238a77cc..cf318e3ddb5c5 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -115,6 +115,7 @@ #define DP_MAX_LANE_COUNT 0x002 # define DP_MAX_LANE_COUNT_MASK 0x1f +# define DP_POST_LT_ADJ_REQ_SUPPORTED (1 << 5) /* 1.3 */ # define DP_TPS3_SUPPORTED (1 << 6) /* 1.2 */ # define DP_ENHANCED_FRAME_CAP (1 << 7) @@ -583,6 +584,7 @@ #define DP_LANE_COUNT_SET 0x101 # define DP_LANE_COUNT_MASK 0x0f +# define DP_POST_LT_ADJ_REQ_GRANTED (1 << 5) /* 1.3 */ # define DP_LANE_COUNT_ENHANCED_FRAME_EN (1 << 7) #define DP_TRAINING_PATTERN_SET 0x102 @@ -800,6 +802,7 @@ #define DP_LANE_ALIGN_STATUS_UPDATED 0x204 #define DP_INTERLANE_ALIGN_DONE (1 << 0) +#define DP_POST_LT_ADJ_REQ_IN_PROGRESS (1 << 1) /* 1.3 */ #define DP_128B132B_DPRX_EQ_INTERLANE_ALIGN_DONE (1 << 2) /* 2.0 E11 */ #define DP_128B132B_DPRX_CDS_INTERLANE_ALIGN_DONE (1 << 3) /* 2.0 E11 */ #define DP_128B132B_LT_FAILED (1 << 4) /* 2.0 E11 */