From: Philippe Mathieu-Daudé Date: Wed, 15 Oct 2025 17:34:49 +0000 (+0200) Subject: target/microblaze: Have do_load/store() take a TCGv_i32 address argument X-Git-Tag: v10.2.0-rc1~61^2~52 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=2c12ba4d8bdd309359d1072594f5a317e09da78b;p=thirdparty%2Fqemu.git target/microblaze: Have do_load/store() take a TCGv_i32 address argument All callers of do_load() and do_store() pass a TCGv_i32 address type, have both functions take a TCGv_i32. Suggested-by: Anton Johansson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-Id: <20251015180115.97493-7-philmd@linaro.org> --- diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 1554b9e67b..ed53848bad 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -708,7 +708,7 @@ static inline MemOp mo_endian(DisasContext *dc) return dc->cfg->endi ? MO_LE : MO_BE; } -static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop, +static bool do_load(DisasContext *dc, int rd, TCGv_i32 addr, MemOp mop, int mem_index, bool rev) { MemOp size = mop & MO_SIZE; @@ -726,7 +726,7 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop, mop ^= MO_BSWAP; } if (size < MO_32) { - tcg_gen_xori_tl(addr, addr, 3 - size); + tcg_gen_xori_i32(addr, addr, 3 - size); } } @@ -868,7 +868,7 @@ static bool trans_lwx(DisasContext *dc, arg_typea *arg) return true; } -static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop, +static bool do_store(DisasContext *dc, int rd, TCGv_i32 addr, MemOp mop, int mem_index, bool rev) { MemOp size = mop & MO_SIZE; @@ -886,7 +886,7 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop, mop ^= MO_BSWAP; } if (size < MO_32) { - tcg_gen_xori_tl(addr, addr, 3 - size); + tcg_gen_xori_i32(addr, addr, 3 - size); } }