From: Hyun Kwon <hyun.kwon@xilinx.com>
Date: Tue, 24 Nov 2015 01:12:59 +0000 (-0800)
Subject: ARM64: zynqmp: zcu102: dp: Use si570_1 for pixel clock
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=2f2847f96a1ebfbdcfea95fa3200d4d60518dd42;p=thirdparty%2Fu-boot.git

ARM64: zynqmp: zcu102: dp: Use si570_1 for pixel clock

Enable the video clock from PL, and set phandle to si570_1.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts
index bb92d85b83f..c0be327fb04 100644
--- a/arch/arm/dts/zynqmp-zcu102.dts
+++ b/arch/arm/dts/zynqmp-zcu102.dts
@@ -603,6 +603,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 
 &xilinx_drm {
 	status = "okay";
+	clocks = <&si570_1>;
 };
 
 &xlnx_dp {
@@ -611,6 +612,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 
 &xlnx_dp_sub {
 	status = "okay";
+	xlnx,vid-clk-pl;
 };
 
 &xlnx_dp_snd_pcm0 {