From: Greg Kroah-Hartman Date: Thu, 5 Jun 2014 03:26:05 +0000 (-0700) Subject: 3.4-stable patches X-Git-Tag: v3.14.6~15 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=30acfdb35bd5e06f322a7e3c4351c5a3ef099825;p=thirdparty%2Fkernel%2Fstable-queue.git 3.4-stable patches added patches: drm-radeon-always-program-the-mc-on-startup.patch drm-radeon-fix-hdmi-mode-enable-on-rs600-rs690-rs740.patch --- diff --git a/queue-3.4/drm-radeon-always-program-the-mc-on-startup.patch b/queue-3.4/drm-radeon-always-program-the-mc-on-startup.patch new file mode 100644 index 00000000000..fede9960802 --- /dev/null +++ b/queue-3.4/drm-radeon-always-program-the-mc-on-startup.patch @@ -0,0 +1,124 @@ +From 6fab3febf6d949b0a12b1e4e73db38e4a177a79e Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Sun, 4 Aug 2013 12:13:17 -0400 +Subject: drm/radeon: always program the MC on startup + +From: Alex Deucher + +commit 6fab3febf6d949b0a12b1e4e73db38e4a177a79e upstream. + +For r6xx+ asics. This mirrors the behavior of pre-r6xx +asics. We need to program the MC even if something +else in startup() fails. Failure to do so results in +an unusable GPU. + +Based on a fix from: Mark Kettenis +Signed-off-by: Alex Deucher +[wml: Backported to 3.4: +- adjust context +- drop changes to cik.c] +Signed-off-by: Weng Meiling +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/radeon/evergreen.c | 3 ++- + drivers/gpu/drm/radeon/ni.c | 3 ++- + drivers/gpu/drm/radeon/r600.c | 3 ++- + drivers/gpu/drm/radeon/rv770.c | 3 ++- + drivers/gpu/drm/radeon/si.c | 3 ++- + 5 files changed, 10 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -3219,6 +3219,8 @@ static int evergreen_startup(struct rade + /* enable pcie gen2 link */ + evergreen_pcie_gen2_enable(rdev); + ++ evergreen_mc_program(rdev); ++ + if (ASIC_IS_DCE5(rdev)) { + if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) { + r = ni_init_microcode(rdev); +@@ -3246,7 +3248,6 @@ static int evergreen_startup(struct rade + if (r) + return r; + +- evergreen_mc_program(rdev); + if (rdev->flags & RADEON_IS_AGP) { + evergreen_agp_enable(rdev); + } else { +--- a/drivers/gpu/drm/radeon/ni.c ++++ b/drivers/gpu/drm/radeon/ni.c +@@ -1552,6 +1552,8 @@ static int cayman_startup(struct radeon_ + /* enable pcie gen2 link */ + evergreen_pcie_gen2_enable(rdev); + ++ evergreen_mc_program(rdev); ++ + if (rdev->flags & RADEON_IS_IGP) { + if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { + r = ni_init_microcode(rdev); +@@ -1580,7 +1582,6 @@ static int cayman_startup(struct radeon_ + if (r) + return r; + +- evergreen_mc_program(rdev); + r = cayman_pcie_gart_enable(rdev); + if (r) + return r; +--- a/drivers/gpu/drm/radeon/r600.c ++++ b/drivers/gpu/drm/radeon/r600.c +@@ -2431,6 +2431,8 @@ int r600_startup(struct radeon_device *r + /* enable pcie gen2 link */ + r600_pcie_gen2_enable(rdev); + ++ r600_mc_program(rdev); ++ + if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { + r = r600_init_microcode(rdev); + if (r) { +@@ -2443,7 +2445,6 @@ int r600_startup(struct radeon_device *r + if (r) + return r; + +- r600_mc_program(rdev); + if (rdev->flags & RADEON_IS_AGP) { + r600_agp_enable(rdev); + } else { +--- a/drivers/gpu/drm/radeon/rv770.c ++++ b/drivers/gpu/drm/radeon/rv770.c +@@ -1058,6 +1058,8 @@ static int rv770_startup(struct radeon_d + /* enable pcie gen2 link */ + rv770_pcie_gen2_enable(rdev); + ++ rv770_mc_program(rdev); ++ + if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { + r = r600_init_microcode(rdev); + if (r) { +@@ -1070,7 +1072,6 @@ static int rv770_startup(struct radeon_d + if (r) + return r; + +- rv770_mc_program(rdev); + if (rdev->flags & RADEON_IS_AGP) { + rv770_agp_enable(rdev); + } else { +--- a/drivers/gpu/drm/radeon/si.c ++++ b/drivers/gpu/drm/radeon/si.c +@@ -3834,6 +3834,8 @@ static int si_startup(struct radeon_devi + struct radeon_ring *ring; + int r; + ++ si_mc_program(rdev); ++ + if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || + !rdev->rlc_fw || !rdev->mc_fw) { + r = si_init_microcode(rdev); +@@ -3853,7 +3855,6 @@ static int si_startup(struct radeon_devi + if (r) + return r; + +- si_mc_program(rdev); + r = si_pcie_gart_enable(rdev); + if (r) + return r; diff --git a/queue-3.4/drm-radeon-fix-hdmi-mode-enable-on-rs600-rs690-rs740.patch b/queue-3.4/drm-radeon-fix-hdmi-mode-enable-on-rs600-rs690-rs740.patch new file mode 100644 index 00000000000..36a4e8b832a --- /dev/null +++ b/queue-3.4/drm-radeon-fix-hdmi-mode-enable-on-rs600-rs690-rs740.patch @@ -0,0 +1,44 @@ +From dcb852905772416e322536ced5cb3c796d176af5 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 18 Apr 2013 09:36:42 -0400 +Subject: drm/radeon: fix hdmi mode enable on RS600/RS690/RS740 + +From: Alex Deucher + +commit dcb852905772416e322536ced5cb3c796d176af5 upstream. + +These chips were previously skipped since they are +pre-R600. + +Signed-off-by: Alex Deucher +[bwh: Backported to 3.2: adjust context] +Signed-off-by: Ben Hutchings +[wml: Backported to 3.4: +- adjust context +- no !ASIC_IS_DCE3(rdev)] +Signed-off-by: Weng Meiling +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/radeon/r600_hdmi.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/r600_hdmi.c ++++ b/drivers/gpu/drm/radeon/r600_hdmi.c +@@ -530,7 +530,7 @@ void r600_hdmi_enable(struct drm_encoder + WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1); + } else if (ASIC_IS_DCE3(rdev)) { + /* TODO */ +- } else if (rdev->family >= CHIP_R600) { ++ } else if (ASIC_IS_DCE2(rdev)) { + switch (radeon_encoder->encoder_id) { + case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: + WREG32_P(AVIVO_TMDSA_CNTL, AVIVO_TMDSA_CNTL_HDMI_EN, +@@ -602,7 +602,7 @@ void r600_hdmi_disable(struct drm_encode + WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0, ~0x1); + } else if (ASIC_IS_DCE32(rdev)) { + WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1); +- } else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { ++ } else if (ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE3(rdev)) { + switch (radeon_encoder->encoder_id) { + case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: + WREG32_P(AVIVO_TMDSA_CNTL, 0, diff --git a/queue-3.4/series b/queue-3.4/series index 7ed5905c599..f9acea671d0 100644 --- a/queue-3.4/series +++ b/queue-3.4/series @@ -183,3 +183,5 @@ drm-i915-try-not-to-lose-backlight-cblv-precision.patch drm-radeon-fix-panel-scaling-with-edp-and-lvds-bridges.patch drm-pad-drm_mode_get_connector-to-64-bit-boundary.patch drm-ttm-fix-memory-type-compatibility-check.patch +drm-radeon-fix-hdmi-mode-enable-on-rs600-rs690-rs740.patch +drm-radeon-always-program-the-mc-on-startup.patch