From: Lulu Cheng Date: Tue, 4 Mar 2025 01:49:53 +0000 (+0800) Subject: LoongArch: Simplify vec_widen_{add/sub/mult}_{hi/lo}_m describe. X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=326c2fd8f58ffed62f8c153bc272c16578b44143;p=thirdparty%2Fgcc.git LoongArch: Simplify vec_widen_{add/sub/mult}_{hi/lo}_m describe. gcc/ChangeLog: * config/loongarch/lasx.md (vec_widen_add_hi_): Move. (vec_widen_add_lo_): Move. (vec_widen_sub_hi_): Move. (vec_widen_sub_lo_): Move. (vec_widen_mult_hi_): Move. (vec_widen_mult_lo_): Move. (hi_lo): New define_int_attr. (vec_widen___): New define_expand. (vec_widen_mult__): Likewise. * config/loongarch/loongarch-protos.h (loongarch_expand_vec_widen_hilo): Modify the function parameter list. * config/loongarch/loongarch.cc (loongarch_expand_vec_widen_hilo): Optimized. --- diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index c4186b0a779..ef67eb3915d 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -3570,69 +3570,40 @@ [(set_attr "type" "simd_store") (set_attr "mode" "DI")]) -(define_expand "vec_widen_add_hi_" - [(match_operand: 0 "register_operand") - (any_extend: (match_operand:ILASX_HB 1 "register_operand")) - (any_extend: (match_operand:ILASX_HB 2 "register_operand"))] - "ISA_HAS_LASX" -{ - loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2], - , true, "add"); - DONE; -}) - -(define_expand "vec_widen_add_lo_" - [(match_operand: 0 "register_operand") - (any_extend: (match_operand:ILASX_HB 1 "register_operand")) - (any_extend: (match_operand:ILASX_HB 2 "register_operand"))] - "ISA_HAS_LASX" -{ - loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2], - , false, "add"); - DONE; -}) - -(define_expand "vec_widen_sub_hi_" - [(match_operand: 0 "register_operand") - (any_extend: (match_operand:ILASX_HB 1 "register_operand")) - (any_extend: (match_operand:ILASX_HB 2 "register_operand"))] - "ISA_HAS_LASX" -{ - loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2], - , true, "sub"); - DONE; -}) - -(define_expand "vec_widen_sub_lo_" - [(match_operand: 0 "register_operand") - (any_extend: (match_operand:ILASX_HB 1 "register_operand")) - (any_extend: (match_operand:ILASX_HB 2 "register_operand"))] - "ISA_HAS_LASX" -{ - loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2], - , false, "sub"); - DONE; -}) +(define_int_attr hi_lo [(0 "lo") (1 "hi")]) -(define_expand "vec_widen_mult_hi_" +(define_expand "vec_widen___" [(match_operand: 0 "register_operand") - (any_extend: (match_operand:ILASX_HB 1 "register_operand")) - (any_extend: (match_operand:ILASX_HB 2 "register_operand"))] + (match_operand:ILASX_HB 1 "register_operand") + (match_operand:ILASX_HB 2 "register_operand") + (any_extend (const_int 0)) + (addsub (const_int 0) (const_int 0)) + (const_int zero_one)] "ISA_HAS_LASX" { + rtx (*fn_even) (rtx, rtx, rtx) = +gen_lasx_xvwev__; + rtx (*fn_odd) (rtx, rtx, rtx) = +gen_lasx_xvwod__; loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2], - , true, "mult"); + , fn_even, fn_odd); DONE; }) -(define_expand "vec_widen_mult_lo_" +(define_expand "vec_widen_mult__" [(match_operand: 0 "register_operand") - (any_extend: (match_operand:ILASX_HB 1 "register_operand")) - (any_extend: (match_operand:ILASX_HB 2 "register_operand"))] + (match_operand:ILASX_HB 1 "register_operand") + (match_operand:ILASX_HB 2 "register_operand") + (any_extend (const_int 0)) + (const_int zero_one)] "ISA_HAS_LASX" { + rtx (*fn_even) (rtx, rtx, rtx) = +gen_lasx_xvmulwev__; + rtx (*fn_odd) (rtx, rtx, rtx) = +gen_lasx_xvmulwod__; loongarch_expand_vec_widen_hilo (operands[0], operands[1], operands[2], - , false, "mult"); + , fn_even, fn_odd); DONE; }) diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h index 6ecbe27218c..bec436845aa 100644 --- a/gcc/config/loongarch/loongarch-protos.h +++ b/gcc/config/loongarch/loongarch-protos.h @@ -198,7 +198,8 @@ extern void loongarch_register_frame_header_opt (void); extern void loongarch_expand_vec_cond_expr (machine_mode, machine_mode, rtx *); extern void loongarch_expand_vec_cond_mask_expr (machine_mode, machine_mode, rtx *); -extern void loongarch_expand_vec_widen_hilo (rtx, rtx, rtx, bool, bool, const char *); +extern void loongarch_expand_vec_widen_hilo (rtx, rtx, rtx, bool, + rtx (*)(rtx, rtx, rtx), rtx (*)(rtx, rtx, rtx)); /* Routines implemented in loongarch-c.c. */ void loongarch_cpu_cpp_builtins (cpp_reader *); @@ -217,7 +218,8 @@ extern void loongarch_emit_swdivsf (rtx, rtx, rtx, machine_mode); extern bool loongarch_explicit_relocs_p (enum loongarch_symbol_type); extern bool loongarch_symbol_extreme_p (enum loongarch_symbol_type); extern bool loongarch_option_valid_attribute_p (tree, tree, tree, int); -extern void loongarch_option_override_internal (struct loongarch_target *, struct gcc_options *, struct gcc_options *); +extern void loongarch_option_override_internal (struct loongarch_target *, + struct gcc_options *, struct gcc_options *); extern void loongarch_reset_previous_fndecl (void); extern void loongarch_save_restore_target_globals (tree new_tree); extern void loongarch_register_pragmas (void); diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 740c8611a71..2198946facf 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -8903,98 +8903,22 @@ loongarch_expand_vec_interleave (rtx target, rtx op0, rtx op1, bool high_p) void loongarch_expand_vec_widen_hilo (rtx dest, rtx op1, rtx op2, - bool uns_p, bool high_p, const char *optab) + bool high_p, rtx (*fn_even) (rtx, rtx, rtx), + rtx (*fn_odd) (rtx, rtx, rtx)) { machine_mode wmode = GET_MODE (dest); machine_mode mode = GET_MODE (op1); - rtx t1, t2, t3; + rtx t1 = gen_reg_rtx (wmode); + rtx t2 = gen_reg_rtx (wmode); + rtx t3 = gen_reg_rtx (wmode); - t1 = gen_reg_rtx (wmode); - t2 = gen_reg_rtx (wmode); - t3 = gen_reg_rtx (wmode); switch (mode) { case V16HImode: - if (!strcmp (optab, "add")) - { - if (!uns_p) - { - emit_insn (gen_lasx_xvaddwev_w_h (t1, op1, op2)); - emit_insn (gen_lasx_xvaddwod_w_h (t2, op1, op2)); - } - else - { - emit_insn (gen_lasx_xvaddwev_w_hu (t1, op1, op2)); - emit_insn (gen_lasx_xvaddwod_w_hu (t2, op1, op2)); - } - } - else if (!strcmp (optab, "mult")) - { - if (!uns_p) - { - emit_insn (gen_lasx_xvmulwev_w_h (t1, op1, op2)); - emit_insn (gen_lasx_xvmulwod_w_h (t2, op1, op2)); - } - else - { - emit_insn (gen_lasx_xvmulwev_w_hu (t1, op1, op2)); - emit_insn (gen_lasx_xvmulwod_w_hu (t2, op1, op2)); - } - } - else if (!strcmp (optab, "sub")) - { - if (!uns_p) - { - emit_insn (gen_lasx_xvsubwev_w_h (t1, op1, op2)); - emit_insn (gen_lasx_xvsubwod_w_h (t2, op1, op2)); - } - else - { - emit_insn (gen_lasx_xvsubwev_w_hu (t1, op1, op2)); - emit_insn (gen_lasx_xvsubwod_w_hu (t2, op1, op2)); - } - } - break; - case V32QImode: - if (!strcmp (optab, "add")) { - if (!uns_p) - { - emit_insn (gen_lasx_xvaddwev_h_b (t1, op1, op2)); - emit_insn (gen_lasx_xvaddwod_h_b (t2, op1, op2)); - } - else - { - emit_insn (gen_lasx_xvaddwev_h_bu (t1, op1, op2)); - emit_insn (gen_lasx_xvaddwod_h_bu (t2, op1, op2)); - } - } - else if (!strcmp (optab, "mult")) - { - if (!uns_p) - { - emit_insn (gen_lasx_xvmulwev_h_b (t1, op1, op2)); - emit_insn (gen_lasx_xvmulwod_h_b (t2, op1, op2)); - } - else - { - emit_insn (gen_lasx_xvmulwev_h_bu (t1, op1, op2)); - emit_insn (gen_lasx_xvmulwod_h_bu (t2, op1, op2)); - } - } - else if (!strcmp (optab, "sub")) - { - if (!uns_p) - { - emit_insn (gen_lasx_xvsubwev_h_b (t1, op1, op2)); - emit_insn (gen_lasx_xvsubwod_h_b (t2, op1, op2)); - } - else - { - emit_insn (gen_lasx_xvsubwev_h_bu (t1, op1, op2)); - emit_insn (gen_lasx_xvsubwod_h_bu (t2, op1, op2)); - } + emit_insn (fn_even (t1, op1, op2)); + emit_insn (fn_odd (t2, op1, op2)); } break;