From: Michal Simek Date: Fri, 15 Dec 2017 09:36:22 +0000 (+0100) Subject: arm: zynq: Remove trailing whitespaces from ps7_init* zc770 xm011 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=32dd6712e738c7bfc84bf56f2e6aa0d33e525bd5;p=thirdparty%2Fu-boot.git arm: zynq: Remove trailing whitespaces from ps7_init* zc770 xm011 Remove traling whitespaces from zc770 xm011 ps7_init_gpl*. Signed-off-by: Michal Simek --- diff --git a/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.c index 8b933ca6883..5ca2a94254f 100644 --- a/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.c +++ b/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.c @@ -10,7 +10,7 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. -* +* * You should have received a copy of the GNU General Public License along * with this program; if not, see * @@ -21,7 +21,7 @@ * * @file ps7_init_gpl.c * -* This file is automatically generated +* This file is automatically generated * *****************************************************************************/ @@ -33,7 +33,7 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: PLL SLCR REGISTERS @@ -47,48 +47,48 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. .. LOCK_CNT = 0xfa // .. .. ==> 0XF8000110[21:12] = 0x000000FAU // .. .. ==> MASK : 0x003FF000U VAL : 0x000FA000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x000FA220U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x28 // .. .. .. ==> 0XF8000100[18:12] = 0x00000028U // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00028000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x00028000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. ARM_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000001U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. .. SRCSEL = 0x0 @@ -112,7 +112,7 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. .. .. CPU_PERI_CLKACT = 0x1 // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U), // .. .. FINISH: ARM PLL INIT // .. .. START: DDR PLL INIT @@ -125,48 +125,48 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. .. LOCK_CNT = 0x12c // .. .. ==> 0XF8000114[21:12] = 0x0000012CU // .. .. ==> MASK : 0x003FF000U VAL : 0x0012C000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x0012C220U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x20 // .. .. .. ==> 0XF8000104[18:12] = 0x00000020U // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00020000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00020000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. DDR_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000002U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. .. DDR_3XCLKACT = 0x1 @@ -181,7 +181,7 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. .. .. DDR_2XCLK_DIVISOR = 0x3 // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U), // .. .. FINISH: DDR PLL INIT // .. .. START: IO PLL INIT @@ -194,48 +194,48 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. .. LOCK_CNT = 0x145 // .. .. ==> 0XF8000118[21:12] = 0x00000145U // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x001452C0U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x1e // .. .. .. ==> 0XF8000108[18:12] = 0x0000001EU // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x0001E000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. IO_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000004U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. FINISH: IO PLL INIT @@ -244,7 +244,7 @@ unsigned long ps7_pll_init_data_3_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -260,7 +260,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: CLOCK CONTROL SLCR REGISTERS @@ -273,7 +273,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. DIVISOR1 = 0x7 // .. ==> 0XF8000128[25:20] = 0x00000007U // .. ==> MASK : 0x03F00000U VAL : 0x00700000U - // .. + // .. EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00700F01U), // .. CLKACT = 0x1 // .. ==> 0XF8000148[0:0] = 0x00000001U @@ -284,7 +284,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. DIVISOR = 0xa // .. ==> 0XF8000148[13:8] = 0x0000000AU // .. ==> MASK : 0x00003F00U VAL : 0x00000A00U - // .. + // .. EMIT_MASKWRITE(0XF8000148, 0x00003F31U ,0x00000A01U), // .. CLKACT0 = 0x0 // .. ==> 0XF8000154[0:0] = 0x00000000U @@ -298,7 +298,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. DIVISOR = 0x14 // .. ==> 0XF8000154[13:8] = 0x00000014U // .. ==> MASK : 0x00003F00U VAL : 0x00001400U - // .. + // .. EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001402U), // .. CLKACT0 = 0x1 // .. ==> 0XF8000158[0:0] = 0x00000001U @@ -312,7 +312,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. DIVISOR = 0x6 // .. ==> 0XF8000158[13:8] = 0x00000006U // .. ==> MASK : 0x00003F00U VAL : 0x00000600U - // .. + // .. EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000601U), // .. CLKACT0 = 0x1 // .. ==> 0XF800015C[0:0] = 0x00000001U @@ -329,7 +329,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. DIVISOR1 = 0x6 // .. ==> 0XF800015C[25:20] = 0x00000006U // .. ==> MASK : 0x03F00000U VAL : 0x00600000U - // .. + // .. EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00600701U), // .. CAN0_MUX = 0x0 // .. ==> 0XF8000160[5:0] = 0x00000000U @@ -343,7 +343,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. CAN1_REF_SEL = 0x0 // .. ==> 0XF8000160[22:22] = 0x00000000U // .. ==> MASK : 0x00400000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U), // .. .. START: TRACE CLOCK // .. .. FINISH: TRACE CLOCK @@ -356,7 +356,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. .. DIVISOR = 0x5 // .. .. ==> 0XF8000168[13:8] = 0x00000005U // .. .. ==> MASK : 0x00003F00U VAL : 0x00000500U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000501U), // .. .. SRCSEL = 0x0 // .. .. ==> 0XF8000170[5:4] = 0x00000000U @@ -367,12 +367,12 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. .. DIVISOR1 = 0x4 // .. .. ==> 0XF8000170[25:20] = 0x00000004U // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00400500U), // .. .. CLK_621_TRUE = 0x1 // .. .. ==> 0XF80001C4[0:0] = 0x00000001U // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U), // .. .. DMA_CPU_2XCLKACT = 0x1 // .. .. ==> 0XF800012C[0:0] = 0x00000001U @@ -428,12 +428,12 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. .. SMC_CPU_1XCLKACT = 0x1 // .. .. ==> 0XF800012C[24:24] = 0x00000001U // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x016D400DU), // .. .. SEL = 0x0 // .. .. ==> 0XF8000304[0:0] = 0x00000000U // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000304, 0x00000001U ,0x00000000U), // .. FINISH: CLOCK CONTROL SLCR REGISTERS // .. START: THIS SHOULD BE BLANK @@ -442,7 +442,7 @@ unsigned long ps7_clock_init_data_3_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -480,7 +480,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dis_auto_refresh = 0x0 // .. .. ==> 0XF8006000[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000080U), // .. .. FINISH: LOCK DDR // .. .. reg_ddrc_t_rfc_nom_x32 = 0x81 @@ -492,7 +492,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0 // .. .. ==> 0XF8006004[18:14] = 0x00000000U // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006004, 0x0007FFFFU ,0x00001081U), // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf // .. .. ==> 0XF8006008[10:0] = 0x0000000FU @@ -503,7 +503,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_hpr_xact_run_length = 0xf // .. .. ==> 0XF8006008[25:22] = 0x0000000FU // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU), // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1 // .. .. ==> 0XF800600C[10:0] = 0x00000001U @@ -514,7 +514,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_lpr_xact_run_length = 0x8 // .. .. ==> 0XF800600C[25:22] = 0x00000008U // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U), // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1 // .. .. ==> 0XF8006010[10:0] = 0x00000001U @@ -525,7 +525,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_w_max_starve_x32 = 0x2 // .. .. ==> 0XF8006010[25:15] = 0x00000002U // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U), // .. .. reg_ddrc_t_rc = 0x1b // .. .. ==> 0XF8006014[5:0] = 0x0000001BU @@ -536,7 +536,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10 // .. .. ==> 0XF8006014[20:14] = 0x00000010U // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x0004159BU), // .. .. reg_ddrc_wr2pre = 0x12 // .. .. ==> 0XF8006018[4:0] = 0x00000012U @@ -556,7 +556,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_cke = 0x4 // .. .. ==> 0XF8006018[31:28] = 0x00000004U // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44E438D2U), // .. .. reg_ddrc_write_latency = 0x5 // .. .. ==> 0XF800601C[4:0] = 0x00000005U @@ -579,7 +579,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_rcd = 0x7 // .. .. ==> 0XF800601C[31:28] = 0x00000007U // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U), // .. .. reg_ddrc_t_ccd = 0x4 // .. .. ==> 0XF8006020[4:2] = 0x00000004U @@ -611,7 +611,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dis_pad_pd = 0x0 // .. .. ==> 0XF8006020[30:30] = 0x00000000U // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006020, 0x7FDFFFFCU ,0x27087290U), // .. .. reg_ddrc_en_2t_timing_mode = 0x0 // .. .. ==> 0XF8006024[0:0] = 0x00000000U @@ -637,7 +637,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_mr_rdata_valid = 0x0 // .. .. ==> 0XF8006024[27:27] = 0x00000000U // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006024, 0x0FFFFFC3U ,0x00000000U), // .. .. reg_ddrc_final_wait_x32 = 0x7 // .. .. ==> 0XF8006028[6:0] = 0x00000007U @@ -648,7 +648,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_mrd = 0x4 // .. .. ==> 0XF8006028[13:11] = 0x00000004U // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U), // .. .. reg_ddrc_emr2 = 0x8 // .. .. ==> 0XF800602C[15:0] = 0x00000008U @@ -656,7 +656,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_emr3 = 0x0 // .. .. ==> 0XF800602C[31:16] = 0x00000000U // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U), // .. .. reg_ddrc_mr = 0x930 // .. .. ==> 0XF8006030[15:0] = 0x00000930U @@ -664,7 +664,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_emr = 0x4 // .. .. ==> 0XF8006030[31:16] = 0x00000004U // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U), // .. .. reg_ddrc_burst_rdwr = 0x4 // .. .. ==> 0XF8006034[3:0] = 0x00000004U @@ -678,7 +678,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_burstchop = 0x0 // .. .. ==> 0XF8006034[28:28] = 0x00000000U // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x000116D4U), // .. .. reg_ddrc_force_low_pri_n = 0x0 // .. .. ==> 0XF8006038[0:0] = 0x00000000U @@ -686,7 +686,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dis_dq = 0x0 // .. .. ==> 0XF8006038[1:1] = 0x00000000U // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006038, 0x00000003U ,0x00000000U), // .. .. reg_ddrc_addrmap_bank_b0 = 0x7 // .. .. ==> 0XF800603C[3:0] = 0x00000007U @@ -703,7 +703,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_addrmap_col_b6 = 0x0 // .. .. ==> 0XF800603C[19:16] = 0x00000000U // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000777U), // .. .. reg_ddrc_addrmap_col_b2 = 0x0 // .. .. ==> 0XF8006040[3:0] = 0x00000000U @@ -729,7 +729,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_addrmap_col_b11 = 0xf // .. .. ==> 0XF8006040[31:28] = 0x0000000FU // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFF00000U), // .. .. reg_ddrc_addrmap_row_b0 = 0x6 // .. .. ==> 0XF8006044[3:0] = 0x00000006U @@ -752,7 +752,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_addrmap_row_b15 = 0xf // .. .. ==> 0XF8006044[27:24] = 0x0000000FU // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0F666666U), // .. .. reg_phy_rd_local_odt = 0x0 // .. .. ==> 0XF8006048[13:12] = 0x00000000U @@ -769,7 +769,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reserved_reg_ddrc_rank0_rd_odt = 0x0 // .. .. ==> 0XF8006048[2:0] = 0x00000000U // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006048, 0x0003F03FU ,0x0003C008U), // .. .. reg_phy_rd_cmd_to_data = 0x0 // .. .. ==> 0XF8006050[3:0] = 0x00000000U @@ -801,12 +801,12 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7 // .. .. ==> 0XF8006050[31:28] = 0x00000007U // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U), // .. .. reg_ddrc_dis_dll_calib = 0x0 // .. .. ==> 0XF8006058[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006058, 0x00010000U ,0x00000000U), // .. .. reg_ddrc_rd_odt_delay = 0x3 // .. .. ==> 0XF800605C[3:0] = 0x00000003U @@ -820,7 +820,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_wr_odt_hold = 0x5 // .. .. ==> 0XF800605C[15:12] = 0x00000005U // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U), // .. .. reg_ddrc_pageclose = 0x0 // .. .. ==> 0XF8006060[0:0] = 0x00000000U @@ -843,7 +843,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_selfref_en = 0x0 // .. .. ==> 0XF8006060[12:12] = 0x00000000U // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU), // .. .. reg_ddrc_go2critical_hysteresis = 0x0 // .. .. ==> 0XF8006064[12:5] = 0x00000000U @@ -851,7 +851,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_go2critical_en = 0x1 // .. .. ==> 0XF8006064[17:17] = 0x00000001U // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U), // .. .. reg_ddrc_wrlvl_ww = 0x41 // .. .. ==> 0XF8006068[7:0] = 0x00000041U @@ -862,7 +862,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dfi_t_wlmrd = 0x28 // .. .. ==> 0XF8006068[25:16] = 0x00000028U // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U), // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10 // .. .. ==> 0XF800606C[7:0] = 0x00000010U @@ -870,7 +870,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16 // .. .. ==> 0XF800606C[15:8] = 0x00000016U // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U), // .. .. reg_ddrc_dfi_t_ctrl_delay = 0x1 // .. .. ==> 0XF8006078[3:0] = 0x00000001U @@ -890,7 +890,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_ckesr = 0x4 // .. .. ==> 0XF8006078[25:20] = 0x00000004U // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU ,0x00466111U), // .. .. reg_ddrc_t_ckpde = 0x2 // .. .. ==> 0XF800607C[3:0] = 0x00000002U @@ -907,7 +907,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_ckcsx = 0x3 // .. .. ==> 0XF800607C[19:16] = 0x00000003U // .. .. ==> MASK : 0x000F0000U VAL : 0x00030000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU ,0x00032222U), // .. .. reg_ddrc_dis_auto_zq = 0x0 // .. .. ==> 0XF80060A4[0:0] = 0x00000000U @@ -924,7 +924,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_zq_short_nop = 0x40 // .. .. ==> 0XF80060A4[31:22] = 0x00000040U // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U), // .. .. t_zq_short_interval_x1024 = 0xcb73 // .. .. ==> 0XF80060A8[19:0] = 0x0000CB73U @@ -932,7 +932,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. dram_rstn_x1024 = 0x69 // .. .. ==> 0XF80060A8[27:20] = 0x00000069U // .. .. ==> MASK : 0x0FF00000U VAL : 0x06900000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0690CB73U), // .. .. deeppowerdown_en = 0x0 // .. .. ==> 0XF80060AC[0:0] = 0x00000000U @@ -940,7 +940,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. deeppowerdown_to_x1024 = 0xff // .. .. ==> 0XF80060AC[8:1] = 0x000000FFU // .. .. ==> MASK : 0x000001FEU VAL : 0x000001FEU - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001FEU), // .. .. dfi_wrlvl_max_x1024 = 0xfff // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU @@ -963,12 +963,12 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1 // .. .. ==> 0XF80060B0[28:28] = 0x00000001U // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU), // .. .. reg_ddrc_skip_ocd = 0x1 // .. .. ==> 0XF80060B4[9:9] = 0x00000001U // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B4, 0x00000200U ,0x00000200U), // .. .. reg_ddrc_dfi_t_rddata_en = 0x6 // .. .. ==> 0XF80060B8[4:0] = 0x00000006U @@ -979,7 +979,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40 // .. .. ==> 0XF80060B8[24:15] = 0x00000040U // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U), // .. .. START: RESET ECC ERROR // .. .. Clear_Uncorrectable_DRAM_ECC_error = 1 @@ -988,7 +988,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. Clear_Correctable_DRAM_ECC_error = 1 // .. .. ==> 0XF80060C4[1:1] = 0x00000001U // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000003U), // .. .. FINISH: RESET ECC ERROR // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0 @@ -997,7 +997,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. Clear_Correctable_DRAM_ECC_error = 0x0 // .. .. ==> 0XF80060C4[1:1] = 0x00000000U // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U), // .. .. CORR_ECC_LOG_VALID = 0x0 // .. .. ==> 0XF80060C8[0:0] = 0x00000000U @@ -1005,12 +1005,12 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. ECC_CORRECTED_BIT_NUM = 0x0 // .. .. ==> 0XF80060C8[7:1] = 0x00000000U // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U), // .. .. UNCORR_ECC_LOG_VALID = 0x0 // .. .. ==> 0XF80060DC[0:0] = 0x00000000U // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U), // .. .. STAT_NUM_CORR_ERR = 0x0 // .. .. ==> 0XF80060F0[15:8] = 0x00000000U @@ -1018,7 +1018,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. STAT_NUM_UNCORR_ERR = 0x0 // .. .. ==> 0XF80060F0[7:0] = 0x00000000U // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U), // .. .. reg_ddrc_ecc_mode = 0x0 // .. .. ==> 0XF80060F4[2:0] = 0x00000000U @@ -1026,7 +1026,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dis_scrub = 0x1 // .. .. ==> 0XF80060F4[3:3] = 0x00000001U // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U), // .. .. reg_phy_dif_on = 0x0 // .. .. ==> 0XF8006114[3:0] = 0x00000000U @@ -1034,7 +1034,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_dif_off = 0x0 // .. .. ==> 0XF8006114[7:4] = 0x00000000U // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006118[0:0] = 0x00000001U @@ -1057,7 +1057,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006118[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006118, 0x7FFFFFCFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF800611C[0:0] = 0x00000001U @@ -1080,7 +1080,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF800611C[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800611C, 0x7FFFFFCFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006120[0:0] = 0x00000001U @@ -1103,7 +1103,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006120[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006120, 0x7FFFFFCFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006124[0:0] = 0x00000001U @@ -1126,7 +1126,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006124[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006124, 0x7FFFFFCFU ,0x40000001U), // .. .. reg_phy_wrlvl_init_ratio = 0x1b // .. .. ==> 0XF800612C[9:0] = 0x0000001BU @@ -1134,7 +1134,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe7 // .. .. ==> 0XF800612C[19:10] = 0x000000E7U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00039C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00039C1BU), // .. .. reg_phy_wrlvl_init_ratio = 0x35 // .. .. ==> 0XF8006130[9:0] = 0x00000035U @@ -1142,7 +1142,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xdf // .. .. ==> 0XF8006130[19:10] = 0x000000DFU // .. .. ==> MASK : 0x000FFC00U VAL : 0x00037C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00037C35U), // .. .. reg_phy_wrlvl_init_ratio = 0x2f // .. .. ==> 0XF8006134[9:0] = 0x0000002FU @@ -1150,7 +1150,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe5 // .. .. ==> 0XF8006134[19:10] = 0x000000E5U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00039400U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x0003942FU), // .. .. reg_phy_wrlvl_init_ratio = 0x1f // .. .. ==> 0XF8006138[9:0] = 0x0000001FU @@ -1158,7 +1158,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe3 // .. .. ==> 0XF8006138[19:10] = 0x000000E3U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00038C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00038C1FU), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006140[9:0] = 0x00000035U @@ -1169,7 +1169,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006140[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006144[9:0] = 0x00000035U @@ -1180,7 +1180,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006144[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006148[9:0] = 0x00000035U @@ -1191,7 +1191,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006148[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF800614C[9:0] = 0x00000035U @@ -1202,7 +1202,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF800614C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_wr_dqs_slave_ratio = 0x9b // .. .. ==> 0XF8006154[9:0] = 0x0000009BU @@ -1213,7 +1213,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006154[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x0000009BU), // .. .. reg_phy_wr_dqs_slave_ratio = 0xb5 // .. .. ==> 0XF8006158[9:0] = 0x000000B5U @@ -1224,7 +1224,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006158[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x000000B5U), // .. .. reg_phy_wr_dqs_slave_ratio = 0xaf // .. .. ==> 0XF800615C[9:0] = 0x000000AFU @@ -1235,7 +1235,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF800615C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x000000AFU), // .. .. reg_phy_wr_dqs_slave_ratio = 0x9f // .. .. ==> 0XF8006160[9:0] = 0x0000009FU @@ -1246,7 +1246,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006160[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x0000009FU), // .. .. reg_phy_fifo_we_slave_ratio = 0x13c // .. .. ==> 0XF8006168[10:0] = 0x0000013CU @@ -1257,7 +1257,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006168[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x0000013CU), // .. .. reg_phy_fifo_we_slave_ratio = 0x134 // .. .. ==> 0XF800616C[10:0] = 0x00000134U @@ -1268,7 +1268,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF800616C[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x00000134U), // .. .. reg_phy_fifo_we_slave_ratio = 0x13a // .. .. ==> 0XF8006170[10:0] = 0x0000013AU @@ -1279,7 +1279,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006170[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x0000013AU), // .. .. reg_phy_fifo_we_slave_ratio = 0x138 // .. .. ==> 0XF8006174[10:0] = 0x00000138U @@ -1290,7 +1290,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006174[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x00000138U), // .. .. reg_phy_wr_data_slave_ratio = 0xdb // .. .. ==> 0XF800617C[9:0] = 0x000000DBU @@ -1301,7 +1301,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF800617C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000DBU), // .. .. reg_phy_wr_data_slave_ratio = 0xf5 // .. .. ==> 0XF8006180[9:0] = 0x000000F5U @@ -1312,7 +1312,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006180[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000F5U), // .. .. reg_phy_wr_data_slave_ratio = 0xef // .. .. ==> 0XF8006184[9:0] = 0x000000EFU @@ -1323,7 +1323,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006184[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000EFU), // .. .. reg_phy_wr_data_slave_ratio = 0xdf // .. .. ==> 0XF8006188[9:0] = 0x000000DFU @@ -1334,7 +1334,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006188[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000DFU), // .. .. reg_phy_bl2 = 0x0 // .. .. ==> 0XF8006190[1:1] = 0x00000000U @@ -1372,7 +1372,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_cmd_latency = 0x0 // .. .. ==> 0XF8006190[30:30] = 0x00000000U // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006190, 0x6FFFFEFEU ,0x00040080U), // .. .. reg_phy_wr_rl_delay = 0x2 // .. .. ==> 0XF8006194[4:0] = 0x00000002U @@ -1398,12 +1398,12 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_phy_ctrl_slave_delay = 0x0 // .. .. ==> 0XF8006194[19:18] = 0x00000000U // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U), // .. .. reg_arb_page_addr_mask = 0x0 // .. .. ==> 0XF8006204[31:0] = 0x00000000U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006208[9:0] = 0x000003FFU @@ -1417,7 +1417,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_dis_page_match_wr_portn = 0x0 // .. .. ==> 0XF8006208[18:18] = 0x00000000U // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006208, 0x000703FFU ,0x000003FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF800620C[9:0] = 0x000003FFU @@ -1431,7 +1431,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_dis_page_match_wr_portn = 0x0 // .. .. ==> 0XF800620C[18:18] = 0x00000000U // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800620C, 0x000703FFU ,0x000003FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006210[9:0] = 0x000003FFU @@ -1445,7 +1445,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_dis_page_match_wr_portn = 0x0 // .. .. ==> 0XF8006210[18:18] = 0x00000000U // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006210, 0x000703FFU ,0x000003FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006214[9:0] = 0x000003FFU @@ -1459,7 +1459,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_dis_page_match_wr_portn = 0x0 // .. .. ==> 0XF8006214[18:18] = 0x00000000U // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006214, 0x000703FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006218[9:0] = 0x000003FFU @@ -1476,7 +1476,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006218[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF800621C[9:0] = 0x000003FFU @@ -1493,7 +1493,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF800621C[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006220[9:0] = 0x000003FFU @@ -1510,7 +1510,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006220[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006224[9:0] = 0x000003FFU @@ -1527,7 +1527,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006224[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU), // .. .. reg_ddrc_lpddr2 = 0x0 // .. .. ==> 0XF80062A8[0:0] = 0x00000000U @@ -1538,12 +1538,12 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_mr4_margin = 0x0 // .. .. ==> 0XF80062A8[11:4] = 0x00000000U // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062A8, 0x00000FF5U ,0x00000000U), // .. .. reg_ddrc_mr4_read_interval = 0x0 // .. .. ==> 0XF80062AC[31:0] = 0x00000000U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U), // .. .. reg_ddrc_min_stable_clock_x1 = 0x5 // .. .. ==> 0XF80062B0[3:0] = 0x00000005U @@ -1554,7 +1554,7 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_t_mrw = 0x5 // .. .. ==> 0XF80062B0[21:12] = 0x00000005U // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005125U), // .. .. reg_ddrc_max_auto_init_x1024 = 0xa8 // .. .. ==> 0XF80062B4[7:0] = 0x000000A8U @@ -1562,13 +1562,13 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dev_zqinit_x32 = 0x12 // .. .. ==> 0XF80062B4[17:8] = 0x00000012U // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001200U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x000012A8U), // .. .. START: POLL ON DCI STATUS // .. .. DONE = 1 // .. .. ==> 0XF8000B74[13:13] = 0x00000001U // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U - // .. .. + // .. .. EMIT_MASKPOLL(0XF8000B74, 0x00002000U), // .. .. FINISH: POLL ON DCI STATUS // .. .. START: UNLOCK DDR @@ -1596,14 +1596,14 @@ unsigned long ps7_ddr_init_data_3_0[] = { // .. .. reg_ddrc_dis_auto_refresh = 0x0 // .. .. ==> 0XF8006000[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000081U), // .. .. FINISH: UNLOCK DDR // .. .. START: CHECK DDR STATUS // .. .. ddrc_reg_operating_mode = 1 // .. .. ==> 0XF8006054[2:0] = 0x00000001U // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKPOLL(0XF8006054, 0x00000007U), // .. .. FINISH: CHECK DDR STATUS // .. FINISH: DDR INITIALIZATION @@ -1620,7 +1620,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: OCM REMAPPING @@ -1653,7 +1653,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B40[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U), // .. reserved_INP_POWER = 0x0 // .. ==> 0XF8000B44[0:0] = 0x00000000U @@ -1682,7 +1682,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B44[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U), // .. reserved_INP_POWER = 0x0 // .. ==> 0XF8000B48[0:0] = 0x00000000U @@ -1711,7 +1711,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B48[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U), // .. reserved_INP_POWER = 0x0 // .. ==> 0XF8000B4C[0:0] = 0x00000000U @@ -1740,7 +1740,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B4C[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000672U), // .. reserved_INP_POWER = 0x0 // .. ==> 0XF8000B50[0:0] = 0x00000000U @@ -1769,7 +1769,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B50[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U), // .. reserved_INP_POWER = 0x0 // .. ==> 0XF8000B54[0:0] = 0x00000000U @@ -1798,7 +1798,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B54[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000674U), // .. reserved_INP_POWER = 0x0 // .. ==> 0XF8000B58[0:0] = 0x00000000U @@ -1827,7 +1827,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B58[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U), // .. reserved_DRIVE_P = 0x1c // .. ==> 0XF8000B5C[6:0] = 0x0000001CU @@ -1847,7 +1847,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. reserved_RTERM = 0x0 // .. ==> 0XF8000B5C[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C61CU), // .. reserved_DRIVE_P = 0x1c // .. ==> 0XF8000B60[6:0] = 0x0000001CU @@ -1867,7 +1867,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. reserved_RTERM = 0x0 // .. ==> 0XF8000B60[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F9861CU), // .. reserved_DRIVE_P = 0x1c // .. ==> 0XF8000B64[6:0] = 0x0000001CU @@ -1887,7 +1887,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. reserved_RTERM = 0x0 // .. ==> 0XF8000B64[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F9861CU), // .. reserved_DRIVE_P = 0x1c // .. ==> 0XF8000B68[6:0] = 0x0000001CU @@ -1907,7 +1907,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. reserved_RTERM = 0x0 // .. ==> 0XF8000B68[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F9861CU), // .. VREF_INT_EN = 0x1 // .. ==> 0XF8000B6C[0:0] = 0x00000001U @@ -1936,13 +1936,13 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. reserved_CKE_PULLUP_EN = 0x0 // .. ==> 0XF8000B6C[14:14] = 0x00000000U // .. ==> MASK : 0x00004000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B6C, 0x00007FFFU ,0x00000209U), // .. .. START: ASSERT RESET // .. .. RESET = 1 // .. .. ==> 0XF8000B70[0:0] = 0x00000001U // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x00000001U ,0x00000001U), // .. .. FINISH: ASSERT RESET // .. .. START: DEASSERT RESET @@ -1952,7 +1952,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. .. reserved_VRN_OUT = 0x1 // .. .. ==> 0XF8000B70[5:5] = 0x00000001U // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U), // .. .. FINISH: DEASSERT RESET // .. .. RESET = 0x1 @@ -2009,7 +2009,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. .. reserved_INT_DCI_EN = 0x0 // .. .. ==> 0XF8000B70[26:26] = 0x00000000U // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x07FEFFFFU ,0x00000823U), // .. FINISH: DDRIOB SETTINGS // .. START: MIO PROGRAMMING @@ -2040,7 +2040,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000700[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000708[0:0] = 0x00000000U @@ -2069,7 +2069,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000708[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800070C[0:0] = 0x00000000U @@ -2098,7 +2098,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800070C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000710[0:0] = 0x00000000U @@ -2127,7 +2127,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000710[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000714[0:0] = 0x00000000U @@ -2156,7 +2156,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000714[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000718[0:0] = 0x00000000U @@ -2185,7 +2185,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000718[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800071C[0:0] = 0x00000000U @@ -2214,7 +2214,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800071C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000720[0:0] = 0x00000000U @@ -2243,7 +2243,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000720[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000724[0:0] = 0x00000000U @@ -2272,7 +2272,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000724[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000724, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000728[0:0] = 0x00000000U @@ -2301,7 +2301,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000728[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800072C[0:0] = 0x00000000U @@ -2330,7 +2330,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800072C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000730[0:0] = 0x00000000U @@ -2359,7 +2359,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000730[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000734[0:0] = 0x00000000U @@ -2388,7 +2388,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000734[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000738[0:0] = 0x00000001U @@ -2417,7 +2417,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000738[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00000611U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000760[0:0] = 0x00000000U @@ -2446,7 +2446,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000760[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x000006E0U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000764[0:0] = 0x00000001U @@ -2475,7 +2475,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000764[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x000006E1U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000768[0:0] = 0x00000001U @@ -2504,7 +2504,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000768[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00000621U), // .. TRI_ENABLE = 0 // .. ==> 0XF800076C[0:0] = 0x00000000U @@ -2533,7 +2533,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800076C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00000620U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000770[0:0] = 0x00000000U @@ -2562,7 +2562,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000770[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000774[0:0] = 0x00000000U @@ -2591,7 +2591,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000774[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000778[0:0] = 0x00000000U @@ -2620,7 +2620,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000778[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF800077C[0:0] = 0x00000000U @@ -2649,7 +2649,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800077C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000780[0:0] = 0x00000000U @@ -2678,7 +2678,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000780[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000784[0:0] = 0x00000000U @@ -2707,7 +2707,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000784[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000788[0:0] = 0x00000001U @@ -2736,7 +2736,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000788[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 0 // .. ==> 0XF800078C[0:0] = 0x00000000U @@ -2765,7 +2765,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800078C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001660U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000790[0:0] = 0x00000001U @@ -2794,7 +2794,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000790[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000794[0:0] = 0x00000001U @@ -2823,7 +2823,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000794[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000798[0:0] = 0x00000001U @@ -2852,7 +2852,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000798[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00000661U), // .. TRI_ENABLE = 0 // .. ==> 0XF800079C[0:0] = 0x00000000U @@ -2881,7 +2881,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800079C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00000660U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007A0[0:0] = 0x00000000U @@ -2910,7 +2910,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007A4[0:0] = 0x00000001U @@ -2939,7 +2939,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007A8[0:0] = 0x00000000U @@ -2968,7 +2968,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007AC[0:0] = 0x00000001U @@ -2997,7 +2997,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007AC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B0[0:0] = 0x00000000U @@ -3026,7 +3026,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B4[0:0] = 0x00000000U @@ -3055,7 +3055,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B8[0:0] = 0x00000000U @@ -3084,7 +3084,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007BC[0:0] = 0x00000000U @@ -3113,7 +3113,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007BC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007C0[0:0] = 0x00000001U @@ -3142,7 +3142,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007C4[0:0] = 0x00000000U @@ -3171,7 +3171,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007C8[0:0] = 0x00000000U @@ -3200,7 +3200,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007CC[0:0] = 0x00000000U @@ -3229,7 +3229,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007CC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007D0[0:0] = 0x00000000U @@ -3258,7 +3258,7 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007D0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00000640U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007D4[0:0] = 0x00000000U @@ -3287,14 +3287,14 @@ unsigned long ps7_mio_init_data_3_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007D4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00000640U), // .. FINISH: MIO PROGRAMMING // .. START: LOCK IT BACK // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -3310,7 +3310,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS @@ -3320,7 +3320,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B48[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B4C[7:7] = 0x00000001U @@ -3328,7 +3328,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B4C[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B50[7:7] = 0x00000001U @@ -3336,7 +3336,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B50[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B54[7:7] = 0x00000001U @@ -3344,14 +3344,14 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B54[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000180U), // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS // .. START: LOCK IT BACK // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // .. START: SRAM/NOR SET OPMODE @@ -3360,12 +3360,12 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. BDIV = 0x6 // .. ==> 0XE0001034[7:0] = 0x00000006U // .. ==> MASK : 0x000000FFU VAL : 0x00000006U - // .. + // .. EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U), // .. CD = 0x3e // .. ==> 0XE0001018[15:0] = 0x0000003EU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000003EU - // .. + // .. EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000003EU), // .. STPBRK = 0x0 // .. ==> 0XE0001000[8:8] = 0x00000000U @@ -3394,7 +3394,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. RXRES = 0x1 // .. ==> 0XE0001000[0:0] = 0x00000001U // .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. + // .. EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U), // .. CHMODE = 0x0 // .. ==> 0XE0001004[9:8] = 0x00000000U @@ -3411,21 +3411,21 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. CLKS = 0x0 // .. ==> 0XE0001004[0:0] = 0x00000000U // .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XE0001004, 0x000003FFU ,0x00000020U), // .. FINISH: UART REGISTERS // .. START: QSPI REGISTERS // .. Holdb_dr = 1 // .. ==> 0XE000D000[19:19] = 0x00000001U // .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. + // .. EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U), // .. FINISH: QSPI REGISTERS // .. START: PL POWER ON RESET REGISTERS // .. PCFG_POR_CNT_4K = 0 // .. ==> 0XF8007000[29:29] = 0x00000000U // .. ==> MASK : 0x20000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U), // .. FINISH: PL POWER ON RESET REGISTERS // .. START: SMC TIMING CALCULATION REGISTER UPDATE @@ -3451,14 +3451,14 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. Set_t6 = 0x2 // .. .. ==> 0XE000E014[23:20] = 0x00000002U // .. .. ==> MASK : 0x00F00000U VAL : 0x00200000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E014, 0x00FFFFFFU ,0x00245A55U), // .. .. FINISH: NAND SET CYCLE // .. .. START: OPMODE // .. .. set_mw = 0x0 // .. .. ==> 0XE000E018[1:0] = 0x00000000U // .. .. ==> MASK : 0x00000003U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E018, 0x00000003U ,0x00000000U), // .. .. FINISH: OPMODE // .. .. START: DIRECT COMMAND @@ -3468,7 +3468,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. cmd_type = 0x2 // .. .. ==> 0XE000E010[22:21] = 0x00000002U // .. .. ==> MASK : 0x00600000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E010, 0x03E00000U ,0x02400000U), // .. .. FINISH: DIRECT COMMAND // .. .. START: SRAM/NOR CS0 SET CYCLE @@ -3510,7 +3510,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -3548,7 +3548,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -3588,7 +3588,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -3626,7 +3626,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -3666,7 +3666,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -3704,7 +3704,7 @@ unsigned long ps7_peripherals_init_data_3_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -3739,7 +3739,7 @@ unsigned long ps7_post_config_3_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: ENABLING LEVEL SHIFTER @@ -3755,7 +3755,7 @@ unsigned long ps7_post_config_3_0[] = { // .. USER_LVL_OUT_EN_1 = 1 // .. ==> 0XF8000900[0:0] = 0x00000001U // .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. + // .. EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU), // .. FINISH: ENABLING LEVEL SHIFTER // .. START: FPGA RESETS TO 0 @@ -3822,7 +3822,7 @@ unsigned long ps7_post_config_3_0[] = { // .. FPGA0_OUT_RST = 0 // .. ==> 0XF8000240[0:0] = 0x00000000U // .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U), // .. FINISH: FPGA RESETS TO 0 // .. START: AFI REGISTERS @@ -3841,7 +3841,7 @@ unsigned long ps7_post_config_3_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -3858,17 +3858,17 @@ unsigned long ps7_debug_3_0[] = { // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. FINISH: UNLOCKING CTI REGISTERS // .. .. START: ENABLING CTI MODULES AND CHANNELS @@ -3889,7 +3889,7 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: PLL SLCR REGISTERS @@ -3903,48 +3903,48 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. .. LOCK_CNT = 0xfa // .. .. ==> 0XF8000110[21:12] = 0x000000FAU // .. .. ==> MASK : 0x003FF000U VAL : 0x000FA000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x000FA220U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x28 // .. .. .. ==> 0XF8000100[18:12] = 0x00000028U // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00028000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x00028000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. ARM_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000001U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. .. SRCSEL = 0x0 @@ -3968,7 +3968,7 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. .. .. CPU_PERI_CLKACT = 0x1 // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U), // .. .. FINISH: ARM PLL INIT // .. .. START: DDR PLL INIT @@ -3981,48 +3981,48 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. .. LOCK_CNT = 0x12c // .. .. ==> 0XF8000114[21:12] = 0x0000012CU // .. .. ==> MASK : 0x003FF000U VAL : 0x0012C000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x0012C220U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x20 // .. .. .. ==> 0XF8000104[18:12] = 0x00000020U // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00020000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00020000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. DDR_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000002U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. .. DDR_3XCLKACT = 0x1 @@ -4037,7 +4037,7 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. .. .. DDR_2XCLK_DIVISOR = 0x3 // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U), // .. .. FINISH: DDR PLL INIT // .. .. START: IO PLL INIT @@ -4050,48 +4050,48 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. .. LOCK_CNT = 0x145 // .. .. ==> 0XF8000118[21:12] = 0x00000145U // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x001452C0U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x1e // .. .. .. ==> 0XF8000108[18:12] = 0x0000001EU // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x0001E000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. IO_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000004U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. FINISH: IO PLL INIT @@ -4100,7 +4100,7 @@ unsigned long ps7_pll_init_data_2_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -4116,7 +4116,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: CLOCK CONTROL SLCR REGISTERS @@ -4129,7 +4129,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. DIVISOR1 = 0x7 // .. ==> 0XF8000128[25:20] = 0x00000007U // .. ==> MASK : 0x03F00000U VAL : 0x00700000U - // .. + // .. EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00700F01U), // .. CLKACT = 0x1 // .. ==> 0XF8000148[0:0] = 0x00000001U @@ -4140,7 +4140,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. DIVISOR = 0xa // .. ==> 0XF8000148[13:8] = 0x0000000AU // .. ==> MASK : 0x00003F00U VAL : 0x00000A00U - // .. + // .. EMIT_MASKWRITE(0XF8000148, 0x00003F31U ,0x00000A01U), // .. CLKACT0 = 0x0 // .. ==> 0XF8000154[0:0] = 0x00000000U @@ -4154,7 +4154,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. DIVISOR = 0x14 // .. ==> 0XF8000154[13:8] = 0x00000014U // .. ==> MASK : 0x00003F00U VAL : 0x00001400U - // .. + // .. EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001402U), // .. CLKACT0 = 0x1 // .. ==> 0XF8000158[0:0] = 0x00000001U @@ -4168,7 +4168,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. DIVISOR = 0x6 // .. ==> 0XF8000158[13:8] = 0x00000006U // .. ==> MASK : 0x00003F00U VAL : 0x00000600U - // .. + // .. EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000601U), // .. CLKACT0 = 0x1 // .. ==> 0XF800015C[0:0] = 0x00000001U @@ -4185,7 +4185,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. DIVISOR1 = 0x6 // .. ==> 0XF800015C[25:20] = 0x00000006U // .. ==> MASK : 0x03F00000U VAL : 0x00600000U - // .. + // .. EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00600701U), // .. CAN0_MUX = 0x0 // .. ==> 0XF8000160[5:0] = 0x00000000U @@ -4199,7 +4199,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. CAN1_REF_SEL = 0x0 // .. ==> 0XF8000160[22:22] = 0x00000000U // .. ==> MASK : 0x00400000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U), // .. .. START: TRACE CLOCK // .. .. FINISH: TRACE CLOCK @@ -4212,7 +4212,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. .. DIVISOR = 0x5 // .. .. ==> 0XF8000168[13:8] = 0x00000005U // .. .. ==> MASK : 0x00003F00U VAL : 0x00000500U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000501U), // .. .. SRCSEL = 0x0 // .. .. ==> 0XF8000170[5:4] = 0x00000000U @@ -4223,12 +4223,12 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. .. DIVISOR1 = 0x4 // .. .. ==> 0XF8000170[25:20] = 0x00000004U // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00400500U), // .. .. CLK_621_TRUE = 0x1 // .. .. ==> 0XF80001C4[0:0] = 0x00000001U // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U), // .. .. DMA_CPU_2XCLKACT = 0x1 // .. .. ==> 0XF800012C[0:0] = 0x00000001U @@ -4284,12 +4284,12 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. .. SMC_CPU_1XCLKACT = 0x1 // .. .. ==> 0XF800012C[24:24] = 0x00000001U // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x016D400DU), // .. .. SEL = 0x0 // .. .. ==> 0XF8000304[0:0] = 0x00000000U // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000304, 0x00000001U ,0x00000000U), // .. FINISH: CLOCK CONTROL SLCR REGISTERS // .. START: THIS SHOULD BE BLANK @@ -4298,7 +4298,7 @@ unsigned long ps7_clock_init_data_2_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -4336,7 +4336,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dis_auto_refresh = 0x0 // .. .. ==> 0XF8006000[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000080U), // .. .. FINISH: LOCK DDR // .. .. reg_ddrc_t_rfc_nom_x32 = 0x81 @@ -4363,7 +4363,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_addrmap_4bank_ram = 0x0 // .. .. ==> 0XF8006004[28:28] = 0x00000000U // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006004, 0x1FFFFFFFU ,0x00081081U), // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf // .. .. ==> 0XF8006008[10:0] = 0x0000000FU @@ -4374,7 +4374,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_hpr_xact_run_length = 0xf // .. .. ==> 0XF8006008[25:22] = 0x0000000FU // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU), // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1 // .. .. ==> 0XF800600C[10:0] = 0x00000001U @@ -4385,7 +4385,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_lpr_xact_run_length = 0x8 // .. .. ==> 0XF800600C[25:22] = 0x00000008U // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U), // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1 // .. .. ==> 0XF8006010[10:0] = 0x00000001U @@ -4396,7 +4396,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_w_max_starve_x32 = 0x2 // .. .. ==> 0XF8006010[25:15] = 0x00000002U // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U), // .. .. reg_ddrc_t_rc = 0x1b // .. .. ==> 0XF8006014[5:0] = 0x0000001BU @@ -4407,7 +4407,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10 // .. .. ==> 0XF8006014[20:14] = 0x00000010U // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x0004159BU), // .. .. reg_ddrc_wr2pre = 0x12 // .. .. ==> 0XF8006018[4:0] = 0x00000012U @@ -4427,7 +4427,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_cke = 0x4 // .. .. ==> 0XF8006018[31:28] = 0x00000004U // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44E438D2U), // .. .. reg_ddrc_write_latency = 0x5 // .. .. ==> 0XF800601C[4:0] = 0x00000005U @@ -4450,7 +4450,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_rcd = 0x7 // .. .. ==> 0XF800601C[31:28] = 0x00000007U // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U), // .. .. reg_ddrc_t_ccd = 0x4 // .. .. ==> 0XF8006020[4:2] = 0x00000004U @@ -4488,7 +4488,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_loopback = 0x0 // .. .. ==> 0XF8006020[31:31] = 0x00000000U // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006020, 0xFFFFFFFCU ,0x27287290U), // .. .. reg_ddrc_en_2t_timing_mode = 0x0 // .. .. ==> 0XF8006024[0:0] = 0x00000000U @@ -4517,7 +4517,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_mr_rdata_valid = 0x0 // .. .. ==> 0XF8006024[27:27] = 0x00000000U // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006024, 0x0FFFFFFFU ,0x0000003CU), // .. .. reg_ddrc_final_wait_x32 = 0x7 // .. .. ==> 0XF8006028[6:0] = 0x00000007U @@ -4528,7 +4528,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_mrd = 0x4 // .. .. ==> 0XF8006028[13:11] = 0x00000004U // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U), // .. .. reg_ddrc_emr2 = 0x8 // .. .. ==> 0XF800602C[15:0] = 0x00000008U @@ -4536,7 +4536,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_emr3 = 0x0 // .. .. ==> 0XF800602C[31:16] = 0x00000000U // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U), // .. .. reg_ddrc_mr = 0x930 // .. .. ==> 0XF8006030[15:0] = 0x00000930U @@ -4544,7 +4544,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_emr = 0x4 // .. .. ==> 0XF8006030[31:16] = 0x00000004U // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U), // .. .. reg_ddrc_burst_rdwr = 0x4 // .. .. ==> 0XF8006034[3:0] = 0x00000004U @@ -4558,7 +4558,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_burstchop = 0x0 // .. .. ==> 0XF8006034[28:28] = 0x00000000U // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x000116D4U), // .. .. reg_ddrc_force_low_pri_n = 0x0 // .. .. ==> 0XF8006038[0:0] = 0x00000000U @@ -4578,7 +4578,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_dq0_wait_t = 0x0 // .. .. ==> 0XF8006038[12:9] = 0x00000000U // .. .. ==> MASK : 0x00001E00U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006038, 0x00001FC3U ,0x00000000U), // .. .. reg_ddrc_addrmap_bank_b0 = 0x7 // .. .. ==> 0XF800603C[3:0] = 0x00000007U @@ -4595,7 +4595,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_addrmap_col_b6 = 0x0 // .. .. ==> 0XF800603C[19:16] = 0x00000000U // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000777U), // .. .. reg_ddrc_addrmap_col_b2 = 0x0 // .. .. ==> 0XF8006040[3:0] = 0x00000000U @@ -4621,7 +4621,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_addrmap_col_b11 = 0xf // .. .. ==> 0XF8006040[31:28] = 0x0000000FU // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFF00000U), // .. .. reg_ddrc_addrmap_row_b0 = 0x6 // .. .. ==> 0XF8006044[3:0] = 0x00000006U @@ -4644,7 +4644,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_addrmap_row_b15 = 0xf // .. .. ==> 0XF8006044[27:24] = 0x0000000FU // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0F666666U), // .. .. reg_ddrc_rank0_rd_odt = 0x0 // .. .. ==> 0XF8006048[2:0] = 0x00000000U @@ -4679,7 +4679,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_rank3_wr_odt = 0x0 // .. .. ==> 0XF8006048[29:27] = 0x00000000U // .. .. ==> MASK : 0x38000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006048, 0x3FFFFFFFU ,0x0003C248U), // .. .. reg_phy_rd_cmd_to_data = 0x0 // .. .. ==> 0XF8006050[3:0] = 0x00000000U @@ -4711,7 +4711,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7 // .. .. ==> 0XF8006050[31:28] = 0x00000007U // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U), // .. .. reg_ddrc_dll_calib_to_min_x1024 = 0x1 // .. .. ==> 0XF8006058[7:0] = 0x00000001U @@ -4722,7 +4722,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dis_dll_calib = 0x0 // .. .. ==> 0XF8006058[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006058, 0x0001FFFFU ,0x00000101U), // .. .. reg_ddrc_rd_odt_delay = 0x3 // .. .. ==> 0XF800605C[3:0] = 0x00000003U @@ -4736,7 +4736,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_wr_odt_hold = 0x5 // .. .. ==> 0XF800605C[15:12] = 0x00000005U // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U), // .. .. reg_ddrc_pageclose = 0x0 // .. .. ==> 0XF8006060[0:0] = 0x00000000U @@ -4759,7 +4759,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_selfref_en = 0x0 // .. .. ==> 0XF8006060[12:12] = 0x00000000U // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU), // .. .. reg_ddrc_go2critical_hysteresis = 0x0 // .. .. ==> 0XF8006064[12:5] = 0x00000000U @@ -4767,7 +4767,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_go2critical_en = 0x1 // .. .. ==> 0XF8006064[17:17] = 0x00000001U // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U), // .. .. reg_ddrc_wrlvl_ww = 0x41 // .. .. ==> 0XF8006068[7:0] = 0x00000041U @@ -4778,7 +4778,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dfi_t_wlmrd = 0x28 // .. .. ==> 0XF8006068[25:16] = 0x00000028U // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U), // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10 // .. .. ==> 0XF800606C[7:0] = 0x00000010U @@ -4786,7 +4786,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16 // .. .. ==> 0XF800606C[15:8] = 0x00000016U // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U), // .. .. reg_ddrc_dfi_t_ctrl_delay = 0x1 // .. .. ==> 0XF8006078[3:0] = 0x00000001U @@ -4806,7 +4806,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_ckesr = 0x4 // .. .. ==> 0XF8006078[25:20] = 0x00000004U // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU ,0x00466111U), // .. .. reg_ddrc_t_ckpde = 0x2 // .. .. ==> 0XF800607C[3:0] = 0x00000002U @@ -4823,7 +4823,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_ckcsx = 0x3 // .. .. ==> 0XF800607C[19:16] = 0x00000003U // .. .. ==> MASK : 0x000F0000U VAL : 0x00030000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU ,0x00032222U), // .. .. refresh_timer0_start_value_x32 = 0x0 // .. .. ==> 0XF80060A0[11:0] = 0x00000000U @@ -4831,7 +4831,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. refresh_timer1_start_value_x32 = 0x8 // .. .. ==> 0XF80060A0[23:12] = 0x00000008U // .. .. ==> MASK : 0x00FFF000U VAL : 0x00008000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A0, 0x00FFFFFFU ,0x00008000U), // .. .. reg_ddrc_dis_auto_zq = 0x0 // .. .. ==> 0XF80060A4[0:0] = 0x00000000U @@ -4848,7 +4848,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_zq_short_nop = 0x40 // .. .. ==> 0XF80060A4[31:22] = 0x00000040U // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U), // .. .. t_zq_short_interval_x1024 = 0xcb73 // .. .. ==> 0XF80060A8[19:0] = 0x0000CB73U @@ -4856,7 +4856,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. dram_rstn_x1024 = 0x69 // .. .. ==> 0XF80060A8[27:20] = 0x00000069U // .. .. ==> MASK : 0x0FF00000U VAL : 0x06900000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0690CB73U), // .. .. deeppowerdown_en = 0x0 // .. .. ==> 0XF80060AC[0:0] = 0x00000000U @@ -4864,7 +4864,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. deeppowerdown_to_x1024 = 0xff // .. .. ==> 0XF80060AC[8:1] = 0x000000FFU // .. .. ==> MASK : 0x000001FEU VAL : 0x000001FEU - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001FEU), // .. .. dfi_wrlvl_max_x1024 = 0xfff // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU @@ -4887,7 +4887,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1 // .. .. ==> 0XF80060B0[28:28] = 0x00000001U // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU), // .. .. reg_ddrc_2t_delay = 0x0 // .. .. ==> 0XF80060B4[8:0] = 0x00000000U @@ -4898,7 +4898,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dis_pre_bypass = 0x0 // .. .. ==> 0XF80060B4[10:10] = 0x00000000U // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B4, 0x000007FFU ,0x00000200U), // .. .. reg_ddrc_dfi_t_rddata_en = 0x6 // .. .. ==> 0XF80060B8[4:0] = 0x00000006U @@ -4909,7 +4909,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40 // .. .. ==> 0XF80060B8[24:15] = 0x00000040U // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U), // .. .. START: RESET ECC ERROR // .. .. Clear_Uncorrectable_DRAM_ECC_error = 1 @@ -4918,7 +4918,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. Clear_Correctable_DRAM_ECC_error = 1 // .. .. ==> 0XF80060C4[1:1] = 0x00000001U // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000003U), // .. .. FINISH: RESET ECC ERROR // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0 @@ -4927,7 +4927,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. Clear_Correctable_DRAM_ECC_error = 0x0 // .. .. ==> 0XF80060C4[1:1] = 0x00000000U // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U), // .. .. CORR_ECC_LOG_VALID = 0x0 // .. .. ==> 0XF80060C8[0:0] = 0x00000000U @@ -4935,12 +4935,12 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. ECC_CORRECTED_BIT_NUM = 0x0 // .. .. ==> 0XF80060C8[7:1] = 0x00000000U // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U), // .. .. UNCORR_ECC_LOG_VALID = 0x0 // .. .. ==> 0XF80060DC[0:0] = 0x00000000U // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U), // .. .. STAT_NUM_CORR_ERR = 0x0 // .. .. ==> 0XF80060F0[15:8] = 0x00000000U @@ -4948,7 +4948,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. STAT_NUM_UNCORR_ERR = 0x0 // .. .. ==> 0XF80060F0[7:0] = 0x00000000U // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U), // .. .. reg_ddrc_ecc_mode = 0x0 // .. .. ==> 0XF80060F4[2:0] = 0x00000000U @@ -4956,7 +4956,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dis_scrub = 0x1 // .. .. ==> 0XF80060F4[3:3] = 0x00000001U // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U), // .. .. reg_phy_dif_on = 0x0 // .. .. ==> 0XF8006114[3:0] = 0x00000000U @@ -4964,7 +4964,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_dif_off = 0x0 // .. .. ==> 0XF8006114[7:4] = 0x00000000U // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006118[0:0] = 0x00000001U @@ -4993,7 +4993,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006118[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006118, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF800611C[0:0] = 0x00000001U @@ -5022,7 +5022,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF800611C[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800611C, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006120[0:0] = 0x00000001U @@ -5078,7 +5078,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006120[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006120, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006124[0:0] = 0x00000001U @@ -5107,7 +5107,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006124[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006124, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_wrlvl_init_ratio = 0x1b // .. .. ==> 0XF800612C[9:0] = 0x0000001BU @@ -5115,7 +5115,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe7 // .. .. ==> 0XF800612C[19:10] = 0x000000E7U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00039C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00039C1BU), // .. .. reg_phy_wrlvl_init_ratio = 0x35 // .. .. ==> 0XF8006130[9:0] = 0x00000035U @@ -5123,7 +5123,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xdf // .. .. ==> 0XF8006130[19:10] = 0x000000DFU // .. .. ==> MASK : 0x000FFC00U VAL : 0x00037C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00037C35U), // .. .. reg_phy_wrlvl_init_ratio = 0x2f // .. .. ==> 0XF8006134[9:0] = 0x0000002FU @@ -5131,7 +5131,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe5 // .. .. ==> 0XF8006134[19:10] = 0x000000E5U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00039400U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x0003942FU), // .. .. reg_phy_wrlvl_init_ratio = 0x1f // .. .. ==> 0XF8006138[9:0] = 0x0000001FU @@ -5139,7 +5139,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe3 // .. .. ==> 0XF8006138[19:10] = 0x000000E3U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00038C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00038C1FU), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006140[9:0] = 0x00000035U @@ -5150,7 +5150,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006140[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006144[9:0] = 0x00000035U @@ -5161,7 +5161,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006144[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006148[9:0] = 0x00000035U @@ -5172,7 +5172,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006148[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF800614C[9:0] = 0x00000035U @@ -5183,7 +5183,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF800614C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_wr_dqs_slave_ratio = 0x9b // .. .. ==> 0XF8006154[9:0] = 0x0000009BU @@ -5194,7 +5194,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006154[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x0000009BU), // .. .. reg_phy_wr_dqs_slave_ratio = 0xb5 // .. .. ==> 0XF8006158[9:0] = 0x000000B5U @@ -5205,7 +5205,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006158[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x000000B5U), // .. .. reg_phy_wr_dqs_slave_ratio = 0xaf // .. .. ==> 0XF800615C[9:0] = 0x000000AFU @@ -5216,7 +5216,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF800615C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x000000AFU), // .. .. reg_phy_wr_dqs_slave_ratio = 0x9f // .. .. ==> 0XF8006160[9:0] = 0x0000009FU @@ -5227,7 +5227,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006160[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x0000009FU), // .. .. reg_phy_fifo_we_slave_ratio = 0x13c // .. .. ==> 0XF8006168[10:0] = 0x0000013CU @@ -5238,7 +5238,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006168[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x0000013CU), // .. .. reg_phy_fifo_we_slave_ratio = 0x134 // .. .. ==> 0XF800616C[10:0] = 0x00000134U @@ -5249,7 +5249,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF800616C[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x00000134U), // .. .. reg_phy_fifo_we_slave_ratio = 0x13a // .. .. ==> 0XF8006170[10:0] = 0x0000013AU @@ -5260,7 +5260,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006170[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x0000013AU), // .. .. reg_phy_fifo_we_slave_ratio = 0x138 // .. .. ==> 0XF8006174[10:0] = 0x00000138U @@ -5271,7 +5271,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006174[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x00000138U), // .. .. reg_phy_wr_data_slave_ratio = 0xdb // .. .. ==> 0XF800617C[9:0] = 0x000000DBU @@ -5282,7 +5282,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF800617C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000DBU), // .. .. reg_phy_wr_data_slave_ratio = 0xf5 // .. .. ==> 0XF8006180[9:0] = 0x000000F5U @@ -5293,7 +5293,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006180[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000F5U), // .. .. reg_phy_wr_data_slave_ratio = 0xef // .. .. ==> 0XF8006184[9:0] = 0x000000EFU @@ -5304,7 +5304,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006184[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000EFU), // .. .. reg_phy_wr_data_slave_ratio = 0xdf // .. .. ==> 0XF8006188[9:0] = 0x000000DFU @@ -5315,7 +5315,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006188[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000DFU), // .. .. reg_phy_loopback = 0x0 // .. .. ==> 0XF8006190[0:0] = 0x00000000U @@ -5365,7 +5365,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_int_lpbk = 0x0 // .. .. ==> 0XF8006190[31:31] = 0x00000000U // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006190, 0xFFFFFFFFU ,0x10040080U), // .. .. reg_phy_wr_rl_delay = 0x2 // .. .. ==> 0XF8006194[4:0] = 0x00000002U @@ -5391,12 +5391,12 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_phy_ctrl_slave_delay = 0x0 // .. .. ==> 0XF8006194[19:18] = 0x00000000U // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U), // .. .. reg_arb_page_addr_mask = 0x0 // .. .. ==> 0XF8006204[31:0] = 0x00000000U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006208[9:0] = 0x000003FFU @@ -5413,7 +5413,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF8006208[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006208, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF800620C[9:0] = 0x000003FFU @@ -5430,7 +5430,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF800620C[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800620C, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006210[9:0] = 0x000003FFU @@ -5447,7 +5447,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF8006210[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006210, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006214[9:0] = 0x000003FFU @@ -5464,7 +5464,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF8006214[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006214, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006218[9:0] = 0x000003FFU @@ -5481,7 +5481,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006218[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF800621C[9:0] = 0x000003FFU @@ -5498,7 +5498,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF800621C[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006220[9:0] = 0x000003FFU @@ -5515,7 +5515,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006220[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006224[9:0] = 0x000003FFU @@ -5532,7 +5532,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006224[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU), // .. .. reg_ddrc_lpddr2 = 0x0 // .. .. ==> 0XF80062A8[0:0] = 0x00000000U @@ -5546,12 +5546,12 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_mr4_margin = 0x0 // .. .. ==> 0XF80062A8[11:4] = 0x00000000U // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062A8, 0x00000FF7U ,0x00000000U), // .. .. reg_ddrc_mr4_read_interval = 0x0 // .. .. ==> 0XF80062AC[31:0] = 0x00000000U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U), // .. .. reg_ddrc_min_stable_clock_x1 = 0x5 // .. .. ==> 0XF80062B0[3:0] = 0x00000005U @@ -5562,7 +5562,7 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_t_mrw = 0x5 // .. .. ==> 0XF80062B0[21:12] = 0x00000005U // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005125U), // .. .. reg_ddrc_max_auto_init_x1024 = 0xa8 // .. .. ==> 0XF80062B4[7:0] = 0x000000A8U @@ -5570,13 +5570,13 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dev_zqinit_x32 = 0x12 // .. .. ==> 0XF80062B4[17:8] = 0x00000012U // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001200U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x000012A8U), // .. .. START: POLL ON DCI STATUS // .. .. DONE = 1 // .. .. ==> 0XF8000B74[13:13] = 0x00000001U // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U - // .. .. + // .. .. EMIT_MASKPOLL(0XF8000B74, 0x00002000U), // .. .. FINISH: POLL ON DCI STATUS // .. .. START: UNLOCK DDR @@ -5604,14 +5604,14 @@ unsigned long ps7_ddr_init_data_2_0[] = { // .. .. reg_ddrc_dis_auto_refresh = 0x0 // .. .. ==> 0XF8006000[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000081U), // .. .. FINISH: UNLOCK DDR // .. .. START: CHECK DDR STATUS // .. .. ddrc_reg_operating_mode = 1 // .. .. ==> 0XF8006054[2:0] = 0x00000001U // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKPOLL(0XF8006054, 0x00000007U), // .. .. FINISH: CHECK DDR STATUS // .. FINISH: DDR INITIALIZATION @@ -5628,7 +5628,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: OCM REMAPPING @@ -5661,7 +5661,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B40[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B44[0:0] = 0x00000000U @@ -5690,7 +5690,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B44[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B48[0:0] = 0x00000000U @@ -5719,7 +5719,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B48[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B4C[0:0] = 0x00000000U @@ -5748,7 +5748,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B4C[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000672U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B50[0:0] = 0x00000000U @@ -5777,7 +5777,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B50[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B54[0:0] = 0x00000000U @@ -5806,7 +5806,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B54[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000674U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B58[0:0] = 0x00000000U @@ -5835,7 +5835,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B58[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B5C[6:0] = 0x0000001CU @@ -5855,7 +5855,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B5C[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C61CU), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B60[6:0] = 0x0000001CU @@ -5875,7 +5875,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B60[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F9861CU), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B64[6:0] = 0x0000001CU @@ -5895,7 +5895,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B64[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F9861CU), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B68[6:0] = 0x0000001CU @@ -5915,7 +5915,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B68[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F9861CU), // .. VREF_INT_EN = 0x1 // .. ==> 0XF8000B6C[0:0] = 0x00000001U @@ -5944,7 +5944,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. CKE_PULLUP_EN = 0x0 // .. ==> 0XF8000B6C[14:14] = 0x00000000U // .. ==> MASK : 0x00004000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B6C, 0x00007FFFU ,0x00000209U), // .. .. START: ASSERT RESET // .. .. RESET = 1 @@ -5953,7 +5953,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. .. VRN_OUT = 0x1 // .. .. ==> 0XF8000B70[5:5] = 0x00000001U // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000021U), // .. .. FINISH: ASSERT RESET // .. .. START: DEASSERT RESET @@ -5963,7 +5963,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. .. VRN_OUT = 0x1 // .. .. ==> 0XF8000B70[5:5] = 0x00000001U // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U), // .. .. FINISH: DEASSERT RESET // .. .. RESET = 0x1 @@ -6020,7 +6020,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. .. INT_DCI_EN = 0x0 // .. .. ==> 0XF8000B70[26:26] = 0x00000000U // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x07FFFFFFU ,0x00000823U), // .. FINISH: DDRIOB SETTINGS // .. START: MIO PROGRAMMING @@ -6051,7 +6051,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000700[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000708[0:0] = 0x00000000U @@ -6080,7 +6080,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000708[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800070C[0:0] = 0x00000000U @@ -6109,7 +6109,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800070C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000710[0:0] = 0x00000000U @@ -6138,7 +6138,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000710[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000714[0:0] = 0x00000000U @@ -6167,7 +6167,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000714[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000718[0:0] = 0x00000000U @@ -6196,7 +6196,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000718[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800071C[0:0] = 0x00000000U @@ -6225,7 +6225,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800071C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000720[0:0] = 0x00000000U @@ -6254,7 +6254,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000720[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000724[0:0] = 0x00000000U @@ -6283,7 +6283,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000724[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000724, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000728[0:0] = 0x00000000U @@ -6312,7 +6312,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000728[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800072C[0:0] = 0x00000000U @@ -6341,7 +6341,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800072C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000730[0:0] = 0x00000000U @@ -6370,7 +6370,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000730[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000734[0:0] = 0x00000000U @@ -6399,7 +6399,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000734[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000738[0:0] = 0x00000001U @@ -6428,7 +6428,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000738[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00000611U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000760[0:0] = 0x00000000U @@ -6457,7 +6457,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000760[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x000006E0U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000764[0:0] = 0x00000001U @@ -6486,7 +6486,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000764[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x000006E1U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000768[0:0] = 0x00000001U @@ -6515,7 +6515,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000768[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00000621U), // .. TRI_ENABLE = 0 // .. ==> 0XF800076C[0:0] = 0x00000000U @@ -6544,7 +6544,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800076C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00000620U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000770[0:0] = 0x00000000U @@ -6573,7 +6573,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000770[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000774[0:0] = 0x00000000U @@ -6602,7 +6602,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000774[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000778[0:0] = 0x00000000U @@ -6631,7 +6631,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000778[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF800077C[0:0] = 0x00000000U @@ -6660,7 +6660,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800077C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000780[0:0] = 0x00000000U @@ -6689,7 +6689,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000780[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000784[0:0] = 0x00000000U @@ -6718,7 +6718,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000784[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000788[0:0] = 0x00000001U @@ -6747,7 +6747,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000788[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 0 // .. ==> 0XF800078C[0:0] = 0x00000000U @@ -6776,7 +6776,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800078C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001660U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000790[0:0] = 0x00000001U @@ -6805,7 +6805,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000790[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000794[0:0] = 0x00000001U @@ -6834,7 +6834,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000794[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000798[0:0] = 0x00000001U @@ -6863,7 +6863,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000798[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00000661U), // .. TRI_ENABLE = 0 // .. ==> 0XF800079C[0:0] = 0x00000000U @@ -6892,7 +6892,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800079C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00000660U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007A0[0:0] = 0x00000000U @@ -6921,7 +6921,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007A4[0:0] = 0x00000001U @@ -6950,7 +6950,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007A8[0:0] = 0x00000000U @@ -6979,7 +6979,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007AC[0:0] = 0x00000001U @@ -7008,7 +7008,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007AC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B0[0:0] = 0x00000000U @@ -7037,7 +7037,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B4[0:0] = 0x00000000U @@ -7066,7 +7066,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B8[0:0] = 0x00000000U @@ -7095,7 +7095,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007BC[0:0] = 0x00000000U @@ -7124,7 +7124,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007BC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007C0[0:0] = 0x00000001U @@ -7153,7 +7153,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007C4[0:0] = 0x00000000U @@ -7182,7 +7182,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007C8[0:0] = 0x00000000U @@ -7211,7 +7211,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007CC[0:0] = 0x00000000U @@ -7240,7 +7240,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007CC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007D0[0:0] = 0x00000000U @@ -7269,7 +7269,7 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007D0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00000640U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007D4[0:0] = 0x00000000U @@ -7298,14 +7298,14 @@ unsigned long ps7_mio_init_data_2_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007D4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00000640U), // .. FINISH: MIO PROGRAMMING // .. START: LOCK IT BACK // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -7321,7 +7321,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS @@ -7331,7 +7331,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B48[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B4C[7:7] = 0x00000001U @@ -7339,7 +7339,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B4C[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B50[7:7] = 0x00000001U @@ -7347,7 +7347,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B50[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B54[7:7] = 0x00000001U @@ -7355,14 +7355,14 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B54[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000180U), // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS // .. START: LOCK IT BACK // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // .. START: SRAM/NOR SET OPMODE @@ -7371,12 +7371,12 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. BDIV = 0x6 // .. ==> 0XE0001034[7:0] = 0x00000006U // .. ==> MASK : 0x000000FFU VAL : 0x00000006U - // .. + // .. EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U), // .. CD = 0x3e // .. ==> 0XE0001018[15:0] = 0x0000003EU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000003EU - // .. + // .. EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000003EU), // .. STPBRK = 0x0 // .. ==> 0XE0001000[8:8] = 0x00000000U @@ -7405,7 +7405,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. RXRES = 0x1 // .. ==> 0XE0001000[0:0] = 0x00000001U // .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. + // .. EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U), // .. IRMODE = 0x0 // .. ==> 0XE0001004[11:11] = 0x00000000U @@ -7428,21 +7428,21 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. CLKS = 0x0 // .. ==> 0XE0001004[0:0] = 0x00000000U // .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XE0001004, 0x00000FFFU ,0x00000020U), // .. FINISH: UART REGISTERS // .. START: QSPI REGISTERS // .. Holdb_dr = 1 // .. ==> 0XE000D000[19:19] = 0x00000001U // .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. + // .. EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U), // .. FINISH: QSPI REGISTERS // .. START: PL POWER ON RESET REGISTERS // .. PCFG_POR_CNT_4K = 0 // .. ==> 0XF8007000[29:29] = 0x00000000U // .. ==> MASK : 0x20000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U), // .. FINISH: PL POWER ON RESET REGISTERS // .. START: SMC TIMING CALCULATION REGISTER UPDATE @@ -7468,14 +7468,14 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. Set_t6 = 0x2 // .. .. ==> 0XE000E014[23:20] = 0x00000002U // .. .. ==> MASK : 0x00F00000U VAL : 0x00200000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E014, 0x00FFFFFFU ,0x00245A55U), // .. .. FINISH: NAND SET CYCLE // .. .. START: OPMODE // .. .. set_mw = 0x0 // .. .. ==> 0XE000E018[1:0] = 0x00000000U // .. .. ==> MASK : 0x00000003U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E018, 0x00000003U ,0x00000000U), // .. .. FINISH: OPMODE // .. .. START: DIRECT COMMAND @@ -7485,7 +7485,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. cmd_type = 0x2 // .. .. ==> 0XE000E010[22:21] = 0x00000002U // .. .. ==> MASK : 0x00600000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E010, 0x03E00000U ,0x02400000U), // .. .. FINISH: DIRECT COMMAND // .. .. START: SRAM/NOR CS0 SET CYCLE @@ -7527,7 +7527,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -7565,7 +7565,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -7605,7 +7605,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -7643,7 +7643,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -7683,7 +7683,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -7721,7 +7721,7 @@ unsigned long ps7_peripherals_init_data_2_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -7756,7 +7756,7 @@ unsigned long ps7_post_config_2_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: ENABLING LEVEL SHIFTER @@ -7766,7 +7766,7 @@ unsigned long ps7_post_config_2_0[] = { // .. USER_INP_ICT_EN_1 = 3 // .. ==> 0XF8000900[3:2] = 0x00000003U // .. ==> MASK : 0x0000000CU VAL : 0x0000000CU - // .. + // .. EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU), // .. FINISH: ENABLING LEVEL SHIFTER // .. START: FPGA RESETS TO 0 @@ -7833,7 +7833,7 @@ unsigned long ps7_post_config_2_0[] = { // .. FPGA0_OUT_RST = 0 // .. ==> 0XF8000240[0:0] = 0x00000000U // .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U), // .. FINISH: FPGA RESETS TO 0 // .. START: AFI REGISTERS @@ -7850,7 +7850,7 @@ unsigned long ps7_post_config_2_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -7867,17 +7867,17 @@ unsigned long ps7_debug_2_0[] = { // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. FINISH: UNLOCKING CTI REGISTERS // .. .. START: ENABLING CTI MODULES AND CHANNELS @@ -7898,7 +7898,7 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: PLL SLCR REGISTERS @@ -7912,48 +7912,48 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. .. LOCK_CNT = 0xfa // .. .. ==> 0XF8000110[21:12] = 0x000000FAU // .. .. ==> MASK : 0x003FF000U VAL : 0x000FA000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x000FA220U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x28 // .. .. .. ==> 0XF8000100[18:12] = 0x00000028U // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00028000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x00028000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. ARM_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000001U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. .. SRCSEL = 0x0 @@ -7977,7 +7977,7 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. .. .. CPU_PERI_CLKACT = 0x1 // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U), // .. .. FINISH: ARM PLL INIT // .. .. START: DDR PLL INIT @@ -7990,48 +7990,48 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. .. LOCK_CNT = 0x12c // .. .. ==> 0XF8000114[21:12] = 0x0000012CU // .. .. ==> MASK : 0x003FF000U VAL : 0x0012C000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x0012C220U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x20 // .. .. .. ==> 0XF8000104[18:12] = 0x00000020U // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00020000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00020000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. DDR_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000002U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. .. DDR_3XCLKACT = 0x1 @@ -8046,7 +8046,7 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. .. .. DDR_2XCLK_DIVISOR = 0x3 // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U), // .. .. FINISH: DDR PLL INIT // .. .. START: IO PLL INIT @@ -8059,48 +8059,48 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. .. LOCK_CNT = 0x145 // .. .. ==> 0XF8000118[21:12] = 0x00000145U // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x001452C0U), // .. .. .. START: UPDATE FB_DIV // .. .. .. PLL_FDIV = 0x1e // .. .. .. ==> 0XF8000108[18:12] = 0x0000001EU // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x0001E000U), // .. .. .. FINISH: UPDATE FB_DIV // .. .. .. START: BY PASS PLL // .. .. .. PLL_BYPASS_FORCE = 1 // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U), // .. .. .. FINISH: BY PASS PLL // .. .. .. START: ASSERT RESET // .. .. .. PLL_RESET = 1 // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U), // .. .. .. FINISH: ASSERT RESET // .. .. .. START: DEASSERT RESET // .. .. .. PLL_RESET = 0 // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U), // .. .. .. FINISH: DEASSERT RESET // .. .. .. START: CHECK PLL STATUS // .. .. .. IO_PLL_LOCK = 1 // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U - // .. .. .. + // .. .. .. EMIT_MASKPOLL(0XF800010C, 0x00000004U), // .. .. .. FINISH: CHECK PLL STATUS // .. .. .. START: REMOVE PLL BY PASS // .. .. .. PLL_BYPASS_FORCE = 0 // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U - // .. .. .. + // .. .. .. EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U), // .. .. .. FINISH: REMOVE PLL BY PASS // .. .. FINISH: IO PLL INIT @@ -8109,7 +8109,7 @@ unsigned long ps7_pll_init_data_1_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -8125,7 +8125,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: CLOCK CONTROL SLCR REGISTERS @@ -8138,7 +8138,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. DIVISOR1 = 0x7 // .. ==> 0XF8000128[25:20] = 0x00000007U // .. ==> MASK : 0x03F00000U VAL : 0x00700000U - // .. + // .. EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00700F01U), // .. CLKACT = 0x1 // .. ==> 0XF8000148[0:0] = 0x00000001U @@ -8149,7 +8149,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. DIVISOR = 0xa // .. ==> 0XF8000148[13:8] = 0x0000000AU // .. ==> MASK : 0x00003F00U VAL : 0x00000A00U - // .. + // .. EMIT_MASKWRITE(0XF8000148, 0x00003F31U ,0x00000A01U), // .. CLKACT0 = 0x0 // .. ==> 0XF8000154[0:0] = 0x00000000U @@ -8163,7 +8163,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. DIVISOR = 0x14 // .. ==> 0XF8000154[13:8] = 0x00000014U // .. ==> MASK : 0x00003F00U VAL : 0x00001400U - // .. + // .. EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001402U), // .. CLKACT0 = 0x1 // .. ==> 0XF8000158[0:0] = 0x00000001U @@ -8177,7 +8177,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. DIVISOR = 0x6 // .. ==> 0XF8000158[13:8] = 0x00000006U // .. ==> MASK : 0x00003F00U VAL : 0x00000600U - // .. + // .. EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000601U), // .. CLKACT0 = 0x1 // .. ==> 0XF800015C[0:0] = 0x00000001U @@ -8194,7 +8194,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. DIVISOR1 = 0x6 // .. ==> 0XF800015C[25:20] = 0x00000006U // .. ==> MASK : 0x03F00000U VAL : 0x00600000U - // .. + // .. EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00600701U), // .. CAN0_MUX = 0x0 // .. ==> 0XF8000160[5:0] = 0x00000000U @@ -8208,7 +8208,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. CAN1_REF_SEL = 0x0 // .. ==> 0XF8000160[22:22] = 0x00000000U // .. ==> MASK : 0x00400000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U), // .. .. START: TRACE CLOCK // .. .. FINISH: TRACE CLOCK @@ -8221,7 +8221,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. .. DIVISOR = 0x5 // .. .. ==> 0XF8000168[13:8] = 0x00000005U // .. .. ==> MASK : 0x00003F00U VAL : 0x00000500U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000501U), // .. .. SRCSEL = 0x0 // .. .. ==> 0XF8000170[5:4] = 0x00000000U @@ -8232,12 +8232,12 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. .. DIVISOR1 = 0x4 // .. .. ==> 0XF8000170[25:20] = 0x00000004U // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00400500U), // .. .. CLK_621_TRUE = 0x1 // .. .. ==> 0XF80001C4[0:0] = 0x00000001U // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U), // .. .. DMA_CPU_2XCLKACT = 0x1 // .. .. ==> 0XF800012C[0:0] = 0x00000001U @@ -8293,12 +8293,12 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. .. SMC_CPU_1XCLKACT = 0x1 // .. .. ==> 0XF800012C[24:24] = 0x00000001U // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x016D400DU), // .. .. SEL = 0x0 // .. .. ==> 0XF8000304[0:0] = 0x00000000U // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000304, 0x00000001U ,0x00000000U), // .. FINISH: CLOCK CONTROL SLCR REGISTERS // .. START: THIS SHOULD BE BLANK @@ -8307,7 +8307,7 @@ unsigned long ps7_clock_init_data_1_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -8345,7 +8345,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dis_auto_refresh = 0x0 // .. .. ==> 0XF8006000[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000080U), // .. .. FINISH: LOCK DDR // .. .. reg_ddrc_t_rfc_nom_x32 = 0x81 @@ -8372,7 +8372,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_addrmap_4bank_ram = 0x0 // .. .. ==> 0XF8006004[28:28] = 0x00000000U // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006004, 0x1FFFFFFFU ,0x00081081U), // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf // .. .. ==> 0XF8006008[10:0] = 0x0000000FU @@ -8383,7 +8383,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_hpr_xact_run_length = 0xf // .. .. ==> 0XF8006008[25:22] = 0x0000000FU // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU), // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1 // .. .. ==> 0XF800600C[10:0] = 0x00000001U @@ -8394,7 +8394,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_lpr_xact_run_length = 0x8 // .. .. ==> 0XF800600C[25:22] = 0x00000008U // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U), // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1 // .. .. ==> 0XF8006010[10:0] = 0x00000001U @@ -8405,7 +8405,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_w_max_starve_x32 = 0x2 // .. .. ==> 0XF8006010[25:15] = 0x00000002U // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U), // .. .. reg_ddrc_t_rc = 0x1b // .. .. ==> 0XF8006014[5:0] = 0x0000001BU @@ -8416,7 +8416,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10 // .. .. ==> 0XF8006014[20:14] = 0x00000010U // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x0004159BU), // .. .. reg_ddrc_wr2pre = 0x12 // .. .. ==> 0XF8006018[4:0] = 0x00000012U @@ -8436,7 +8436,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_t_cke = 0x4 // .. .. ==> 0XF8006018[31:28] = 0x00000004U // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44E438D2U), // .. .. reg_ddrc_write_latency = 0x5 // .. .. ==> 0XF800601C[4:0] = 0x00000005U @@ -8459,7 +8459,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_t_rcd = 0x7 // .. .. ==> 0XF800601C[31:28] = 0x00000007U // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U), // .. .. reg_ddrc_t_ccd = 0x4 // .. .. ==> 0XF8006020[4:2] = 0x00000004U @@ -8497,7 +8497,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_loopback = 0x0 // .. .. ==> 0XF8006020[31:31] = 0x00000000U // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006020, 0xFFFFFFFCU ,0x27287290U), // .. .. reg_ddrc_en_2t_timing_mode = 0x0 // .. .. ==> 0XF8006024[0:0] = 0x00000000U @@ -8526,7 +8526,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_mr_rdata_valid = 0x0 // .. .. ==> 0XF8006024[27:27] = 0x00000000U // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006024, 0x0FFFFFFFU ,0x0000003CU), // .. .. reg_ddrc_final_wait_x32 = 0x7 // .. .. ==> 0XF8006028[6:0] = 0x00000007U @@ -8537,7 +8537,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_t_mrd = 0x4 // .. .. ==> 0XF8006028[13:11] = 0x00000004U // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U), // .. .. reg_ddrc_emr2 = 0x8 // .. .. ==> 0XF800602C[15:0] = 0x00000008U @@ -8545,7 +8545,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_emr3 = 0x0 // .. .. ==> 0XF800602C[31:16] = 0x00000000U // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U), // .. .. reg_ddrc_mr = 0x930 // .. .. ==> 0XF8006030[15:0] = 0x00000930U @@ -8553,7 +8553,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_emr = 0x4 // .. .. ==> 0XF8006030[31:16] = 0x00000004U // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U), // .. .. reg_ddrc_burst_rdwr = 0x4 // .. .. ==> 0XF8006034[3:0] = 0x00000004U @@ -8567,7 +8567,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_burstchop = 0x0 // .. .. ==> 0XF8006034[28:28] = 0x00000000U // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x000116D4U), // .. .. reg_ddrc_force_low_pri_n = 0x0 // .. .. ==> 0XF8006038[0:0] = 0x00000000U @@ -8587,7 +8587,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_dq0_wait_t = 0x0 // .. .. ==> 0XF8006038[12:9] = 0x00000000U // .. .. ==> MASK : 0x00001E00U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006038, 0x00001FC3U ,0x00000000U), // .. .. reg_ddrc_addrmap_bank_b0 = 0x7 // .. .. ==> 0XF800603C[3:0] = 0x00000007U @@ -8604,7 +8604,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_addrmap_col_b6 = 0x0 // .. .. ==> 0XF800603C[19:16] = 0x00000000U // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000777U), // .. .. reg_ddrc_addrmap_col_b2 = 0x0 // .. .. ==> 0XF8006040[3:0] = 0x00000000U @@ -8630,7 +8630,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_addrmap_col_b11 = 0xf // .. .. ==> 0XF8006040[31:28] = 0x0000000FU // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFF00000U), // .. .. reg_ddrc_addrmap_row_b0 = 0x6 // .. .. ==> 0XF8006044[3:0] = 0x00000006U @@ -8653,7 +8653,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_addrmap_row_b15 = 0xf // .. .. ==> 0XF8006044[27:24] = 0x0000000FU // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0F666666U), // .. .. reg_ddrc_rank0_rd_odt = 0x0 // .. .. ==> 0XF8006048[2:0] = 0x00000000U @@ -8688,7 +8688,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_rank3_wr_odt = 0x0 // .. .. ==> 0XF8006048[29:27] = 0x00000000U // .. .. ==> MASK : 0x38000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006048, 0x3FFFFFFFU ,0x0003C248U), // .. .. reg_phy_rd_cmd_to_data = 0x0 // .. .. ==> 0XF8006050[3:0] = 0x00000000U @@ -8720,7 +8720,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7 // .. .. ==> 0XF8006050[31:28] = 0x00000007U // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U), // .. .. reg_ddrc_dll_calib_to_min_x1024 = 0x1 // .. .. ==> 0XF8006058[7:0] = 0x00000001U @@ -8731,7 +8731,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dis_dll_calib = 0x0 // .. .. ==> 0XF8006058[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006058, 0x0001FFFFU ,0x00000101U), // .. .. reg_ddrc_rd_odt_delay = 0x3 // .. .. ==> 0XF800605C[3:0] = 0x00000003U @@ -8745,7 +8745,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_wr_odt_hold = 0x5 // .. .. ==> 0XF800605C[15:12] = 0x00000005U // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U), // .. .. reg_ddrc_pageclose = 0x0 // .. .. ==> 0XF8006060[0:0] = 0x00000000U @@ -8768,7 +8768,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_selfref_en = 0x0 // .. .. ==> 0XF8006060[12:12] = 0x00000000U // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU), // .. .. reg_ddrc_go2critical_hysteresis = 0x0 // .. .. ==> 0XF8006064[12:5] = 0x00000000U @@ -8776,7 +8776,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_go2critical_en = 0x1 // .. .. ==> 0XF8006064[17:17] = 0x00000001U // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U), // .. .. reg_ddrc_wrlvl_ww = 0x41 // .. .. ==> 0XF8006068[7:0] = 0x00000041U @@ -8787,7 +8787,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dfi_t_wlmrd = 0x28 // .. .. ==> 0XF8006068[25:16] = 0x00000028U // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U), // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10 // .. .. ==> 0XF800606C[7:0] = 0x00000010U @@ -8795,7 +8795,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16 // .. .. ==> 0XF800606C[15:8] = 0x00000016U // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U), // .. .. refresh_timer0_start_value_x32 = 0x0 // .. .. ==> 0XF80060A0[11:0] = 0x00000000U @@ -8803,7 +8803,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. refresh_timer1_start_value_x32 = 0x8 // .. .. ==> 0XF80060A0[23:12] = 0x00000008U // .. .. ==> MASK : 0x00FFF000U VAL : 0x00008000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A0, 0x00FFFFFFU ,0x00008000U), // .. .. reg_ddrc_dis_auto_zq = 0x0 // .. .. ==> 0XF80060A4[0:0] = 0x00000000U @@ -8820,7 +8820,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_t_zq_short_nop = 0x40 // .. .. ==> 0XF80060A4[31:22] = 0x00000040U // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U), // .. .. t_zq_short_interval_x1024 = 0xcb73 // .. .. ==> 0XF80060A8[19:0] = 0x0000CB73U @@ -8828,7 +8828,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. dram_rstn_x1024 = 0x69 // .. .. ==> 0XF80060A8[27:20] = 0x00000069U // .. .. ==> MASK : 0x0FF00000U VAL : 0x06900000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0690CB73U), // .. .. deeppowerdown_en = 0x0 // .. .. ==> 0XF80060AC[0:0] = 0x00000000U @@ -8836,7 +8836,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. deeppowerdown_to_x1024 = 0xff // .. .. ==> 0XF80060AC[8:1] = 0x000000FFU // .. .. ==> MASK : 0x000001FEU VAL : 0x000001FEU - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001FEU), // .. .. dfi_wrlvl_max_x1024 = 0xfff // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU @@ -8859,7 +8859,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1 // .. .. ==> 0XF80060B0[28:28] = 0x00000001U // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU), // .. .. reg_ddrc_2t_delay = 0x0 // .. .. ==> 0XF80060B4[8:0] = 0x00000000U @@ -8870,7 +8870,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dis_pre_bypass = 0x0 // .. .. ==> 0XF80060B4[10:10] = 0x00000000U // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B4, 0x000007FFU ,0x00000200U), // .. .. reg_ddrc_dfi_t_rddata_en = 0x6 // .. .. ==> 0XF80060B8[4:0] = 0x00000006U @@ -8881,7 +8881,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40 // .. .. ==> 0XF80060B8[24:15] = 0x00000040U // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U), // .. .. START: RESET ECC ERROR // .. .. Clear_Uncorrectable_DRAM_ECC_error = 1 @@ -8890,7 +8890,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. Clear_Correctable_DRAM_ECC_error = 1 // .. .. ==> 0XF80060C4[1:1] = 0x00000001U // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000003U), // .. .. FINISH: RESET ECC ERROR // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0 @@ -8899,7 +8899,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. Clear_Correctable_DRAM_ECC_error = 0x0 // .. .. ==> 0XF80060C4[1:1] = 0x00000000U // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U), // .. .. CORR_ECC_LOG_VALID = 0x0 // .. .. ==> 0XF80060C8[0:0] = 0x00000000U @@ -8907,12 +8907,12 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. ECC_CORRECTED_BIT_NUM = 0x0 // .. .. ==> 0XF80060C8[7:1] = 0x00000000U // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U), // .. .. UNCORR_ECC_LOG_VALID = 0x0 // .. .. ==> 0XF80060DC[0:0] = 0x00000000U // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U), // .. .. STAT_NUM_CORR_ERR = 0x0 // .. .. ==> 0XF80060F0[15:8] = 0x00000000U @@ -8920,7 +8920,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. STAT_NUM_UNCORR_ERR = 0x0 // .. .. ==> 0XF80060F0[7:0] = 0x00000000U // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U), // .. .. reg_ddrc_ecc_mode = 0x0 // .. .. ==> 0XF80060F4[2:0] = 0x00000000U @@ -8928,7 +8928,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dis_scrub = 0x1 // .. .. ==> 0XF80060F4[3:3] = 0x00000001U // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U), // .. .. reg_phy_dif_on = 0x0 // .. .. ==> 0XF8006114[3:0] = 0x00000000U @@ -8936,7 +8936,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_dif_off = 0x0 // .. .. ==> 0XF8006114[7:4] = 0x00000000U // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006118[0:0] = 0x00000001U @@ -8965,7 +8965,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006118[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006118, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF800611C[0:0] = 0x00000001U @@ -8994,7 +8994,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF800611C[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800611C, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006120[0:0] = 0x00000001U @@ -9023,7 +9023,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006120[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006120, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_data_slice_in_use = 0x1 // .. .. ==> 0XF8006124[0:0] = 0x00000001U @@ -9052,7 +9052,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_dq_offset = 0x40 // .. .. ==> 0XF8006124[30:24] = 0x00000040U // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006124, 0x7FFFFFFFU ,0x40000001U), // .. .. reg_phy_wrlvl_init_ratio = 0x1b // .. .. ==> 0XF800612C[9:0] = 0x0000001BU @@ -9060,7 +9060,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe7 // .. .. ==> 0XF800612C[19:10] = 0x000000E7U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00039C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00039C1BU), // .. .. reg_phy_wrlvl_init_ratio = 0x35 // .. .. ==> 0XF8006130[9:0] = 0x00000035U @@ -9068,7 +9068,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xdf // .. .. ==> 0XF8006130[19:10] = 0x000000DFU // .. .. ==> MASK : 0x000FFC00U VAL : 0x00037C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00037C35U), // .. .. reg_phy_wrlvl_init_ratio = 0x2f // .. .. ==> 0XF8006134[9:0] = 0x0000002FU @@ -9076,7 +9076,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe5 // .. .. ==> 0XF8006134[19:10] = 0x000000E5U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00039400U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x0003942FU), // .. .. reg_phy_wrlvl_init_ratio = 0x1f // .. .. ==> 0XF8006138[9:0] = 0x0000001FU @@ -9084,7 +9084,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_gatelvl_init_ratio = 0xe3 // .. .. ==> 0XF8006138[19:10] = 0x000000E3U // .. .. ==> MASK : 0x000FFC00U VAL : 0x00038C00U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00038C1FU), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006140[9:0] = 0x00000035U @@ -9095,7 +9095,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006140[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006144[9:0] = 0x00000035U @@ -9106,7 +9106,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006144[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF8006148[9:0] = 0x00000035U @@ -9117,7 +9117,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006148[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_rd_dqs_slave_ratio = 0x35 // .. .. ==> 0XF800614C[9:0] = 0x00000035U @@ -9128,7 +9128,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_rd_dqs_slave_delay = 0x0 // .. .. ==> 0XF800614C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U), // .. .. reg_phy_wr_dqs_slave_ratio = 0x9b // .. .. ==> 0XF8006154[9:0] = 0x0000009BU @@ -9139,7 +9139,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006154[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x0000009BU), // .. .. reg_phy_wr_dqs_slave_ratio = 0xb5 // .. .. ==> 0XF8006158[9:0] = 0x000000B5U @@ -9150,7 +9150,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006158[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x000000B5U), // .. .. reg_phy_wr_dqs_slave_ratio = 0xaf // .. .. ==> 0XF800615C[9:0] = 0x000000AFU @@ -9161,7 +9161,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF800615C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x000000AFU), // .. .. reg_phy_wr_dqs_slave_ratio = 0x9f // .. .. ==> 0XF8006160[9:0] = 0x0000009FU @@ -9172,7 +9172,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_dqs_slave_delay = 0x0 // .. .. ==> 0XF8006160[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x0000009FU), // .. .. reg_phy_fifo_we_slave_ratio = 0x13c // .. .. ==> 0XF8006168[10:0] = 0x0000013CU @@ -9183,7 +9183,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006168[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x0000013CU), // .. .. reg_phy_fifo_we_slave_ratio = 0x134 // .. .. ==> 0XF800616C[10:0] = 0x00000134U @@ -9194,7 +9194,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF800616C[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x00000134U), // .. .. reg_phy_fifo_we_slave_ratio = 0x13a // .. .. ==> 0XF8006170[10:0] = 0x0000013AU @@ -9205,7 +9205,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006170[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x0000013AU), // .. .. reg_phy_fifo_we_slave_ratio = 0x138 // .. .. ==> 0XF8006174[10:0] = 0x00000138U @@ -9216,7 +9216,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_fifo_we_in_delay = 0x0 // .. .. ==> 0XF8006174[20:12] = 0x00000000U // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x00000138U), // .. .. reg_phy_wr_data_slave_ratio = 0xdb // .. .. ==> 0XF800617C[9:0] = 0x000000DBU @@ -9227,7 +9227,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF800617C[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000DBU), // .. .. reg_phy_wr_data_slave_ratio = 0xf5 // .. .. ==> 0XF8006180[9:0] = 0x000000F5U @@ -9238,7 +9238,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006180[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000F5U), // .. .. reg_phy_wr_data_slave_ratio = 0xef // .. .. ==> 0XF8006184[9:0] = 0x000000EFU @@ -9249,7 +9249,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006184[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000EFU), // .. .. reg_phy_wr_data_slave_ratio = 0xdf // .. .. ==> 0XF8006188[9:0] = 0x000000DFU @@ -9260,7 +9260,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_wr_data_slave_delay = 0x0 // .. .. ==> 0XF8006188[19:11] = 0x00000000U // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000DFU), // .. .. reg_phy_loopback = 0x0 // .. .. ==> 0XF8006190[0:0] = 0x00000000U @@ -9310,7 +9310,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_int_lpbk = 0x0 // .. .. ==> 0XF8006190[31:31] = 0x00000000U // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006190, 0xFFFFFFFFU ,0x10040080U), // .. .. reg_phy_wr_rl_delay = 0x2 // .. .. ==> 0XF8006194[4:0] = 0x00000002U @@ -9336,12 +9336,12 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_phy_ctrl_slave_delay = 0x0 // .. .. ==> 0XF8006194[19:18] = 0x00000000U // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U), // .. .. reg_arb_page_addr_mask = 0x0 // .. .. ==> 0XF8006204[31:0] = 0x00000000U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006208[9:0] = 0x000003FFU @@ -9358,7 +9358,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF8006208[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006208, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF800620C[9:0] = 0x000003FFU @@ -9375,7 +9375,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF800620C[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800620C, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006210[9:0] = 0x000003FFU @@ -9392,7 +9392,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF8006210[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006210, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_wr_portn = 0x3ff // .. .. ==> 0XF8006214[9:0] = 0x000003FFU @@ -9409,7 +9409,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_dis_rmw_portn = 0x1 // .. .. ==> 0XF8006214[19:19] = 0x00000001U // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006214, 0x000F03FFU ,0x000803FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006218[9:0] = 0x000003FFU @@ -9426,7 +9426,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006218[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF800621C[9:0] = 0x000003FFU @@ -9443,7 +9443,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF800621C[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006220[9:0] = 0x000003FFU @@ -9460,7 +9460,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006220[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU), // .. .. reg_arb_pri_rd_portn = 0x3ff // .. .. ==> 0XF8006224[9:0] = 0x000003FFU @@ -9477,7 +9477,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_arb_set_hpr_rd_portn = 0x0 // .. .. ==> 0XF8006224[19:19] = 0x00000000U // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU), // .. .. reg_ddrc_lpddr2 = 0x0 // .. .. ==> 0XF80062A8[0:0] = 0x00000000U @@ -9491,12 +9491,12 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_mr4_margin = 0x0 // .. .. ==> 0XF80062A8[11:4] = 0x00000000U // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062A8, 0x00000FF7U ,0x00000000U), // .. .. reg_ddrc_mr4_read_interval = 0x0 // .. .. ==> 0XF80062AC[31:0] = 0x00000000U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U), // .. .. reg_ddrc_min_stable_clock_x1 = 0x5 // .. .. ==> 0XF80062B0[3:0] = 0x00000005U @@ -9507,7 +9507,7 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_t_mrw = 0x5 // .. .. ==> 0XF80062B0[21:12] = 0x00000005U // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005125U), // .. .. reg_ddrc_max_auto_init_x1024 = 0xa8 // .. .. ==> 0XF80062B4[7:0] = 0x000000A8U @@ -9515,13 +9515,13 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dev_zqinit_x32 = 0x12 // .. .. ==> 0XF80062B4[17:8] = 0x00000012U // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001200U - // .. .. + // .. .. EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x000012A8U), // .. .. START: POLL ON DCI STATUS // .. .. DONE = 1 // .. .. ==> 0XF8000B74[13:13] = 0x00000001U // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U - // .. .. + // .. .. EMIT_MASKPOLL(0XF8000B74, 0x00002000U), // .. .. FINISH: POLL ON DCI STATUS // .. .. START: UNLOCK DDR @@ -9549,14 +9549,14 @@ unsigned long ps7_ddr_init_data_1_0[] = { // .. .. reg_ddrc_dis_auto_refresh = 0x0 // .. .. ==> 0XF8006000[16:16] = 0x00000000U // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000081U), // .. .. FINISH: UNLOCK DDR // .. .. START: CHECK DDR STATUS // .. .. ddrc_reg_operating_mode = 1 // .. .. ==> 0XF8006054[2:0] = 0x00000001U // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U - // .. .. + // .. .. EMIT_MASKPOLL(0XF8006054, 0x00000007U), // .. .. FINISH: CHECK DDR STATUS // .. FINISH: DDR INITIALIZATION @@ -9573,7 +9573,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: OCM REMAPPING @@ -9606,7 +9606,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B40[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B44[0:0] = 0x00000000U @@ -9635,7 +9635,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B44[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B48[0:0] = 0x00000000U @@ -9664,7 +9664,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B48[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B4C[0:0] = 0x00000000U @@ -9693,7 +9693,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B4C[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000672U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B50[0:0] = 0x00000000U @@ -9722,7 +9722,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B50[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B54[0:0] = 0x00000000U @@ -9751,7 +9751,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B54[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000674U), // .. INP_POWER = 0x0 // .. ==> 0XF8000B58[0:0] = 0x00000000U @@ -9780,7 +9780,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. PULLUP_EN = 0x0 // .. ==> 0XF8000B58[11:11] = 0x00000000U // .. ==> MASK : 0x00000800U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B5C[6:0] = 0x0000001CU @@ -9800,7 +9800,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B5C[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C61CU), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B60[6:0] = 0x0000001CU @@ -9820,7 +9820,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B60[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F9861CU), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B64[6:0] = 0x0000001CU @@ -9840,7 +9840,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B64[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F9861CU), // .. DRIVE_P = 0x1c // .. ==> 0XF8000B68[6:0] = 0x0000001CU @@ -9860,7 +9860,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. RTERM = 0x0 // .. ==> 0XF8000B68[31:27] = 0x00000000U // .. ==> MASK : 0xF8000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F9861CU), // .. VREF_INT_EN = 0x1 // .. ==> 0XF8000B6C[0:0] = 0x00000001U @@ -9886,7 +9886,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. CKE_PULLUP_EN = 0x0 // .. ==> 0XF8000B6C[14:14] = 0x00000000U // .. ==> MASK : 0x00004000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000B6C, 0x000073FFU ,0x00000209U), // .. .. START: ASSERT RESET // .. .. RESET = 1 @@ -9895,7 +9895,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. .. VRN_OUT = 0x1 // .. .. ==> 0XF8000B70[5:5] = 0x00000001U // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000021U), // .. .. FINISH: ASSERT RESET // .. .. START: DEASSERT RESET @@ -9905,7 +9905,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. .. VRN_OUT = 0x1 // .. .. ==> 0XF8000B70[5:5] = 0x00000001U // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U), // .. .. FINISH: DEASSERT RESET // .. .. RESET = 0x1 @@ -9962,7 +9962,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. .. INT_DCI_EN = 0x0 // .. .. ==> 0XF8000B70[26:26] = 0x00000000U // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8000B70, 0x07FFFFFFU ,0x00000823U), // .. FINISH: DDRIOB SETTINGS // .. START: MIO PROGRAMMING @@ -9993,7 +9993,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000700[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000708[0:0] = 0x00000000U @@ -10022,7 +10022,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000708[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800070C[0:0] = 0x00000000U @@ -10051,7 +10051,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800070C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000710[0:0] = 0x00000000U @@ -10080,7 +10080,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000710[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000714[0:0] = 0x00000000U @@ -10109,7 +10109,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000714[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000718[0:0] = 0x00000000U @@ -10138,7 +10138,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000718[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800071C[0:0] = 0x00000000U @@ -10167,7 +10167,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800071C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000720[0:0] = 0x00000000U @@ -10196,7 +10196,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000720[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000724[0:0] = 0x00000000U @@ -10225,7 +10225,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000724[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000724, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000728[0:0] = 0x00000000U @@ -10254,7 +10254,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000728[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF800072C[0:0] = 0x00000000U @@ -10283,7 +10283,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800072C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000730[0:0] = 0x00000000U @@ -10312,7 +10312,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000730[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000734[0:0] = 0x00000000U @@ -10341,7 +10341,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000734[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00000610U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000738[0:0] = 0x00000001U @@ -10370,7 +10370,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000738[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00000611U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000760[0:0] = 0x00000000U @@ -10399,7 +10399,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000760[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x000006E0U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000764[0:0] = 0x00000001U @@ -10428,7 +10428,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000764[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x000006E1U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000768[0:0] = 0x00000001U @@ -10457,7 +10457,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000768[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00000621U), // .. TRI_ENABLE = 0 // .. ==> 0XF800076C[0:0] = 0x00000000U @@ -10486,7 +10486,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800076C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00000620U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000770[0:0] = 0x00000000U @@ -10515,7 +10515,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000770[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000774[0:0] = 0x00000000U @@ -10544,7 +10544,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000774[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000778[0:0] = 0x00000000U @@ -10573,7 +10573,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000778[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF800077C[0:0] = 0x00000000U @@ -10602,7 +10602,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800077C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000780[0:0] = 0x00000000U @@ -10631,7 +10631,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000780[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 0 // .. ==> 0XF8000784[0:0] = 0x00000000U @@ -10660,7 +10660,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000784[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x000016A0U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000788[0:0] = 0x00000001U @@ -10689,7 +10689,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000788[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 0 // .. ==> 0XF800078C[0:0] = 0x00000000U @@ -10718,7 +10718,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800078C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001660U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000790[0:0] = 0x00000001U @@ -10747,7 +10747,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000790[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000794[0:0] = 0x00000001U @@ -10776,7 +10776,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000794[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001661U), // .. TRI_ENABLE = 1 // .. ==> 0XF8000798[0:0] = 0x00000001U @@ -10805,7 +10805,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF8000798[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00000661U), // .. TRI_ENABLE = 0 // .. ==> 0XF800079C[0:0] = 0x00000000U @@ -10834,7 +10834,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF800079C[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00000660U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007A0[0:0] = 0x00000000U @@ -10863,7 +10863,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007A4[0:0] = 0x00000001U @@ -10892,7 +10892,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007A8[0:0] = 0x00000000U @@ -10921,7 +10921,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007A8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007AC[0:0] = 0x00000001U @@ -10950,7 +10950,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007AC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B0[0:0] = 0x00000000U @@ -10979,7 +10979,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B4[0:0] = 0x00000000U @@ -11008,7 +11008,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007B8[0:0] = 0x00000000U @@ -11037,7 +11037,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007B8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007BC[0:0] = 0x00000000U @@ -11066,7 +11066,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007BC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 1 // .. ==> 0XF80007C0[0:0] = 0x00000001U @@ -11095,7 +11095,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x00000705U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007C4[0:0] = 0x00000000U @@ -11124,7 +11124,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007C8[0:0] = 0x00000000U @@ -11153,7 +11153,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007C8[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007CC[0:0] = 0x00000000U @@ -11182,7 +11182,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007CC[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00000704U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007D0[0:0] = 0x00000000U @@ -11211,7 +11211,7 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007D0[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00000640U), // .. TRI_ENABLE = 0 // .. ==> 0XF80007D4[0:0] = 0x00000000U @@ -11240,14 +11240,14 @@ unsigned long ps7_mio_init_data_1_0[] = { // .. DisableRcvr = 0 // .. ==> 0XF80007D4[13:13] = 0x00000000U // .. ==> MASK : 0x00002000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00000640U), // .. FINISH: MIO PROGRAMMING // .. START: LOCK IT BACK // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -11263,7 +11263,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS @@ -11273,7 +11273,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B48[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B4C[7:7] = 0x00000001U @@ -11281,7 +11281,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B4C[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B50[7:7] = 0x00000001U @@ -11289,7 +11289,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B50[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U), // .. IBUF_DISABLE_MODE = 0x1 // .. ==> 0XF8000B54[7:7] = 0x00000001U @@ -11297,14 +11297,14 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. TERM_DISABLE_MODE = 0x1 // .. ==> 0XF8000B54[8:8] = 0x00000001U // .. ==> MASK : 0x00000100U VAL : 0x00000100U - // .. + // .. EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000180U), // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS // .. START: LOCK IT BACK // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // .. START: SRAM/NOR SET OPMODE @@ -11313,12 +11313,12 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. BDIV = 0x6 // .. ==> 0XE0001034[7:0] = 0x00000006U // .. ==> MASK : 0x000000FFU VAL : 0x00000006U - // .. + // .. EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U), // .. CD = 0x3e // .. ==> 0XE0001018[15:0] = 0x0000003EU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000003EU - // .. + // .. EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000003EU), // .. STPBRK = 0x0 // .. ==> 0XE0001000[8:8] = 0x00000000U @@ -11347,7 +11347,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. RXRES = 0x1 // .. ==> 0XE0001000[0:0] = 0x00000001U // .. ==> MASK : 0x00000001U VAL : 0x00000001U - // .. + // .. EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U), // .. IRMODE = 0x0 // .. ==> 0XE0001004[11:11] = 0x00000000U @@ -11370,21 +11370,21 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. CLKS = 0x0 // .. ==> 0XE0001004[0:0] = 0x00000000U // .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XE0001004, 0x00000FFFU ,0x00000020U), // .. FINISH: UART REGISTERS // .. START: QSPI REGISTERS // .. Holdb_dr = 1 // .. ==> 0XE000D000[19:19] = 0x00000001U // .. ==> MASK : 0x00080000U VAL : 0x00080000U - // .. + // .. EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U), // .. FINISH: QSPI REGISTERS // .. START: PL POWER ON RESET REGISTERS // .. PCFG_POR_CNT_4K = 0 // .. ==> 0XF8007000[29:29] = 0x00000000U // .. ==> MASK : 0x20000000U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U), // .. FINISH: PL POWER ON RESET REGISTERS // .. START: SMC TIMING CALCULATION REGISTER UPDATE @@ -11410,14 +11410,14 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. Set_t6 = 0x2 // .. .. ==> 0XE000E014[23:20] = 0x00000002U // .. .. ==> MASK : 0x00F00000U VAL : 0x00200000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E014, 0x00FFFFFFU ,0x00245A55U), // .. .. FINISH: NAND SET CYCLE // .. .. START: OPMODE // .. .. set_mw = 0x0 // .. .. ==> 0XE000E018[1:0] = 0x00000000U // .. .. ==> MASK : 0x00000003U VAL : 0x00000000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E018, 0x00000003U ,0x00000000U), // .. .. FINISH: OPMODE // .. .. START: DIRECT COMMAND @@ -11427,7 +11427,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. cmd_type = 0x2 // .. .. ==> 0XE000E010[22:21] = 0x00000002U // .. .. ==> MASK : 0x00600000U VAL : 0x00400000U - // .. .. + // .. .. EMIT_MASKWRITE(0XE000E010, 0x03E00000U ,0x02400000U), // .. .. FINISH: DIRECT COMMAND // .. .. START: SRAM/NOR CS0 SET CYCLE @@ -11469,7 +11469,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -11507,7 +11507,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -11547,7 +11547,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -11585,7 +11585,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -11625,7 +11625,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -11663,7 +11663,7 @@ unsigned long ps7_peripherals_init_data_1_0[] = { // .. .. .. .. START: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. FINISH: MASK_DATA_1_MSW LOW BANK [53:48] // .. .. .. .. START: ADD 1 MS DELAY - // .. .. .. .. + // .. .. .. .. EMIT_MASKDELAY(0XF8F00200, 1), // .. .. .. .. FINISH: ADD 1 MS DELAY // .. .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0] @@ -11698,7 +11698,7 @@ unsigned long ps7_post_config_1_0[] = { // .. UNLOCK_KEY = 0XDF0D // .. ==> 0XF8000008[15:0] = 0x0000DF0DU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU - // .. + // .. EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU ,0x0000DF0DU), // .. FINISH: SLCR SETTINGS // .. START: ENABLING LEVEL SHIFTER @@ -11708,7 +11708,7 @@ unsigned long ps7_post_config_1_0[] = { // .. USER_INP_ICT_EN_1 = 3 // .. ==> 0XF8000900[3:2] = 0x00000003U // .. ==> MASK : 0x0000000CU VAL : 0x0000000CU - // .. + // .. EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU), // .. FINISH: ENABLING LEVEL SHIFTER // .. START: FPGA RESETS TO 0 @@ -11775,7 +11775,7 @@ unsigned long ps7_post_config_1_0[] = { // .. FPGA0_OUT_RST = 0 // .. ==> 0XF8000240[0:0] = 0x00000000U // .. ==> MASK : 0x00000001U VAL : 0x00000000U - // .. + // .. EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U), // .. FINISH: FPGA RESETS TO 0 // .. START: AFI REGISTERS @@ -11792,7 +11792,7 @@ unsigned long ps7_post_config_1_0[] = { // .. LOCK_KEY = 0X767B // .. ==> 0XF8000004[15:0] = 0x0000767BU // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU - // .. + // .. EMIT_MASKWRITE(0XF8000004, 0x0000FFFFU ,0x0000767BU), // .. FINISH: LOCK IT BACK // FINISH: top @@ -11809,17 +11809,17 @@ unsigned long ps7_debug_1_0[] = { // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. KEY = 0XC5ACCE55 // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U - // .. .. + // .. .. EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U), // .. .. FINISH: UNLOCKING CTI REGISTERS // .. .. START: ENABLING CTI MODULES AND CHANNELS @@ -11851,15 +11851,15 @@ getPS7MessageInfo(unsigned key) { case PS7_POLL_FAILED_PLL: err_msg = "Mask Poll failed for DMA done bit"; break; default: err_msg = "Undefined error status"; break; } - - return err_msg; + + return err_msg; } unsigned long ps7GetSiliconVersion () { // Read PS version from MCTRL register [31:28] unsigned long mask = 0xF0000000; - unsigned long *addr = (unsigned long*) 0XF8007080; + unsigned long *addr = (unsigned long*) 0XF8007080; unsigned long ps_version = (*addr & mask) >> 28; return ps_version; } @@ -11880,7 +11880,7 @@ int mask_poll(unsigned long add , unsigned long mask ) { } i++; } - return 1; + return 1; //xil_printf("MaskPoll : 0x%x --> 0x%x \n \r" , add, *addr); } @@ -11894,7 +11894,7 @@ unsigned long mask_read(unsigned long add , unsigned long mask ) { int -ps7_config(unsigned long * ps7_config_init) +ps7_config(unsigned long * ps7_config_init) { unsigned long *ptr = ps7_config_init; @@ -11908,22 +11908,22 @@ ps7_config(unsigned long * ps7_config_init) int finish = -1 ; // loop while this is negative ! int i = 0; // Timeout variable - + while( finish < 0 ) { numargs = ptr[0] & 0xF; opcode = ptr[0] >> 4; - for( j = 0 ; j < numargs ; j ++ ) + for( j = 0 ; j < numargs ; j ++ ) args[j] = ptr[j+1]; ptr += numargs + 1; - - + + switch ( opcode ) { - + case OPCODE_EXIT: finish = PS7_INIT_SUCCESS; break; - + case OPCODE_CLEAR: addr = (unsigned long*) args[0]; *addr = 0; @@ -11958,7 +11958,7 @@ ps7_config(unsigned long * ps7_config_init) addr = (unsigned long*) args[0]; mask = args[1]; int delay = get_number_of_cycles_for_delay(mask); - perf_reset_and_start_timer(); + perf_reset_and_start_timer(); while ((*addr < delay)) { } break; @@ -11977,16 +11977,16 @@ unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0; unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0; int -ps7_post_config() +ps7_post_config() { // Get the PS_VERSION on run time unsigned long si_ver = ps7GetSiliconVersion (); int ret = -1; if (si_ver == PCW_SILICON_VERSION_1) { - ret = ps7_config (ps7_post_config_1_0); + ret = ps7_config (ps7_post_config_1_0); if (ret != PS7_INIT_SUCCESS) return ret; } else if (si_ver == PCW_SILICON_VERSION_2) { - ret = ps7_config (ps7_post_config_2_0); + ret = ps7_config (ps7_post_config_2_0); if (ret != PS7_INIT_SUCCESS) return ret; } else { ret = ps7_config (ps7_post_config_3_0); @@ -11996,16 +11996,16 @@ ps7_post_config() } int -ps7_debug() +ps7_debug() { // Get the PS_VERSION on run time unsigned long si_ver = ps7GetSiliconVersion (); int ret = -1; if (si_ver == PCW_SILICON_VERSION_1) { - ret = ps7_config (ps7_debug_1_0); + ret = ps7_config (ps7_debug_1_0); if (ret != PS7_INIT_SUCCESS) return ret; } else if (si_ver == PCW_SILICON_VERSION_2) { - ret = ps7_config (ps7_debug_2_0); + ret = ps7_config (ps7_debug_2_0); if (ret != PS7_INIT_SUCCESS) return ret; } else { ret = ps7_config (ps7_debug_3_0); @@ -12015,7 +12015,7 @@ ps7_debug() } int -ps7_init() +ps7_init() { // Get the PS_VERSION on run time unsigned long si_ver = ps7GetSiliconVersion (); @@ -12048,11 +12048,11 @@ ps7_init() } // MIO init - ret = ps7_config (ps7_mio_init_data); + ret = ps7_config (ps7_mio_init_data); if (ret != PS7_INIT_SUCCESS) return ret; // PLL init - ret = ps7_config (ps7_pll_init_data); + ret = ps7_config (ps7_pll_init_data); if (ret != PS7_INIT_SUCCESS) return ret; // Clock init @@ -12083,7 +12083,7 @@ ps7_init() *(volatile unsigned int*)SCU_GLOBAL_TIMER_CONTROL = ((1 << 0) | // Timer Enable (1 << 3) | // Auto-increment (0 << 8) // Pre-scale - ); + ); } /* stop timer and reset timer count regs */ @@ -12095,11 +12095,11 @@ ps7_init() } /* Compute mask for given delay in miliseconds*/ -int get_number_of_cycles_for_delay(unsigned int delay) +int get_number_of_cycles_for_delay(unsigned int delay) { // GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x) return (APU_FREQ*delay/(2*1000)); - + } /* stop timer */ @@ -12108,7 +12108,7 @@ int get_number_of_cycles_for_delay(unsigned int delay) *(volatile unsigned int*)SCU_GLOBAL_TIMER_CONTROL = 0; } -void perf_reset_and_start_timer() +void perf_reset_and_start_timer() { perf_reset_clock(); perf_start_clock(); diff --git a/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.h index 3441a89eae0..d51d43b914e 100644 --- a/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.h +++ b/board/xilinx/zynq/zynq-zc770-xm011/ps7_init_gpl.h @@ -8,23 +8,23 @@ * without restriction, including without limitation the rights to use, copy, modify, merge, * publish, distribute, sublicense, and/or sell copies of the Software, and to permit * persons to whom the Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or +* +* The above copyright notice and this permission notice shall be included in all copies or * substantial portions of the Software. -* -* Use of the Software is limited solely to applications: (a) running on a Xilinx device, or -* (b) that interact with a Xilinx device through a bus or interconnect. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* +* Use of the Software is limited solely to applications: (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -* -* Except as contained in this notice, the name of the Xilinx shall not be used in advertising or -* otherwise to promote the sale, use or other dealings in this Software without prior written +* +* Except as contained in this notice, the name of the Xilinx shall not be used in advertising or +* otherwise to promote the sale, use or other dealings in this Software without prior written * authorization from Xilinx. -* +* *******************************************************************************/ /****************************************************************************/ /** @@ -129,8 +129,8 @@ char* getPS7MessageInfo(unsigned key); void perf_start_clock(void); void perf_disable_clock(void); void perf_reset_clock(void); -void perf_reset_and_start_timer(); -int get_number_of_cycles_for_delay(unsigned int delay); +void perf_reset_and_start_timer(); +int get_number_of_cycles_for_delay(unsigned int delay); #ifdef __cplusplus } #endif