From: Tom Hughes <tom@compton.nu>
Date: Sun, 28 Mar 2004 10:33:51 +0000 (+0000)
Subject: Added more floating point instruction tests.
X-Git-Tag: svn/VALGRIND_2_1_2~162
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=3330a9f65b65259872b288d367f3cfaaff3cc332;p=thirdparty%2Fvalgrind.git

Added more floating point instruction tests.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@2343
---

diff --git a/addrcheck/tests/insn_fpu.stdout.exp b/addrcheck/tests/insn_fpu.stdout.exp
index 6933404b9f..3f0c7cf7c1 100644
--- a/addrcheck/tests/insn_fpu.stdout.exp
+++ b/addrcheck/tests/insn_fpu.stdout.exp
@@ -58,6 +58,30 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcomi_1 ... ok
+fcomi_2 ... ok
+fcomi_3 ... ok
+fcomi_4 ... ok
+fcomi_5 ... ok
+fcomi_6 ... ok
+fcomip_1 ... ok
+fcomip_2 ... ok
+fcomip_3 ... ok
+fcomip_4 ... ok
+fcomip_5 ... ok
+fcomip_6 ... ok
+fucomi_1 ... ok
+fucomi_2 ... ok
+fucomi_3 ... ok
+fucomi_4 ... ok
+fucomi_5 ... ok
+fucomi_6 ... ok
+fucomip_1 ... ok
+fucomip_2 ... ok
+fucomip_3 ... ok
+fucomip_4 ... ok
+fucomip_5 ... ok
+fucomip_6 ... ok
 fchs_1 ... ok
 fchs_2 ... ok
 fchs_3 ... ok
@@ -174,6 +198,25 @@ fidivrl_5 ... ok
 fidivrl_6 ... ok
 fidivrl_7 ... ok
 fidivrl_8 ... ok
+filds_1 ... ok
+filds_2 ... ok
+filds_3 ... ok
+filds_4 ... ok
+fildl_1 ... ok
+fildl_2 ... ok
+fildl_3 ... ok
+fildl_4 ... ok
+fildq_1 ... ok
+fildq_2 ... ok
+fildq_3 ... ok
+fildq_4 ... ok
+flds_1 ... ok
+flds_2 ... ok
+fldl_1 ... ok
+fldl_2 ... ok
+fld_1 ... ok
+fld_2 ... ok
+fld_3 ... ok
 fld1_1 ... ok
 fldl2t_1 ... ok
 fldl2e_1 ... ok
@@ -349,3 +392,5 @@ fisubrl_5 ... ok
 fisubrl_6 ... ok
 fisubrl_7 ... ok
 fisubrl_8 ... ok
+fxch_1 ... ok
+fxch_2 ... ok
diff --git a/cachegrind/tests/insn_fpu.stdout.exp b/cachegrind/tests/insn_fpu.stdout.exp
index 6933404b9f..3f0c7cf7c1 100644
--- a/cachegrind/tests/insn_fpu.stdout.exp
+++ b/cachegrind/tests/insn_fpu.stdout.exp
@@ -58,6 +58,30 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcomi_1 ... ok
+fcomi_2 ... ok
+fcomi_3 ... ok
+fcomi_4 ... ok
+fcomi_5 ... ok
+fcomi_6 ... ok
+fcomip_1 ... ok
+fcomip_2 ... ok
+fcomip_3 ... ok
+fcomip_4 ... ok
+fcomip_5 ... ok
+fcomip_6 ... ok
+fucomi_1 ... ok
+fucomi_2 ... ok
+fucomi_3 ... ok
+fucomi_4 ... ok
+fucomi_5 ... ok
+fucomi_6 ... ok
+fucomip_1 ... ok
+fucomip_2 ... ok
+fucomip_3 ... ok
+fucomip_4 ... ok
+fucomip_5 ... ok
+fucomip_6 ... ok
 fchs_1 ... ok
 fchs_2 ... ok
 fchs_3 ... ok
@@ -174,6 +198,25 @@ fidivrl_5 ... ok
 fidivrl_6 ... ok
 fidivrl_7 ... ok
 fidivrl_8 ... ok
+filds_1 ... ok
+filds_2 ... ok
+filds_3 ... ok
+filds_4 ... ok
+fildl_1 ... ok
+fildl_2 ... ok
+fildl_3 ... ok
+fildl_4 ... ok
+fildq_1 ... ok
+fildq_2 ... ok
+fildq_3 ... ok
+fildq_4 ... ok
+flds_1 ... ok
+flds_2 ... ok
+fldl_1 ... ok
+fldl_2 ... ok
+fld_1 ... ok
+fld_2 ... ok
+fld_3 ... ok
 fld1_1 ... ok
 fldl2t_1 ... ok
 fldl2e_1 ... ok
@@ -349,3 +392,5 @@ fisubrl_5 ... ok
 fisubrl_6 ... ok
 fisubrl_7 ... ok
 fisubrl_8 ... ok
+fxch_1 ... ok
+fxch_2 ... ok
diff --git a/helgrind/tests/insn_fpu.stdout.exp b/helgrind/tests/insn_fpu.stdout.exp
index 6933404b9f..3f0c7cf7c1 100644
--- a/helgrind/tests/insn_fpu.stdout.exp
+++ b/helgrind/tests/insn_fpu.stdout.exp
@@ -58,6 +58,30 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcomi_1 ... ok
+fcomi_2 ... ok
+fcomi_3 ... ok
+fcomi_4 ... ok
+fcomi_5 ... ok
+fcomi_6 ... ok
+fcomip_1 ... ok
+fcomip_2 ... ok
+fcomip_3 ... ok
+fcomip_4 ... ok
+fcomip_5 ... ok
+fcomip_6 ... ok
+fucomi_1 ... ok
+fucomi_2 ... ok
+fucomi_3 ... ok
+fucomi_4 ... ok
+fucomi_5 ... ok
+fucomi_6 ... ok
+fucomip_1 ... ok
+fucomip_2 ... ok
+fucomip_3 ... ok
+fucomip_4 ... ok
+fucomip_5 ... ok
+fucomip_6 ... ok
 fchs_1 ... ok
 fchs_2 ... ok
 fchs_3 ... ok
@@ -174,6 +198,25 @@ fidivrl_5 ... ok
 fidivrl_6 ... ok
 fidivrl_7 ... ok
 fidivrl_8 ... ok
+filds_1 ... ok
+filds_2 ... ok
+filds_3 ... ok
+filds_4 ... ok
+fildl_1 ... ok
+fildl_2 ... ok
+fildl_3 ... ok
+fildl_4 ... ok
+fildq_1 ... ok
+fildq_2 ... ok
+fildq_3 ... ok
+fildq_4 ... ok
+flds_1 ... ok
+flds_2 ... ok
+fldl_1 ... ok
+fldl_2 ... ok
+fld_1 ... ok
+fld_2 ... ok
+fld_3 ... ok
 fld1_1 ... ok
 fldl2t_1 ... ok
 fldl2e_1 ... ok
@@ -349,3 +392,5 @@ fisubrl_5 ... ok
 fisubrl_6 ... ok
 fisubrl_7 ... ok
 fisubrl_8 ... ok
+fxch_1 ... ok
+fxch_2 ... ok
diff --git a/memcheck/tests/insn_fpu.stdout.exp b/memcheck/tests/insn_fpu.stdout.exp
index 6933404b9f..3f0c7cf7c1 100644
--- a/memcheck/tests/insn_fpu.stdout.exp
+++ b/memcheck/tests/insn_fpu.stdout.exp
@@ -58,6 +58,30 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcomi_1 ... ok
+fcomi_2 ... ok
+fcomi_3 ... ok
+fcomi_4 ... ok
+fcomi_5 ... ok
+fcomi_6 ... ok
+fcomip_1 ... ok
+fcomip_2 ... ok
+fcomip_3 ... ok
+fcomip_4 ... ok
+fcomip_5 ... ok
+fcomip_6 ... ok
+fucomi_1 ... ok
+fucomi_2 ... ok
+fucomi_3 ... ok
+fucomi_4 ... ok
+fucomi_5 ... ok
+fucomi_6 ... ok
+fucomip_1 ... ok
+fucomip_2 ... ok
+fucomip_3 ... ok
+fucomip_4 ... ok
+fucomip_5 ... ok
+fucomip_6 ... ok
 fchs_1 ... ok
 fchs_2 ... ok
 fchs_3 ... ok
@@ -174,6 +198,25 @@ fidivrl_5 ... ok
 fidivrl_6 ... ok
 fidivrl_7 ... ok
 fidivrl_8 ... ok
+filds_1 ... ok
+filds_2 ... ok
+filds_3 ... ok
+filds_4 ... ok
+fildl_1 ... ok
+fildl_2 ... ok
+fildl_3 ... ok
+fildl_4 ... ok
+fildq_1 ... ok
+fildq_2 ... ok
+fildq_3 ... ok
+fildq_4 ... ok
+flds_1 ... ok
+flds_2 ... ok
+fldl_1 ... ok
+fldl_2 ... ok
+fld_1 ... ok
+fld_2 ... ok
+fld_3 ... ok
 fld1_1 ... ok
 fldl2t_1 ... ok
 fldl2e_1 ... ok
@@ -349,3 +392,5 @@ fisubrl_5 ... ok
 fisubrl_6 ... ok
 fisubrl_7 ... ok
 fisubrl_8 ... ok
+fxch_1 ... ok
+fxch_2 ... ok
diff --git a/none/tests/insn_fpu.def b/none/tests/insn_fpu.def
index 5822358f9a..ea0352e02d 100644
--- a/none/tests/insn_fpu.def
+++ b/none/tests/insn_fpu.def
@@ -58,6 +58,30 @@ fiaddl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[88888888.7654321]
 fiaddl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[86419753.2345679]
 fiaddl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679]
 fiaddl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321]
+fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
+fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
+fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]
+fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00]
+fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01]
+fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40]
+fcomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00]
+fcomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01]
+fcomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40]
+fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00]
+fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01]
+fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40]
+fucomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
+fucomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
+fucomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]
+fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00]
+fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01]
+fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40]
+fucomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00]
+fucomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01]
+fucomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40]
+fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00]
+fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01]
+fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40]
 fchs st0.ps[1234.5678] : => st0.ps[-1234.5678]
 fchs st0.ps[-1234.5678] : => st0.ps[1234.5678]
 fchs st0.pd[12345678.87654321] : => st0.pd[-12345678.87654321]
@@ -174,6 +198,25 @@ fidivrl st0.pd[1234567.7654321] : m32.sd[654321] => st0.pd[0.530000068300007]
 fidivrl st0.pd[-1234567.7654321] : m32.sd[654321] => st0.pd[-0.530000068300007]
 fidivrl st0.pd[1234567.7654321] : m32.sd[-654321] => st0.pd[-0.530000068300007]
 fidivrl st0.pd[-1234567.7654321] : m32.sd[-654321] => st0.pd[0.530000068300007]
+filds m16.sw[12345] => st0.ps[12345.0]
+filds m16.sw[-12345] => st0.ps[-12345.0]
+filds m16.sw[12345] => st0.pd[12345.0]
+filds m16.sw[-12345] => st0.pd[-12345.0]
+fildl m32.sd[12345678] => st0.ps[12345678.0]
+fildl m32.sd[-12345678] => st0.ps[-12345678.0]
+fildl m32.sd[12345678] => st0.pd[12345678.0]
+fildl m32.sd[-12345678] => st0.pd[-12345678.0]
+fildq m64.sq[123456787654321] => st0.ps[123456787654321.0]
+fildq m64.sq[-123456787654321] => st0.ps[-123456787654321.0]
+fildq m64.sq[123456787654321] => st0.pd[123456787654321.0]
+fildq m64.sq[-123456787654321] => st0.pd[-123456787654321.0]
+flds m32.ps[1234.5678] => st0.ps[1234.5678]
+flds m32.ps[-1234.5678] => st0.ps[-1234.5678]
+fldl m64.pd[1234567.7654321] => st0.pd[1234567.7654321]
+fldl m64.pd[-1234567.7654321] => st0.pd[-1234567.7654321]
+fld st2.ps[1234.5678] => st0.ps[1234.5678] st3.ps[1234.5678]
+fld st2.ps[-1234.5678] => st0.ps[-1234.5678] st3.ps[-1234.5678]
+fld st2.pd[1234567.7654321] => st0.pd[1234567.7654321] st3.pd[1234567.7654321]
 fld1 => st0.pd[1.0]
 fldl2t => st0.pd[3.321928094887362]
 fldl2e => st0.pd[1.442695040888963]
@@ -349,3 +392,5 @@ fisubrl st0.pd[1234567.7654321] : m32.sd[87654321] => st0.pd[86419753.2345679]
 fisubrl st0.pd[-1234567.7654321] : m32.sd[87654321] => st0.pd[88888888.7654321]
 fisubrl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321]
 fisubrl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679]
+fxch st0.ps[1234.5678] : st2.ps[8765.4321] => st0.ps[8765.4321] st2.ps[1234.5678]
+fxch st0.pd[1234567.7654321] : st2.pd[7654321.1234567] => st0.pd[7654321.1234567] st2.pd[1234567.7654321]
diff --git a/none/tests/insn_fpu.stdout.exp b/none/tests/insn_fpu.stdout.exp
index 6933404b9f..3f0c7cf7c1 100644
--- a/none/tests/insn_fpu.stdout.exp
+++ b/none/tests/insn_fpu.stdout.exp
@@ -58,6 +58,30 @@ fiaddl_5 ... ok
 fiaddl_6 ... ok
 fiaddl_7 ... ok
 fiaddl_8 ... ok
+fcomi_1 ... ok
+fcomi_2 ... ok
+fcomi_3 ... ok
+fcomi_4 ... ok
+fcomi_5 ... ok
+fcomi_6 ... ok
+fcomip_1 ... ok
+fcomip_2 ... ok
+fcomip_3 ... ok
+fcomip_4 ... ok
+fcomip_5 ... ok
+fcomip_6 ... ok
+fucomi_1 ... ok
+fucomi_2 ... ok
+fucomi_3 ... ok
+fucomi_4 ... ok
+fucomi_5 ... ok
+fucomi_6 ... ok
+fucomip_1 ... ok
+fucomip_2 ... ok
+fucomip_3 ... ok
+fucomip_4 ... ok
+fucomip_5 ... ok
+fucomip_6 ... ok
 fchs_1 ... ok
 fchs_2 ... ok
 fchs_3 ... ok
@@ -174,6 +198,25 @@ fidivrl_5 ... ok
 fidivrl_6 ... ok
 fidivrl_7 ... ok
 fidivrl_8 ... ok
+filds_1 ... ok
+filds_2 ... ok
+filds_3 ... ok
+filds_4 ... ok
+fildl_1 ... ok
+fildl_2 ... ok
+fildl_3 ... ok
+fildl_4 ... ok
+fildq_1 ... ok
+fildq_2 ... ok
+fildq_3 ... ok
+fildq_4 ... ok
+flds_1 ... ok
+flds_2 ... ok
+fldl_1 ... ok
+fldl_2 ... ok
+fld_1 ... ok
+fld_2 ... ok
+fld_3 ... ok
 fld1_1 ... ok
 fldl2t_1 ... ok
 fldl2e_1 ... ok
@@ -349,3 +392,5 @@ fisubrl_5 ... ok
 fisubrl_6 ... ok
 fisubrl_7 ... ok
 fisubrl_8 ... ok
+fxch_1 ... ok
+fxch_2 ... ok