From: clm <clm@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed, 28 Oct 2015 18:09:09 +0000 (+0000)
Subject: 2015-10-28  Catherine Moore  <clm@codesourcery.com>
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=34b98464bc9650a81101e15729e879c2af9d0e53;p=thirdparty%2Fgcc.git

2015-10-28  Catherine Moore  <clm@codesourcery.com>

        * gcc.target/mips/oddspreg-3.c: Disable for MIPS16.
        * gcc.target/mips/oddspreg-6.c: Likewise.
        * gcc.target/mips/oddspreg-1.c: Likewise.
        * gcc.target/mips/oddspreg-2.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@229496 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cc04c43bfef5..5ca99b01eee0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2015-10-28  Catherine Moore  <clm@codesourcery.com>
+
+	* gcc.target/mips/oddspreg-3.c: Disable for MIPS16.
+	* gcc.target/mips/oddspreg-6.c: Likewise.
+	* gcc.target/mips/oddspreg-1.c: Likewise.
+	* gcc.target/mips/oddspreg-2.c: Likewise.
+
 2015-10-05  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 
 	PR target/67839
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-1.c b/gcc/testsuite/gcc.target/mips/oddspreg-1.c
index a9c695736930..d44563d0860b 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-1.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-1.c
@@ -5,7 +5,7 @@
 #error "Incorrect number of single-precision registers reported"
 #endif
 
-void
+NOMIPS16 void
 foo ()
 {
   register float foo asm ("$f1");
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-2.c b/gcc/testsuite/gcc.target/mips/oddspreg-2.c
index e2e0a2660bb2..efeb0af1b0d8 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-2.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-2.c
@@ -2,7 +2,7 @@
 /* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */
 /* { dg-options "-mabi=32 -mno-odd-spreg -mhard-float" } */
 
-void
+NOMIPS16 void
 foo ()
 {
   register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-3.c b/gcc/testsuite/gcc.target/mips/oddspreg-3.c
index f287eb66e92c..8a0d85cc7cdf 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-3.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-3.c
@@ -2,7 +2,7 @@
 /* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */
 /* { dg-options "-mabi=32 -mfp32 -march=loongson3a -mhard-float" } */
 
-void
+NOMIPS16 void
 foo ()
 {
   register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */
diff --git a/gcc/testsuite/gcc.target/mips/oddspreg-6.c b/gcc/testsuite/gcc.target/mips/oddspreg-6.c
index 955dea901407..eb376c6b3305 100644
--- a/gcc/testsuite/gcc.target/mips/oddspreg-6.c
+++ b/gcc/testsuite/gcc.target/mips/oddspreg-6.c
@@ -2,7 +2,7 @@
 /* { dg-skip-if "needs asm output" { *-*-* } { "-fno-fat-lto-objects" } { "" } } */
 /* { dg-options "-mabi=32 -mfpxx -mhard-float" } */
 
-void
+NOMIPS16 void
 foo ()
 {
   register float foo asm ("$f1"); /* { dg-error "isn't suitable for" } */