From: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Date: Mon, 21 Nov 2011 15:08:03 +0000 (+0000)
Subject: Fix ultrasparc_vis[23]_hw tests
X-Git-Tag: releases/gcc-4.7.0~2045
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=379fba828f7e8ce4025081aa94cc18b1c7db66a2;p=thirdparty%2Fgcc.git

Fix ultrasparc_vis[23]_hw tests

	* lib/target-supports.exp
	(check_effective_target_ultrasparc_vis2_hw): Call check_runtime
	with ultrasparc_vis2_hw.
	(check_effective_target_ultrasparc_vis3_hw): Call check_runtime
	with ultrasparc_vis3_hw.

From-SVN: r181582
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3785361a5acc..6d8010dc4d1e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2011-11-21  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* lib/target-supports.exp
+	(check_effective_target_ultrasparc_vis2_hw): Call check_runtime
+	with ultrasparc_vis2_hw.
+	(check_effective_target_ultrasparc_vis3_hw): Call check_runtime
+	with ultrasparc_vis3_hw.
+
 2011-11-21  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
 	* c-c++-common/tm/malloc.c: Scan tree dumps for std::malloc if
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 943091020343..cd013336bdaa 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2476,7 +2476,7 @@ proc check_effective_target_ultrasparc_hw { } {
 # instructions.  We check this by attempting: "bmask %g0, %g0, %g0"
 
 proc check_effective_target_ultrasparc_vis2_hw { } {
-    return [check_runtime ultrasparc_hw {
+    return [check_runtime ultrasparc_vis2_hw {
 	int main() { __asm__(".word 0x81b00320"); return 0; }
     } "-mcpu=ultrasparc3"]
 }
@@ -2485,7 +2485,7 @@ proc check_effective_target_ultrasparc_vis2_hw { } {
 # instructions.  We check this by attempting: "addxc %g0, %g0, %g0"
 
 proc check_effective_target_ultrasparc_vis3_hw { } {
-    return [check_runtime ultrasparc_hw {
+    return [check_runtime ultrasparc_vis3_hw {
 	int main() { __asm__(".word 0x81b00220"); return 0; }
     } "-mcpu=niagara3"]
 }