From: Sven Eckelmann Date: Mon, 13 Apr 2026 14:21:22 +0000 (+0200) Subject: realtek: rtl931x: psx28: specify POE MCU reset GPIO X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=39beab3c55d3c0f4a99bc193a9bbb4cb7f4f93f0;p=thirdparty%2Fopenwrt.git realtek: rtl931x: psx28: specify POE MCU reset GPIO The MCU (GD32E230G8) which controls the RTL8239 POE++ PSE chips can sometimes hang. In this case, it is necessary to to reset the chip using the nRESET pin which is connected to the GPIO1 of the RTL8231 GPIO expander. For a reset, the `/sys/class/gpio/poe_mcu_reset/value` file must be set to 1 for a short period and then back to 0. After that, the poemgr must be "restarted" to the MCU back in the expected state. Signed-off-by: Sven Eckelmann Link: https://github.com/openwrt/openwrt/pull/22916 Signed-off-by: Robert Marko --- diff --git a/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts b/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts index c7d36be3fe2..488fe00b11a 100644 --- a/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts +++ b/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts @@ -14,6 +14,16 @@ gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; }; }; + + gpio-export { + compatible = "gpio-export"; + + poe_mcu_reset { + gpio-export,name = "poe_mcu_reset"; + gpio-export,output = <1>; + gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; + }; + }; }; &i2c_mst1 {