From: Richard Acayan <mailingradian@gmail.com>
Date: Tue, 10 Feb 2026 02:19:57 +0000 (-0500)
Subject: arm64: dts: qcom: sdm670: add llcc
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=3aa997129993135ff1e11128e216af814e72f0a0;p=thirdparty%2Fkernel%2Flinux.git

arm64: dts: qcom: sdm670: add llcc

Add the Last Level Cache Controller (LLCC) for the SDM670.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260210021957.13357-4-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 746e9deba5260..c195c79c1c85b 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1130,6 +1130,17 @@
 			reg = <0x0 0x00ff1000 0x0 0x60>;
 		};
 
+		llcc: system-cache-controller@1100000 {
+			compatible = "qcom,sdm670-llcc";
+			reg = <0 0x01100000 0 0x50000>,
+			      <0 0x01180000 0 0x50000>,
+			      <0 0x01300000 0 0x50000>;
+			reg-names = "llcc0_base",
+				    "llcc1_base",
+				    "llcc_broadcast_base";
+			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		mem_noc: interconnect@1380000 {
 			compatible = "qcom,sdm670-mem-noc";
 			reg = <0 0x01380000 0 0x27200>;