From: Jiri Olsa Date: Wed, 20 Jan 2016 11:56:33 +0000 (+0100) Subject: perf hists: Fix HISTC_MEM_DCACHELINE width setting X-Git-Tag: v3.16.35~470 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=3c137b93919281e5ec6dc773ab8b1a2481c00213;p=thirdparty%2Fkernel%2Fstable.git perf hists: Fix HISTC_MEM_DCACHELINE width setting commit 0805909f59e02036a4e2660159f27dbf8b6084ac upstream. Set correct width for unresolved mem_dcacheline addr. Signed-off-by: Jiri Olsa Cc: David Ahern Cc: Don Zickus Cc: Namhyung Kim Cc: Peter Zijlstra Fixes: 9b32ba71ba90 ("perf tools: Add dcacheline sort") Link: http://lkml.kernel.org/r/1453290995-18485-3-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo Signed-off-by: Luis Henriques --- diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c index e2a462bf58224..c2ab3677d524b 100644 --- a/tools/perf/util/hist.c +++ b/tools/perf/util/hist.c @@ -134,6 +134,8 @@ void hists__calc_col_len(struct hists *hists, struct hist_entry *h) symlen = unresolved_col_width + 4 + 2; hists__new_col_len(hists, HISTC_MEM_DADDR_SYMBOL, symlen); + hists__new_col_len(hists, HISTC_MEM_DCACHELINE, + symlen); } if (h->mem_info->daddr.map) { symlen = dso__name_len(h->mem_info->daddr.map->dso);