From: Martin Jambor Date: Fri, 22 Nov 2013 19:37:00 +0000 (+0100) Subject: re PR rtl-optimization/10474 (shrink wrapping for functions) X-Git-Tag: releases/gcc-4.9.0~2519 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=3e749749392a1d8e0db2ddc311239ccbc200a09f;p=thirdparty%2Fgcc.git re PR rtl-optimization/10474 (shrink wrapping for functions) PR rtl-optimization/10474 * ira.c (interesting_dest_for_shprep_1): New function. (interesting_dest_for_shprep): Use interesting_dest_for_shprep_1, also check parallels. testsuite/ * gcc.dg/pr10474.c: Also test ppc64. * gcc.dg/ira-shrinkwrap-prep-1.c: Also tes ppc64, changed all ints to longs. * gcc.dg/ira-shrinkwrap-prep-2.c: Likewise. From-SVN: r205281 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c404713119f1..afc9664af771 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-11-22 Martin Jambor + + PR rtl-optimization/10474 + * ira.c (interesting_dest_for_shprep_1): New function. + (interesting_dest_for_shprep): Use interesting_dest_for_shprep_1, + also check parallels. + 2013-11-22 Jeff Law * tree-ssa-threadedge.c (record_temporary_equivalence): Handle diff --git a/gcc/ira.c b/gcc/ira.c index 93a2bbdc90eb..2902ebe0a8be 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -4847,17 +4847,13 @@ find_moveable_pseudos (void) free_dominance_info (CDI_DOMINATORS); } - -/* If insn is interesting for parameter range-splitting shring-wrapping - preparation, i.e. it is a single set from a hard register to a pseudo, which - is live at CALL_DOM, return the destination. Otherwise return NULL. */ +/* If SET pattern SET is an assignment from a hard register to a pseudo which + is live at CALL_DOM (if non-NULL, otherwise this check is omitted), return + the destination. Otherwise return NULL. */ static rtx -interesting_dest_for_shprep (rtx insn, basic_block call_dom) +interesting_dest_for_shprep_1 (rtx set, basic_block call_dom) { - rtx set = single_set (insn); - if (!set) - return NULL; rtx src = SET_SRC (set); rtx dest = SET_DEST (set); if (!REG_P (src) || !HARD_REGISTER_P (src) @@ -4867,6 +4863,41 @@ interesting_dest_for_shprep (rtx insn, basic_block call_dom) return dest; } +/* If insn is interesting for parameter range-splitting shring-wrapping + preparation, i.e. it is a single set from a hard register to a pseudo, which + is live at CALL_DOM (if non-NULL, otherwise this check is omitted), or a + parallel statement with only one such statement, return the destination. + Otherwise return NULL. */ + +static rtx +interesting_dest_for_shprep (rtx insn, basic_block call_dom) +{ + if (!INSN_P (insn)) + return NULL; + rtx pat = PATTERN (insn); + if (GET_CODE (pat) == SET) + return interesting_dest_for_shprep_1 (pat, call_dom); + + if (GET_CODE (pat) != PARALLEL) + return NULL; + rtx ret = NULL; + for (int i = 0; i < XVECLEN (pat, 0); i++) + { + rtx sub = XVECEXP (pat, 0, i); + if (GET_CODE (sub) == USE || GET_CODE (sub) == CLOBBER) + continue; + if (GET_CODE (sub) != SET + || side_effects_p (sub)) + return NULL; + rtx dest = interesting_dest_for_shprep_1 (sub, call_dom); + if (dest && ret) + return NULL; + if (dest) + ret = dest; + } + return ret; +} + /* Split live ranges of pseudos that are loaded from hard registers in the first BB in a BB that dominates all non-sibling call if such a BB can be found and is not in a loop. Return true if the function has made any diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a8b93310b88b..7d895c5f6c26 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2013-11-22 Martin Jambor + + * gcc.dg/pr10474.c: Also test ppc64. + * gcc.dg/ira-shrinkwrap-prep-1.c: Also tes ppc64, changed all ints + to longs. + * gcc.dg/ira-shrinkwrap-prep-2.c: Likewise. + 2013-11-22 Michael Meissner PR target/59054 diff --git a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c index 4fc00b292dc8..54d3e7615733 100644 --- a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c +++ b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c @@ -1,18 +1,18 @@ -/* { dg-do compile { target { x86_64-*-* && lp64 } } } */ +/* { dg-do compile { target { { x86_64-*-* && lp64 } || { powerpc*-*-* && lp64 } } } } */ /* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue" } */ -int __attribute__((noinline, noclone)) -foo (int a) +long __attribute__((noinline, noclone)) +foo (long a) { return a + 5; } -static int g; +static long g; -int __attribute__((noinline, noclone)) -bar (int a) +long __attribute__((noinline, noclone)) +bar (long a) { - int r; + long r; if (a) { diff --git a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c index bb725e1651c4..ed08494cfa0d 100644 --- a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c +++ b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c @@ -1,18 +1,18 @@ -/* { dg-do compile { target { x86_64-*-* && lp64 } } } */ +/* { dg-do compile { target { { x86_64-*-* && lp64 } || { powerpc*-*-* && lp64 } } } } */ /* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue" } */ -int __attribute__((noinline, noclone)) -foo (int a) +long __attribute__((noinline, noclone)) +foo (long a) { return a + 5; } -static int g; +static long g; -int __attribute__((noinline, noclone)) -bar (int a) +long __attribute__((noinline, noclone)) +bar (long a) { - int r; + long r; if (a) { diff --git a/gcc/testsuite/gcc.dg/pr10474.c b/gcc/testsuite/gcc.dg/pr10474.c index 08324d83a1d1..77ccc4606ed2 100644 --- a/gcc/testsuite/gcc.dg/pr10474.c +++ b/gcc/testsuite/gcc.dg/pr10474.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { x86_64-*-* && lp64 } } } */ +/* { dg-do compile { target { { x86_64-*-* && lp64 } || { powerpc*-*-* && lp64 } } } } */ /* { dg-options "-O3 -fdump-rtl-pro_and_epilogue" } */ void f(int *i)