From: Michal Simek Date: Tue, 20 Oct 2015 13:59:48 +0000 (+0200) Subject: ARM64: zynqmp: Use separate clk description for boards X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=3f3036b7deef4a61bc7ef178116234d53765d45a;p=thirdparty%2Fu-boot.git ARM64: zynqmp: Use separate clk description for boards Simplify clk description by moving it to separate file. Signed-off-by: Michal Simek --- diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi new file mode 100644 index 00000000000..c8ab995a8c9 --- /dev/null +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -0,0 +1,160 @@ +/* + * Clock specification for Xilinx ZynqMP + * + * (C) Copyright 2015, Xilinx, Inc. + * + * Michal Simek + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&amba { + clk100: clk100 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + clk125: clk125 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clk200: clk200 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + clk250: clk250 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + }; + + clk300: clk300 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <300000000>; + }; + + dp_aclk: clock0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-accuracy = <100>; + }; + + dp_aud_clk: clock1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-accuracy = <100>; + }; + + dpdma_clk: dpdma_clk { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <533000000>; + }; + + drm_clock: drm_clock { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <262750000>; + clock-accuracy = <0x64>; + }; +}; + +&can0 { + clocks = <&clk100 &clk100>; +}; + +&can1 { + clocks = <&clk100 &clk100>; +}; + +&nand0 { + clocks = <&clk100 &clk100>; +}; + +&gem0 { + clocks = <&clk125>, <&clk125>, <&clk125>; +}; + +&gem1 { + clocks = <&clk125>, <&clk125>, <&clk125>; +}; + +&gem2 { + clocks = <&clk125>, <&clk125>, <&clk125>; +}; + +&gem3 { + clocks = <&clk125>, <&clk125>, <&clk125>; +}; + +&gpio { + clocks = <&clk100>; +}; + +&i2c0 { + clocks = <&clk100>; +}; + +&i2c1 { + clocks = <&clk100>; +}; + +&qspi { + clocks = <&clk300 &clk300>; +}; + +&sata { + clocks = <&clk250>; +}; + +&sdhci0 { + clocks = <&clk200 &clk200>; +}; + +&sdhci1 { + clocks = <&clk200 &clk200>; +}; + +&spi0 { + clocks = <&clk200 &clk200>; +}; + +&spi1 { + clocks = <&clk200 &clk200>; +}; + +&uart0 { + clocks = <&clk100 &clk100>; +}; + +&uart1 { + clocks = <&clk100 &clk100>; +}; + +&usb0 { + clocks = <&clk250>, <&clk250>; +}; + +&usb1 { + clocks = <&clk250>, <&clk250>; +}; + +&xilinx_drm { + clocks = <&drm_clock>; +}; + +&xlnx_dp { + clocks = <&dp_aclk>, <&dp_aud_clk>; +}; + +&xlnx_dpdma { + clocks = <&dpdma_clk>; +}; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index ece79c3572d..05ad98ad6ba 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -11,6 +11,7 @@ /dts-v1/; /include/ "zynqmp.dtsi" +/include/ "zynqmp-clk.dtsi" / { model = "ZynqMP zc1751-xm015-dc1 RevA"; compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; @@ -36,43 +37,6 @@ }; }; -&amba { - /* clock for uart, can, nand, i2c */ - clk100: clk100 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - /* Gems */ - clk125: clk125 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - }; - - /* clock for sd/emmc */ - clk200: clk200 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; - - /* clock for usb */ - clk250: clk250 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <250000000>; - }; - - /* clock for qspi */ - clk300: clk300 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - }; -}; - /* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; @@ -117,7 +81,6 @@ &gem3 { status = "okay"; - clocks = <&clk125>, <&clk125>, <&clk125>; local-mac-address = [00 0a 35 00 02 90]; phy-handle = <&phy0>; phy-mode = "rgmii-id"; @@ -128,7 +91,6 @@ &gpio { status = "okay"; - clocks = <&clk100>; }; &gpu { @@ -138,7 +100,6 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; - clocks = <&clk100>; eeprom@54 { compatible = "at,24c64"; /* 24AA64 */ reg = <0x54>; @@ -147,7 +108,6 @@ &qspi { status = "okay"; - clocks = <&clk300 &clk300>; flash@0 { compatible = "n25q512a11"; /* Micron MT25QU512ABB8ESF */ #address-cells = <1>; @@ -181,24 +141,20 @@ &sata { status = "okay"; - clocks = <&clk250>; }; /* eMMC */ &sdhci0 { status = "okay"; - clocks = <&clk200>, <&clk200>; }; /* SD1 with level shifter */ &sdhci1 { status = "okay"; - clocks = <&clk200>, <&clk200>; }; &uart0 { status = "okay"; - clocks = <&clk100 &clk100>; }; /* ULPI SMSC USB3320 */ @@ -206,5 +162,4 @@ status = "okay"; dr_mode = "peripheral"; maximum-speed = "high-speed"; - clocks = <&clk250>, <&clk250>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index e58c0eab5c2..1e7f99c0795 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -11,6 +11,7 @@ /dts-v1/; /include/ "zynqmp.dtsi" +/include/ "zynqmp-clk.dtsi" / { model = "ZynqMP zc1751-xm016-dc2 RevA"; compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; @@ -40,51 +41,12 @@ }; }; -&amba { - /* clock for uart, can, nand, i2c */ - clk100: clk100 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - /* Gems */ - clk125: clk125 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - }; - - /* clock for sd/emmc */ - clk200: clk200 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; - - /* clock for usb */ - clk250: clk250 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <250000000>; - }; - - /* clock for qspi */ - clk300: clk300 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - }; -}; - &can0 { status = "okay"; - clocks = <&clk100 &clk100>; }; &can1 { status = "okay"; - clocks = <&clk100 &clk100>; }; /* fpd_dma clk 667MHz, lpd_dma 500MHz */ @@ -131,7 +93,6 @@ &gem2 { status = "okay"; - clocks = <&clk125>, <&clk125>, <&clk125>; local-mac-address = [00 0a 35 00 02 90]; phy-handle = <&phy0>; phy-mode = "rgmii-id"; @@ -145,13 +106,11 @@ &gpio { status = "okay"; - clocks = <&clk100>; /* FIXME - can't find in the table */ }; &i2c0 { status = "okay"; clock-frequency = <400000>; - clocks = <&clk100>; tca6416_u26: gpio@20 { compatible = "ti,tca6416"; @@ -171,7 +130,6 @@ status = "okay"; arasan,has-mdma; num-cs = <2>; - clocks = <&clk100 &clk100>; partition@0 { /* for testing purpose */ label = "nand-fsbl-uboot"; @@ -231,7 +189,6 @@ &spi0 { status = "okay"; num-cs = <1>; - clocks = <&clk200 &clk200>; spi0_flash0: spi0_flash0@0 { compatible = "m25p80"; #address-cells = <1>; @@ -249,7 +206,6 @@ &spi1 { status = "okay"; num-cs = <1>; - clocks = <&clk200 &clk200>; spi1_flash0: spi1_flash0@0 { compatible = "mtd_dataflash"; #address-cells = <1>; @@ -269,15 +225,12 @@ status = "okay"; dr_mode = "peripheral"; maximum-speed = "high-speed"; - clocks = <&clk250>, <&clk250>; }; &uart0 { status = "okay"; - clocks = <&clk100 &clk100>; }; &uart1 { status = "okay"; - clocks = <&clk100 &clk100>; }; diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts index 5fc3d15bea4..6994debbe45 100644 --- a/arch/arm/dts/zynqmp-zcu102.dts +++ b/arch/arm/dts/zynqmp-zcu102.dts @@ -11,6 +11,7 @@ /dts-v1/; /include/ "zynqmp.dtsi" +/include/ "zynqmp-clk.dtsi" / { model = "ZynqMP ZCU102"; compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; @@ -37,43 +38,6 @@ }; }; -&amba { - /* clock for uart, can, nand, i2c */ - clk100: clk100 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - /* Gems */ - clk125: clk125 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - }; - - /* clock for sd/emmc */ - clk200: clk200 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; - - /* clock for usb */ - clk250: clk250 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <250000000>; - }; - - /* clock for qspi */ - clk300: clk300 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - }; -}; - /* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; @@ -118,7 +82,6 @@ &gem3 { status = "okay"; - clocks = <&clk125>, <&clk125>, <&clk125>; local-mac-address = [00 0a 35 00 02 90]; phy-handle = <&phy0>; phy-mode = "rgmii-id"; @@ -129,7 +92,6 @@ &gpio { status = "okay"; - clocks = <&clk100>; }; &gpu { @@ -139,7 +101,6 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; - clocks = <&clk100>; i2cswitch@75 { /* u60 */ compatible = "nxp,pca9544"; @@ -338,7 +299,6 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o &i2c1 { status = "okay"; clock-frequency = <400000>; - clocks = <&clk100>; /* FIXME PL i2c via PCA9306 - u45 */ /* FIXME MSP430 - u41 - not detected */ i2cswitch@74 { /* u34 */ @@ -491,7 +451,6 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o &qspi { status = "okay"; - clocks = <&clk300 &clk300>; flash@0 { compatible = "n25q512a11"; /* Micron MT25QU512ABB8ESF */ #address-cells = <1>; @@ -525,18 +484,15 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o &sata { status = "okay"; - clocks = <&clk250>; }; /* SD1 with level shifter */ &sdhci1 { status = "okay"; - clocks = <&clk200>, <&clk200>; }; &uart0 { status = "okay"; - clocks = <&clk100 &clk100>; }; /* ULPI SMSC USB3320 */ @@ -544,5 +500,4 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o status = "okay"; dr_mode = "peripheral"; maximum-speed = "high-speed"; - clocks = <&clk250>, <&clk250>; };