From: Ville Syrjälä Date: Tue, 9 Dec 2025 07:55:49 +0000 (+0200) Subject: video/vga: Add VGA_IS0_R X-Git-Tag: v7.1-rc1~167^2~24^2~224 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=46e51fd0149a85e8165868761f7ede2fdec56654;p=thirdparty%2Flinux.git video/vga: Add VGA_IS0_R Add a proper name for the "Input status register 0" IO address. Currently we have some code that does reads using the aliasing VGA_MSR_W define, making it unclear what register we're actually reading. v2: Remove stray '?' Cc: Helge Deller Cc: linux-fbdev@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251209075549.14051-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula Acked-by: Helge Deller --- diff --git a/include/video/vga.h b/include/video/vga.h index 468764d6727ae..2f13c371800b3 100644 --- a/include/video/vga.h +++ b/include/video/vga.h @@ -46,6 +46,7 @@ #define VGA_MIS_R 0x3CC /* Misc Output Read Register */ #define VGA_MIS_W 0x3C2 /* Misc Output Write Register */ #define VGA_FTC_R 0x3CA /* Feature Control Read Register */ +#define VGA_IS0_R 0x3C2 /* Input Status Register 0 */ #define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */ #define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */ #define VGA_PEL_D 0x3C9 /* PEL Data Register */