From: James Hilliard Date: Fri, 8 May 2026 08:50:58 +0000 (+0200) Subject: target/mips: add Octeon LWUX instruction X-Git-Tag: v11.1.0-rc0~107^2~13 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=47aad5e8e3f09fe562012fad1e8feb1e1728fa76;p=thirdparty%2Fqemu.git target/mips: add Octeon LWUX instruction LWUX performs an indexed unsigned word load from base + index and zero-extends the result into rd. Add the decode entry and route it through the common indexed-load translator with MO_UL. Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: James Hilliard Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20260520172313.23777-13-philmd@linaro.org> --- diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 8a755075e8..db7d5f55f0 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -50,5 +50,6 @@ LWX 011111 ..... ..... ..... 00000 001010 @lx LHX 011111 ..... ..... ..... 00100 001010 @lx LHUX 011111 ..... ..... ..... 10100 001010 @lx LBUX 011111 ..... ..... ..... 00110 001010 @lx +LWUX 011111 ..... ..... ..... 10000 001010 @lx LBX 011111 ..... ..... ..... 10110 001010 @lx LDX 011111 ..... ..... ..... 01000 001010 @lx diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_translate.c index f897b42807..401c4bd14b 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -166,4 +166,5 @@ TRANS(LBUX, trans_lx, MO_UB); TRANS(LHX, trans_lx, MO_SW); TRANS(LHUX, trans_lx, MO_UW); TRANS(LWX, trans_lx, MO_SL); +TRANS(LWUX, trans_lx, MO_UL); TRANS(LDX, trans_lx, MO_UQ);