From: Nicholas Nethercote <njn@valgrind.org>
Date: Mon, 13 Oct 2003 07:30:40 +0000 (+0000)
Subject: Fixed "pop (%esp)", which must increment %esp before using it to calculate the
X-Git-Tag: svn/VALGRIND_2_1_0~140
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=49cc5ac6aed214ee2e7dc233620139ab7fc4bd2a;p=thirdparty%2Fvalgrind.git

Fixed "pop (%esp)", which must increment %esp before using it to calculate the
memory address.  Thanks to Erik Corry.

MERGE TO STABLE


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@1917
---

diff --git a/coregrind/vg_to_ucode.c b/coregrind/vg_to_ucode.c
index afa7347de6..3992e1d82c 100644
--- a/coregrind/vg_to_ucode.c
+++ b/coregrind/vg_to_ucode.c
@@ -4639,13 +4639,13 @@ static Addr disInstr ( UCodeBlock* cb, Addr eip, Bool* isEnd )
    case 0xC9: /* LEAVE */
       t1 = newTemp(cb); t2 = newTemp(cb);
       uInstr2(cb, GET,  4, ArchReg, R_EBP, TempReg, t1);
+      /* First PUT ESP looks redundant, but need it because ESP must
+         always be up-to-date for Memcheck to work... */
       uInstr2(cb, PUT,  4, TempReg, t1, ArchReg, R_ESP);
       uInstr2(cb, LOAD, 4, TempReg, t1, TempReg, t2);
       uInstr2(cb, PUT,  4, TempReg, t2, ArchReg, R_EBP);
       uInstr2(cb, ADD,  4, Literal, 0, TempReg, t1);
       uLiteral(cb, 4);
-      /* This 2nd PUT looks redundant, but Julian thinks it's not.
-       * --njn 03-feb-2003 */
       uInstr2(cb, PUT,  4, TempReg, t1, ArchReg, R_ESP);
       if (dis) VG_(printf)("leave");
       break;
@@ -5297,6 +5297,17 @@ static Addr disInstr ( UCodeBlock* cb, Addr eip, Bool* isEnd )
        uInstr2(cb, GET,  4, ArchReg, R_ESP,    TempReg, t1);
        /* load M[ESP] to virtual register t3: t3 = M[t1] */
        uInstr2(cb, LOAD, 4, TempReg, t1, TempReg, t3);
+       
+       /* increase ESP; must be done before the STORE.  Intel manual says:
+            If the ESP register is used as a base register for addressing
+            a destination operand in memory, the POP instruction computes
+            the effective address of the operand after it increments the
+            ESP register.
+       */
+       uInstr2(cb, ADD,    4, Literal, 0,        TempReg, t1);
+       uLiteral(cb, sz);
+       uInstr2(cb, PUT,    4, TempReg, t1,       ArchReg, R_ESP);
+
        /* resolve MODR/M */
        pair1 = disAMode ( cb, sorb, eip, dis?dis_buf:NULL);              
        
@@ -5305,11 +5316,6 @@ static Addr disInstr ( UCodeBlock* cb, Addr eip, Bool* isEnd )
        /* store value from stack in memory, M[m32] = t3 */       
        uInstr2(cb, STORE, 4, TempReg, t3, TempReg, tmpa);
 
-       /* increase ESP */
-       uInstr2(cb, ADD,    4, Literal, 0,        TempReg, t1);
-       uLiteral(cb, sz);
-       uInstr2(cb, PUT,    4, TempReg, t1,       ArchReg, R_ESP);
-
        if (dis) 
           VG_(printf)("popl %s\n", dis_buf);