From: Julian Seward <jseward@acm.org>
Date: Fri, 6 May 2005 01:43:56 +0000 (+0000)
Subject: Fix 64-bit bogon in bt/bts/btc/btr which caused it not to work right.
X-Git-Tag: svn/VALGRIND_3_0_1^2~169
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=4e13894835fc845ad7c5c69b4ff843ddd78fd267;p=thirdparty%2Fvalgrind.git

Fix 64-bit bogon in bt/bts/btc/btr which caused it not to work right.


git-svn-id: svn://svn.valgrind.org/vex/trunk@1165
---

diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c
index 18f9a58eb8..26b5f70298 100644
--- a/VEX/priv/guest-amd64/toIR.c
+++ b/VEX/priv/guest-amd64/toIR.c
@@ -3336,10 +3336,10 @@ ULong dis_Grp8_Imm ( Prefix pfx,
 
    /* Invent a mask suitable for the operation. */
    switch (gregLO3ofRM(modrm)) {
-      case 4: /* BT */  mask = 0;               break;
-      case 5: /* BTS */ mask = 1 << src_val;    break;
-      case 6: /* BTR */ mask = ~(1 << src_val); break;
-      case 7: /* BTC */ mask = 1 << src_val;    break;
+      case 4: /* BT */  mask = 0;                  break;
+      case 5: /* BTS */ mask = 1ULL << src_val;    break;
+      case 6: /* BTR */ mask = ~(1ULL << src_val); break;
+      case 7: /* BTC */ mask = 1ULL << src_val;    break;
          /* If this needs to be extended, probably simplest to make a
             new function to handle the other cases (0 .. 3).  The
             Intel docs do however not indicate any use for 0 .. 3, so