From: CQ Tang Date: Wed, 13 Jan 2016 21:15:03 +0000 (+0000) Subject: iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG X-Git-Tag: v3.16.35~375 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=58ce73411ca02c6fa317ceba7a99a83011e0567e;p=thirdparty%2Fkernel%2Fstable.git iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG commit fda3bec12d0979aae3f02ee645913d66fbc8a26e upstream. This is a 32-bit register. Apparently harmless on real hardware, but causing justified warnings in simulation. Signed-off-by: CQ Tang Signed-off-by: David Woodhouse Signed-off-by: Luis Henriques --- diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 55f1515d54c9d..04a5e5366ac0b 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -1246,7 +1246,7 @@ void dmar_disable_qi(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_QIES)) goto end; diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index 9b174893f0f5b..c21e80461d2d3 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c @@ -504,7 +504,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_IRES)) goto end;