From: Heiko Stuebner Date: Sun, 1 Feb 2026 19:18:01 +0000 (+0100) Subject: arm64: dts: rockchip: Add port subnodes to RK356x SATA controllers X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=5918bf2a17f4689abfb94d341c5240088f8bd16e;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: rockchip: Add port subnodes to RK356x SATA controllers The SATA controllers on RK356x are identical to the ones found on RK3588, but don't yet provide a port sub-node. Per the datasheet the RK356x also supports the fbscp capability and has the same queue maximums. So add port sub-nodes to both sata controllers on RK356x, and move the phy properties to it. Also add phandles to the ports, so that boards can add their target-supply when available. Signed-off-by: Heiko Stuebner Link: https://patch.msgid.link/20260201191804.41421-2-heiko@sntech.de Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index a2c4957a58992..68b48606f6010 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. */ +#include #include #include #include @@ -221,11 +222,20 @@ <&cru CLK_SATA1_RXOOB>; clock-names = "sata", "pmalive", "rxoob"; interrupts = ; - phys = <&combphy1 PHY_TYPE_SATA>; - phy-names = "sata-phy"; ports-implemented = <0x1>; power-domains = <&power RK3568_PD_PIPE>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; + + sata1_port0: sata-port@0 { + reg = <0>; + hba-port-cap = ; + phys = <&combphy1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + snps,rx-ts-max = <32>; + snps,tx-ts-max = <32>; + }; }; sata2: sata@fc800000 { @@ -235,11 +245,20 @@ <&cru CLK_SATA2_RXOOB>; clock-names = "sata", "pmalive", "rxoob"; interrupts = ; - phys = <&combphy2 PHY_TYPE_SATA>; - phy-names = "sata-phy"; ports-implemented = <0x1>; power-domains = <&power RK3568_PD_PIPE>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; + + sata2_port0: sata-port@0 { + reg = <0>; + hba-port-cap = ; + phys = <&combphy2 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + snps,rx-ts-max = <32>; + snps,tx-ts-max = <32>; + }; }; usb_host0_xhci: usb@fcc00000 {