From: Greg Kroah-Hartman Date: Mon, 23 Jan 2012 00:20:52 +0000 (-0700) Subject: 3.2-stable patches X-Git-Tag: v3.2.2~7 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=5934eb7ec70b86c10a9f121f3ac048d245c20741;p=thirdparty%2Fkernel%2Fstable-queue.git 3.2-stable patches added patches: ath9k_hw-fix-interpretation-of-the-rx-keymiss-flag.patch i2c-eg20t-modified-the-setting-of-transfer-rate.patch rt2800pci-fix-spurious-interrupts-generation.patch xfs-fix-endian-conversion-issue-in-discard-code.patch --- diff --git a/queue-3.2/ath9k_hw-fix-interpretation-of-the-rx-keymiss-flag.patch b/queue-3.2/ath9k_hw-fix-interpretation-of-the-rx-keymiss-flag.patch new file mode 100644 index 00000000000..ce5e8e53c85 --- /dev/null +++ b/queue-3.2/ath9k_hw-fix-interpretation-of-the-rx-keymiss-flag.patch @@ -0,0 +1,57 @@ +From 7a532fe7131216a02c81a6c1b1f8632da1195a58 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Sat, 14 Jan 2012 15:08:34 +0100 +Subject: ath9k_hw: fix interpretation of the rx KeyMiss flag + +From: Felix Fietkau + +commit 7a532fe7131216a02c81a6c1b1f8632da1195a58 upstream. + +Documentation states that the KeyMiss flag is only valid if RxFrameOK is +unset, however empirical evidence has shown that this is false. +When KeyMiss is set (and RxFrameOK is 1), the hardware passes a valid frame +which has not been decrypted. The driver then falsely marks the frame +as decrypted, and when using CCMP this corrupts the rx CCMP PN, leading +to connection hangs. + +Signed-off-by: Felix Fietkau +Signed-off-by: John W. Linville +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ath/ath9k/ar9003_mac.c | 5 +++-- + drivers/net/wireless/ath/ath9k/mac.c | 5 +++-- + 2 files changed, 6 insertions(+), 4 deletions(-) + +--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c +@@ -526,10 +526,11 @@ int ath9k_hw_process_rxdesc_edma(struct + rxs->rs_status |= ATH9K_RXERR_DECRYPT; + else if (rxsp->status11 & AR_MichaelErr) + rxs->rs_status |= ATH9K_RXERR_MIC; +- if (rxsp->status11 & AR_KeyMiss) +- rxs->rs_status |= ATH9K_RXERR_KEYMISS; + } + ++ if (rxsp->status11 & AR_KeyMiss) ++ rxs->rs_status |= ATH9K_RXERR_KEYMISS; ++ + return 0; + } + EXPORT_SYMBOL(ath9k_hw_process_rxdesc_edma); +--- a/drivers/net/wireless/ath/ath9k/mac.c ++++ b/drivers/net/wireless/ath/ath9k/mac.c +@@ -621,10 +621,11 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a + rs->rs_status |= ATH9K_RXERR_DECRYPT; + else if (ads.ds_rxstatus8 & AR_MichaelErr) + rs->rs_status |= ATH9K_RXERR_MIC; +- if (ads.ds_rxstatus8 & AR_KeyMiss) +- rs->rs_status |= ATH9K_RXERR_KEYMISS; + } + ++ if (ads.ds_rxstatus8 & AR_KeyMiss) ++ rs->rs_status |= ATH9K_RXERR_KEYMISS; ++ + return 0; + } + EXPORT_SYMBOL(ath9k_hw_rxprocdesc); diff --git a/queue-3.2/i2c-eg20t-modified-the-setting-of-transfer-rate.patch b/queue-3.2/i2c-eg20t-modified-the-setting-of-transfer-rate.patch new file mode 100644 index 00000000000..18f42fd35bc --- /dev/null +++ b/queue-3.2/i2c-eg20t-modified-the-setting-of-transfer-rate.patch @@ -0,0 +1,31 @@ +From ff35e8b18984ad2a82cbd259fc07f0be4b34b1aa Mon Sep 17 00:00:00 2001 +From: Toshiharu Okada +Date: Mon, 26 Sep 2011 16:16:23 +0900 +Subject: i2c-eg20t: modified the setting of transfer rate. + +From: Toshiharu Okada + +commit ff35e8b18984ad2a82cbd259fc07f0be4b34b1aa upstream. + +This patch modified the setting value of +I2C Bus Transfer Rate Setting Counter regisrer. + +Signed-off-by: Toshiharu Okada +Signed-off-by: Ben Dooks +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/i2c/busses/i2c-eg20t.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-eg20t.c ++++ b/drivers/i2c/busses/i2c-eg20t.c +@@ -243,7 +243,7 @@ static void pch_i2c_init(struct i2c_algo + if (pch_clk > PCH_MAX_CLK) + pch_clk = 62500; + +- pch_i2cbc = (pch_clk + (pch_i2c_speed * 4)) / pch_i2c_speed * 8; ++ pch_i2cbc = (pch_clk + (pch_i2c_speed * 4)) / (pch_i2c_speed * 8); + /* Set transfer speed in I2CBC */ + iowrite32(pch_i2cbc, p + PCH_I2CBC); + diff --git a/queue-3.2/rt2800pci-fix-spurious-interrupts-generation.patch b/queue-3.2/rt2800pci-fix-spurious-interrupts-generation.patch new file mode 100644 index 00000000000..e3b25a5c48a --- /dev/null +++ b/queue-3.2/rt2800pci-fix-spurious-interrupts-generation.patch @@ -0,0 +1,84 @@ +From dfd00c4c8f3dfa1fd7cec45f83d98b2a49743dcd Mon Sep 17 00:00:00 2001 +From: Stanislaw Gruszka +Date: Fri, 13 Jan 2012 12:59:32 +0100 +Subject: rt2800pci: fix spurious interrupts generation + +From: Stanislaw Gruszka + +commit dfd00c4c8f3dfa1fd7cec45f83d98b2a49743dcd upstream. + +Same devices can generate interrupt without properly setting bit in +INT_SOURCE_CSR register (spurious interrupt), what will cause IRQ line +will be disabled by interrupts controller driver. + +We discovered that clearing INT_MASK_CSR stops such behaviour. We +previously first read that register, and then clear all know interrupt +sources bits and do not touch reserved bits. After this patch, we write +to all register content (I believe writing to reserved bits on that +register will not cause any problems, I tested that on my rt2800pci +device). + +This fix very bad performance problem, practically making device +unusable (since worked without interrupts), reported in: +https://bugzilla.redhat.com/show_bug.cgi?id=658451 + +We previously tried to workaround that issue in commit +4ba7d9997869d25bd223dea7536fc1ce9fab3b3b "rt2800pci: handle spurious +interrupts", but it was reverted in commit +82e5fc2a34fa9ffea38f00c4066b7e600a0ca5e6 +as thing, that will prevent to detect real spurious interrupts. + +Reported-and-tested-by: Amir Hedayaty +Signed-off-by: Stanislaw Gruszka +Acked-by: Gertjan van Wingerde +Signed-off-by: John W. Linville +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/rt2x00/rt2800pci.c | 28 ++++++++-------------------- + 1 file changed, 8 insertions(+), 20 deletions(-) + +--- a/drivers/net/wireless/rt2x00/rt2800pci.c ++++ b/drivers/net/wireless/rt2x00/rt2800pci.c +@@ -422,7 +422,6 @@ static int rt2800pci_init_queues(struct + static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev, + enum dev_state state) + { +- int mask = (state == STATE_RADIO_IRQ_ON); + u32 reg; + unsigned long flags; + +@@ -436,25 +435,14 @@ static void rt2800pci_toggle_irq(struct + } + + spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags); +- rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®); +- rt2x00_set_field32(®, INT_MASK_CSR_RXDELAYINT, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_TXDELAYINT, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_RX_DONE, mask); +- rt2x00_set_field32(®, INT_MASK_CSR_AC0_DMA_DONE, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_AC1_DMA_DONE, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_AC2_DMA_DONE, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_AC3_DMA_DONE, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_HCCA_DMA_DONE, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_MGMT_DMA_DONE, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_MCU_COMMAND, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_RXTX_COHERENT, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_TBTT, mask); +- rt2x00_set_field32(®, INT_MASK_CSR_PRE_TBTT, mask); +- rt2x00_set_field32(®, INT_MASK_CSR_TX_FIFO_STATUS, mask); +- rt2x00_set_field32(®, INT_MASK_CSR_AUTO_WAKEUP, mask); +- rt2x00_set_field32(®, INT_MASK_CSR_GPTIMER, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_RX_COHERENT, 0); +- rt2x00_set_field32(®, INT_MASK_CSR_TX_COHERENT, 0); ++ reg = 0; ++ if (state == STATE_RADIO_IRQ_ON) { ++ rt2x00_set_field32(®, INT_MASK_CSR_RX_DONE, 1); ++ rt2x00_set_field32(®, INT_MASK_CSR_TBTT, 1); ++ rt2x00_set_field32(®, INT_MASK_CSR_PRE_TBTT, 1); ++ rt2x00_set_field32(®, INT_MASK_CSR_TX_FIFO_STATUS, 1); ++ rt2x00_set_field32(®, INT_MASK_CSR_AUTO_WAKEUP, 1); ++ } + rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg); + spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags); + diff --git a/queue-3.2/series b/queue-3.2/series index 396976a7f81..4fc46aedaa3 100644 --- a/queue-3.2/series +++ b/queue-3.2/series @@ -114,3 +114,7 @@ i2c-omap-correct-sysc-register-offset-for-omap4.patch x86-uv2-fix-new-uv2-hardware-by-using-native-uv2-broadcast-mode.patch x86-uv2-fix-bau-destination-timeout-initialization.patch x86-uv2-work-around-bau-bug.patch +ath9k_hw-fix-interpretation-of-the-rx-keymiss-flag.patch +rt2800pci-fix-spurious-interrupts-generation.patch +xfs-fix-endian-conversion-issue-in-discard-code.patch +i2c-eg20t-modified-the-setting-of-transfer-rate.patch diff --git a/queue-3.2/xfs-fix-endian-conversion-issue-in-discard-code.patch b/queue-3.2/xfs-fix-endian-conversion-issue-in-discard-code.patch new file mode 100644 index 00000000000..4b436a9b95a --- /dev/null +++ b/queue-3.2/xfs-fix-endian-conversion-issue-in-discard-code.patch @@ -0,0 +1,46 @@ +From bpm@sgi.com Sun Jan 22 14:13:07 2012 +From: bpm@sgi.com +Date: Wed, 18 Jan 2012 14:41:45 -0600 +Subject: xfs: fix endian conversion issue in discard code +To: stable@vger.kernel.org, xfs@oss.sgi.com, bpm@sgi.com +Cc: Dave Chinner +Message-ID: <1326919305-2753-2-git-send-email-bpm@sgi.com> + +From: Dave Chinner + +commit b1c770c273a4787069306fc82aab245e9ac72e9d upstream + +When finding the longest extent in an AG, we read the value directly +out of the AGF buffer without endian conversion. This will give an +incorrect length, resulting in FITRIM operations potentially not +trimming everything that it should. + +Signed-off-by: Dave Chinner +Reviewed-by: Christoph Hellwig +Signed-off-by: Ben Myers +Signed-off-by: Greg Kroah-Hartman + +--- + fs/xfs/xfs_discard.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/fs/xfs/xfs_discard.c ++++ b/fs/xfs/xfs_discard.c +@@ -68,7 +68,7 @@ xfs_trim_extents( + * Look up the longest btree in the AGF and start with it. + */ + error = xfs_alloc_lookup_le(cur, 0, +- XFS_BUF_TO_AGF(agbp)->agf_longest, &i); ++ be32_to_cpu(XFS_BUF_TO_AGF(agbp)->agf_longest), &i); + if (error) + goto out_del_cursor; + +@@ -84,7 +84,7 @@ xfs_trim_extents( + if (error) + goto out_del_cursor; + XFS_WANT_CORRUPTED_GOTO(i == 1, out_del_cursor); +- ASSERT(flen <= XFS_BUF_TO_AGF(agbp)->agf_longest); ++ ASSERT(flen <= be32_to_cpu(XFS_BUF_TO_AGF(agbp)->agf_longest)); + + /* + * Too small? Give up.