From: Greg Kroah-Hartman Date: Tue, 23 Jul 2024 13:19:39 +0000 (+0200) Subject: 4.19-stable patches X-Git-Tag: v6.10.1~22 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=593f5df26eb25f68eb750f98a0663da3fc7778f9;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: acpi-processor_idle-fix-invalid-comparison-with-insertion-sort-for-latency.patch arm-9324-1-fix-get_user-broken-with-veneer.patch --- diff --git a/queue-4.19/acpi-processor_idle-fix-invalid-comparison-with-insertion-sort-for-latency.patch b/queue-4.19/acpi-processor_idle-fix-invalid-comparison-with-insertion-sort-for-latency.patch new file mode 100644 index 00000000000..d6565c93aac --- /dev/null +++ b/queue-4.19/acpi-processor_idle-fix-invalid-comparison-with-insertion-sort-for-latency.patch @@ -0,0 +1,103 @@ +From 233323f9b9f828cd7cd5145ad811c1990b692542 Mon Sep 17 00:00:00 2001 +From: Kuan-Wei Chiu +Date: Tue, 2 Jul 2024 04:56:39 +0800 +Subject: ACPI: processor_idle: Fix invalid comparison with insertion sort for latency + +From: Kuan-Wei Chiu + +commit 233323f9b9f828cd7cd5145ad811c1990b692542 upstream. + +The acpi_cst_latency_cmp() comparison function currently used for +sorting C-state latencies does not satisfy transitivity, causing +incorrect sorting results. + +Specifically, if there are two valid acpi_processor_cx elements A and B +and one invalid element C, it may occur that A < B, A = C, and B = C. +Sorting algorithms assume that if A < B and A = C, then C < B, leading +to incorrect ordering. + +Given the small size of the array (<=8), we replace the library sort +function with a simple insertion sort that properly ignores invalid +elements and sorts valid ones based on latency. This change ensures +correct ordering of the C-state latencies. + +Fixes: 65ea8f2c6e23 ("ACPI: processor idle: Fix up C-state latency if not ordered") +Reported-by: Julian Sikorski +Closes: https://lore.kernel.org/lkml/70674dc7-5586-4183-8953-8095567e73df@gmail.com +Signed-off-by: Kuan-Wei Chiu +Tested-by: Julian Sikorski +Cc: All applicable +Link: https://patch.msgid.link/20240701205639.117194-1-visitorckw@gmail.com +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Kuan-Wei Chiu +Signed-off-by: Greg Kroah-Hartman +--- + drivers/acpi/processor_idle.c | 40 ++++++++++++++++------------------------ + 1 file changed, 16 insertions(+), 24 deletions(-) + +--- a/drivers/acpi/processor_idle.c ++++ b/drivers/acpi/processor_idle.c +@@ -29,7 +29,6 @@ + #include + #include + #include /* need_resched() */ +-#include + #include + #include + #include +@@ -545,28 +544,24 @@ static void acpi_processor_power_verify_ + return; + } + +-static int acpi_cst_latency_cmp(const void *a, const void *b) ++static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length) + { +- const struct acpi_processor_cx *x = a, *y = b; ++ int i, j, k; + +- if (!(x->valid && y->valid)) +- return 0; +- if (x->latency > y->latency) +- return 1; +- if (x->latency < y->latency) +- return -1; +- return 0; +-} +-static void acpi_cst_latency_swap(void *a, void *b, int n) +-{ +- struct acpi_processor_cx *x = a, *y = b; +- u32 tmp; ++ for (i = 1; i < length; i++) { ++ if (!states[i].valid) ++ continue; + +- if (!(x->valid && y->valid)) +- return; +- tmp = x->latency; +- x->latency = y->latency; +- y->latency = tmp; ++ for (j = i - 1, k = i; j >= 0; j--) { ++ if (!states[j].valid) ++ continue; ++ ++ if (states[j].latency > states[k].latency) ++ swap(states[j].latency, states[k].latency); ++ ++ k = j; ++ } ++ } + } + + static int acpi_processor_power_verify(struct acpi_processor *pr) +@@ -611,10 +606,7 @@ static int acpi_processor_power_verify(s + + if (buggy_latency) { + pr_notice("FW issue: working around C-state latencies out of order\n"); +- sort(&pr->power.states[1], max_cstate, +- sizeof(struct acpi_processor_cx), +- acpi_cst_latency_cmp, +- acpi_cst_latency_swap); ++ acpi_cst_latency_sort(&pr->power.states[1], max_cstate); + } + + lapic_timer_propagate_broadcast(pr); diff --git a/queue-4.19/arm-9324-1-fix-get_user-broken-with-veneer.patch b/queue-4.19/arm-9324-1-fix-get_user-broken-with-veneer.patch new file mode 100644 index 00000000000..b373e8acfd5 --- /dev/null +++ b/queue-4.19/arm-9324-1-fix-get_user-broken-with-veneer.patch @@ -0,0 +1,72 @@ +From 24d3ba0a7b44c1617c27f5045eecc4f34752ab03 Mon Sep 17 00:00:00 2001 +From: Masahiro Yamada +Date: Tue, 26 Sep 2023 17:09:03 +0100 +Subject: ARM: 9324/1: fix get_user() broken with veneer + +From: Masahiro Yamada + +commit 24d3ba0a7b44c1617c27f5045eecc4f34752ab03 upstream. + +The 32-bit ARM kernel stops working if the kernel grows to the point +where veneers for __get_user_* are created. + +AAPCS32 [1] states, "Register r12 (IP) may be used by a linker as a +scratch register between a routine and any subroutine it calls. It +can also be used within a routine to hold intermediate values between +subroutine calls." + +However, bl instructions buried within the inline asm are unpredictable +for compilers; hence, "ip" must be added to the clobber list. + +This becomes critical when veneers for __get_user_* are created because +veneers use the ip register since commit 02e541db0540 ("ARM: 8323/1: +force linker to use PIC veneers"). + +[1]: https://github.com/ARM-software/abi-aa/blob/2023Q1/aapcs32/aapcs32.rst + +Signed-off-by: Masahiro Yamada +Reviewed-by: Ard Biesheuvel +Signed-off-by: Russell King (Oracle) +Cc: John Stultz +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/include/asm/uaccess.h | 14 ++------------ + 1 file changed, 2 insertions(+), 12 deletions(-) + +--- a/arch/arm/include/asm/uaccess.h ++++ b/arch/arm/include/asm/uaccess.h +@@ -145,16 +145,6 @@ extern int __get_user_64t_1(void *); + extern int __get_user_64t_2(void *); + extern int __get_user_64t_4(void *); + +-#define __GUP_CLOBBER_1 "lr", "cc" +-#ifdef CONFIG_CPU_USE_DOMAINS +-#define __GUP_CLOBBER_2 "ip", "lr", "cc" +-#else +-#define __GUP_CLOBBER_2 "lr", "cc" +-#endif +-#define __GUP_CLOBBER_4 "lr", "cc" +-#define __GUP_CLOBBER_32t_8 "lr", "cc" +-#define __GUP_CLOBBER_8 "lr", "cc" +- + #define __get_user_x(__r2, __p, __e, __l, __s) \ + __asm__ __volatile__ ( \ + __asmeq("%0", "r0") __asmeq("%1", "r2") \ +@@ -162,7 +152,7 @@ extern int __get_user_64t_4(void *); + "bl __get_user_" #__s \ + : "=&r" (__e), "=r" (__r2) \ + : "0" (__p), "r" (__l) \ +- : __GUP_CLOBBER_##__s) ++ : "ip", "lr", "cc") + + /* narrowing a double-word get into a single 32bit word register: */ + #ifdef __ARMEB__ +@@ -184,7 +174,7 @@ extern int __get_user_64t_4(void *); + "bl __get_user_64t_" #__s \ + : "=&r" (__e), "=r" (__r2) \ + : "0" (__p), "r" (__l) \ +- : __GUP_CLOBBER_##__s) ++ : "ip", "lr", "cc") + #else + #define __get_user_x_64t __get_user_x + #endif diff --git a/queue-4.19/series b/queue-4.19/series index 9b6dfd94161..cfd49a64d44 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -25,3 +25,5 @@ spi-imx-don-t-expect-dma-for-i.mx-25-35-50-51-53-csp.patch selftests-vdso-fix-clang-build-errors-and-warnings.patch hfsplus-fix-uninit-value-in-copy_name.patch filelock-remove-locks-reliably-when-fcntl-close-race-is-detected.patch +arm-9324-1-fix-get_user-broken-with-veneer.patch +acpi-processor_idle-fix-invalid-comparison-with-insertion-sort-for-latency.patch