From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 09:39:19 +0000 (+0200) Subject: arm64: dts: exynos2200: Add default GIC address cells X-Git-Tag: v6.18-rc1~147^2~44^2~6 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=59abe5c87267f1f3bd627af20355b490b59f9901;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: exynos2200: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node. Value '0' is correct because GIC interrupt controller does not have children. Reviewed-by: Alim Akhtar Link: https://lore.kernel.org/r/20250830093918.24619-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi index 933ab7818ab23..6487ccb58ae76 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -274,6 +274,7 @@ reg = <0x10200000 0x10000>, /* GICD */ <0x10240000 0x200000>; /* GICR * 8 */ + #address-cells = <0>; #interrupt-cells = <4>; interrupt-controller; interrupts = ;