From: Greg Kroah-Hartman Date: Thu, 15 Jul 2021 11:26:19 +0000 (+0200) Subject: 5.12-stable patches X-Git-Tag: v5.4.133~58 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=5db3cb035f613bd6f1a802a1ffb209ebb3f21e89;p=thirdparty%2Fkernel%2Fstable-queue.git 5.12-stable patches added patches: mips-mt-extensions-are-not-available-on-mips32r1.patch pci-tegra194-fix-host-initialization-during-resume.patch selftests-resctrl-fix-incorrect-parsing-of-option-t.patch --- diff --git a/queue-5.12/mips-mt-extensions-are-not-available-on-mips32r1.patch b/queue-5.12/mips-mt-extensions-are-not-available-on-mips32r1.patch new file mode 100644 index 00000000000..1d5dc70ef3b --- /dev/null +++ b/queue-5.12/mips-mt-extensions-are-not-available-on-mips32r1.patch @@ -0,0 +1,45 @@ +From cad065ed8d8831df67b9754cc4437ed55d8b48c0 Mon Sep 17 00:00:00 2001 +From: Paul Cercueil +Date: Fri, 25 Jun 2021 11:49:29 +0100 +Subject: MIPS: MT extensions are not available on MIPS32r1 + +From: Paul Cercueil + +commit cad065ed8d8831df67b9754cc4437ed55d8b48c0 upstream. + +MIPS MT extensions were added with the MIPS 34K processor, which was +based on the MIPS32r2 ISA. + +This fixes a build error when building a generic kernel for a MIPS32r1 +CPU. + +Fixes: c434b9f80b09 ("MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol") +Cc: stable@vger.kernel.org # v5.9 +Signed-off-by: Paul Cercueil +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/include/asm/cpu-features.h | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/arch/mips/include/asm/cpu-features.h ++++ b/arch/mips/include/asm/cpu-features.h +@@ -64,6 +64,8 @@ + ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt))) + #define __isa_range_or_flag(ge, lt, flag) \ + (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag))) ++#define __isa_range_and_ase(ge, lt, ase) \ ++ (__isa_range(ge, lt) && __ase(ase)) + + /* + * SMP assumption: Options of CPU 0 are a superset of all processors. +@@ -421,7 +423,7 @@ + #endif + + #ifndef cpu_has_mipsmt +-#define cpu_has_mipsmt __isa_lt_and_ase(6, MIPS_ASE_MIPSMT) ++#define cpu_has_mipsmt __isa_range_and_ase(2, 6, MIPS_ASE_MIPSMT) + #endif + + #ifndef cpu_has_vp diff --git a/queue-5.12/pci-tegra194-fix-host-initialization-during-resume.patch b/queue-5.12/pci-tegra194-fix-host-initialization-during-resume.patch new file mode 100644 index 00000000000..0af945b70be --- /dev/null +++ b/queue-5.12/pci-tegra194-fix-host-initialization-during-resume.patch @@ -0,0 +1,36 @@ +From c4bf1f25c6c187864681d5ad4dd1fa92f62d5d32 Mon Sep 17 00:00:00 2001 +From: Vidya Sagar +Date: Tue, 4 May 2021 22:51:57 +0530 +Subject: PCI: tegra194: Fix host initialization during resume + +From: Vidya Sagar + +commit c4bf1f25c6c187864681d5ad4dd1fa92f62d5d32 upstream. + +Commit 275e88b06a27 ("PCI: tegra: Fix host link initialization") broke +host initialization during resume as it misses out calling the API +dw_pcie_setup_rc() which is required for host and MSI initialization. + +Link: https://lore.kernel.org/r/20210504172157.29712-1-vidyas@nvidia.com +Fixes: 275e88b06a27 ("PCI: tegra: Fix host link initialization") +Tested-by: Jon Hunter +Signed-off-by: Vidya Sagar +Signed-off-by: Lorenzo Pieralisi +Signed-off-by: Bjorn Helgaas +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pci/controller/dwc/pcie-tegra194.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/pci/controller/dwc/pcie-tegra194.c ++++ b/drivers/pci/controller/dwc/pcie-tegra194.c +@@ -2214,6 +2214,8 @@ static int tegra_pcie_dw_resume_noirq(st + goto fail_host_init; + } + ++ dw_pcie_setup_rc(&pcie->pci.pp); ++ + ret = tegra_pcie_dw_start_link(&pcie->pci); + if (ret < 0) + goto fail_host_init; diff --git a/queue-5.12/selftests-resctrl-fix-incorrect-parsing-of-option-t.patch b/queue-5.12/selftests-resctrl-fix-incorrect-parsing-of-option-t.patch new file mode 100644 index 00000000000..8426b63c656 --- /dev/null +++ b/queue-5.12/selftests-resctrl-fix-incorrect-parsing-of-option-t.patch @@ -0,0 +1,67 @@ +From 1421ec684a43379b2aa3cfda20b03d38282dc990 Mon Sep 17 00:00:00 2001 +From: Xiaochen Shen +Date: Thu, 27 May 2021 17:31:53 +0800 +Subject: selftests/resctrl: Fix incorrect parsing of option "-t" + +From: Xiaochen Shen + +commit 1421ec684a43379b2aa3cfda20b03d38282dc990 upstream. + +Resctrl test suite accepts command line argument "-t" to specify the +unit tests to run in the test list (e.g., -t mbm,mba,cmt,cat) as +documented in the help. + +When calling strtok() to parse the option, the incorrect delimiters +argument ":\t" is used. As a result, passing "-t mbm,mba,cmt,cat" throws +an invalid option error. + +Fix this by using delimiters argument "," instead of ":\t" for parsing +of unit tests list. At the same time, remove the unnecessary "spaces" +between the unit tests in help documentation to prevent confusion. + +Fixes: 790bf585b0ee ("selftests/resctrl: Add Cache Allocation Technology (CAT) selftest") +Fixes: 78941183d1b1 ("selftests/resctrl: Add Cache QoS Monitoring (CQM) selftest") +Fixes: ecdbb911f22d ("selftests/resctrl: Add MBM test") +Fixes: 034c7678dd2c ("selftests/resctrl: Add README for resctrl tests") +Cc: stable@vger.kernel.org +Signed-off-by: Xiaochen Shen +Reviewed-by: Tony Luck +Signed-off-by: Shuah Khan +Signed-off-by: Greg Kroah-Hartman + +--- + tools/testing/selftests/resctrl/README | 2 +- + tools/testing/selftests/resctrl/resctrl_tests.c | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +--- a/tools/testing/selftests/resctrl/README ++++ b/tools/testing/selftests/resctrl/README +@@ -47,7 +47,7 @@ Parameter '-h' shows usage information. + + usage: resctrl_tests [-h] [-b "benchmark_cmd [options]"] [-t test list] [-n no_of_bits] + -b benchmark_cmd [options]: run specified benchmark for MBM, MBA and CQM default benchmark is builtin fill_buf +- -t test list: run tests specified in the test list, e.g. -t mbm, mba, cqm, cat ++ -t test list: run tests specified in the test list, e.g. -t mbm,mba,cqm,cat + -n no_of_bits: run cache tests using specified no of bits in cache bit mask + -p cpu_no: specify CPU number to run the test. 1 is default + -h: help +--- a/tools/testing/selftests/resctrl/resctrl_tests.c ++++ b/tools/testing/selftests/resctrl/resctrl_tests.c +@@ -40,7 +40,7 @@ static void cmd_help(void) + printf("\t-b benchmark_cmd [options]: run specified benchmark for MBM, MBA and CQM"); + printf("\t default benchmark is builtin fill_buf\n"); + printf("\t-t test list: run tests specified in the test list, "); +- printf("e.g. -t mbm, mba, cqm, cat\n"); ++ printf("e.g. -t mbm,mba,cqm,cat\n"); + printf("\t-n no_of_bits: run cache tests using specified no of bits in cache bit mask\n"); + printf("\t-p cpu_no: specify CPU number to run the test. 1 is default\n"); + printf("\t-h: help\n"); +@@ -98,7 +98,7 @@ int main(int argc, char **argv) + + return -1; + } +- token = strtok(NULL, ":\t"); ++ token = strtok(NULL, ","); + } + break; + case 'p': diff --git a/queue-5.12/series b/queue-5.12/series index 6c06c817bc9..d0c84421e5c 100644 --- a/queue-5.12/series +++ b/queue-5.12/series @@ -151,3 +151,6 @@ sctp-add-size-validation-when-walking-chunks.patch mips-loongsoon64-reserve-memory-below-starting-pfn-t.patch mips-set-mips32r5-for-virt-extensions.patch mips-ci20-reduce-clocksource-to-750-khz.patch +pci-tegra194-fix-host-initialization-during-resume.patch +selftests-resctrl-fix-incorrect-parsing-of-option-t.patch +mips-mt-extensions-are-not-available-on-mips32r1.patch