From: Greg Kroah-Hartman Date: Mon, 16 Oct 2023 07:50:19 +0000 (+0200) Subject: 5.4-stable patches X-Git-Tag: v5.15.136~21 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=63524309ba7240c8681ac29492c186b398710dda;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: x86-cpu-fix-amd-erratum-1485-on-zen4-based-cpus.patch --- diff --git a/queue-5.4/series b/queue-5.4/series index ad995cb7ec5..faab2b484a3 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -37,6 +37,7 @@ cgroup-remove-duplicates-in-cgroup-v1-tasks-file.patch pinctrl-avoid-unsafe-code-pattern-in-find_pinctrl.patch usb-gadget-udc-xilinx-replace-memcpy-with-memcpy_toio.patch usb-gadget-ncm-handle-decoding-of-multiple-ntb-s-in-unwrap-call.patch +x86-cpu-fix-amd-erratum-1485-on-zen4-based-cpus.patch dmaengine-mediatek-fix-deadlock-caused-by-synchroniz.patch powerpc-8xx-fix-pte_access_permitted-for-page_none.patch powerpc-64e-fix-wrong-test-in-__ptep_test_and_clear_.patch diff --git a/queue-5.4/x86-cpu-fix-amd-erratum-1485-on-zen4-based-cpus.patch b/queue-5.4/x86-cpu-fix-amd-erratum-1485-on-zen4-based-cpus.patch new file mode 100644 index 00000000000..566b34e1bcf --- /dev/null +++ b/queue-5.4/x86-cpu-fix-amd-erratum-1485-on-zen4-based-cpus.patch @@ -0,0 +1,63 @@ +From f454b18e07f518bcd0c05af17a2239138bff52de Mon Sep 17 00:00:00 2001 +From: "Borislav Petkov (AMD)" +Date: Sat, 7 Oct 2023 12:57:02 +0200 +Subject: x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Borislav Petkov (AMD) + +commit f454b18e07f518bcd0c05af17a2239138bff52de upstream. + +Fix erratum #1485 on Zen4 parts where running with STIBP disabled can +cause an #UD exception. The performance impact of the fix is negligible. + +Reported-by: René Rebe +Signed-off-by: Borislav Petkov (AMD) +Tested-by: René Rebe +Cc: +Link: https://lore.kernel.org/r/D99589F4-BC5D-430B-87B2-72C20370CF57@exactcode.com +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/include/asm/msr-index.h | 4 ++++ + arch/x86/kernel/cpu/amd.c | 8 ++++++++ + 2 files changed, 12 insertions(+) + +--- a/arch/x86/include/asm/msr-index.h ++++ b/arch/x86/include/asm/msr-index.h +@@ -502,6 +502,10 @@ + + #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f + ++/* Zen4 */ ++#define MSR_ZEN4_BP_CFG 0xc001102e ++#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5 ++ + /* Fam 17h MSRs */ + #define MSR_F17H_IRPERF 0xc00000e9 + +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -75,6 +75,10 @@ static const int amd_zenbleed[] = + AMD_MODEL_RANGE(0x17, 0x90, 0x0, 0x91, 0xf), + AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); + ++static const int amd_erratum_1485[] = ++ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf), ++ AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf)); ++ + static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) + { + int osvw_id = *erratum++; +@@ -1117,6 +1121,10 @@ static void init_amd(struct cpuinfo_x86 + check_null_seg_clears_base(c); + + zenbleed_check(c); ++ ++ if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && ++ cpu_has_amd_erratum(c, amd_erratum_1485)) ++ msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT); + } + + #ifdef CONFIG_X86_32