From: Florian Krohm <florian@eich-krohm.de>
Date: Tue, 9 Dec 2014 20:08:46 +0000 (+0000)
Subject: Detect presence of sse3 instructions on x86.
X-Git-Tag: svn/VALGRIND_3_11_0~783
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=64498c9e9bd738269425a0b527b42b352e5b1fd0;p=thirdparty%2Fvalgrind.git

Detect presence of sse3 instructions on x86.
Set VEX_HWCAPS_X86_SSE3 accordingly.
This came about by grepping the source for VEX_HWCAPS_X86_SSE3
and observing that the flag was tested for (in VEX) but not set.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14803
---

diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c
index de4c414869..450a8b08d1 100644
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
@@ -713,7 +713,7 @@ Bool VG_(machine_get_hwcaps)( void )
    LibVEX_default_VexArchInfo(&vai);
 
 #if defined(VGA_x86)
-   { Bool have_sse1, have_sse2, have_cx8, have_lzcnt, have_mmxext;
+   { Bool have_sse1, have_sse2, have_sse3, have_cx8, have_lzcnt, have_mmxext;
      UInt eax, ebx, ecx, edx, max_extended;
      HChar vstr[13];
      vstr[0] = 0;
@@ -742,6 +742,7 @@ Bool VG_(machine_get_hwcaps)( void )
 
      have_sse1 = (edx & (1<<25)) != 0; /* True => have sse insns */
      have_sse2 = (edx & (1<<26)) != 0; /* True => have sse2 insns */
+     have_sse3 = (ecx & (1<<0)) != 0;  /* True => have sse3 insns */
 
      /* cmpxchg8b is a minimum requirement now; if we don't have it we
         must simply give up.  But all CPUs since Pentium-I have it, so
@@ -775,7 +776,16 @@ Bool VG_(machine_get_hwcaps)( void )
 
      va = VexArchX86;
      vai.endness = VexEndnessLE;
-     if (have_sse2 && have_sse1 && have_mmxext) {
+
+     if (have_sse3 && have_sse2 && have_sse1 && have_mmxext) {
+        vai.hwcaps  = VEX_HWCAPS_X86_MMXEXT;
+        vai.hwcaps |= VEX_HWCAPS_X86_SSE1;
+        vai.hwcaps |= VEX_HWCAPS_X86_SSE2;
+        vai.hwcaps |= VEX_HWCAPS_X86_SSE3;
+        if (have_lzcnt)
+           vai.hwcaps |= VEX_HWCAPS_X86_LZCNT;
+        VG_(machine_x86_have_mxcsr) = 1;
+     } else if (have_sse2 && have_sse1 && have_mmxext) {
         vai.hwcaps  = VEX_HWCAPS_X86_MMXEXT;
         vai.hwcaps |= VEX_HWCAPS_X86_SSE1;
         vai.hwcaps |= VEX_HWCAPS_X86_SSE2;