From: Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com>
Date: Tue, 12 Mar 2013 04:14:49 +0000 (+0530)
Subject: spi: zynq: Update spi_cs_is_valid()
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=647650b8809e8ef0bdc775e413a1f01b1fbd569a;p=thirdparty%2Fu-boot.git

spi: zynq: Update spi_cs_is_valid()

Updated the chipselect valid check to 1 bus and 2 chipselect's
as zynq qspi bus controller support maximum of 2 chipselects
in different bus topologies.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
---

diff --git a/drivers/spi/zynq_qspips.c b/drivers/spi/zynq_qspips.c
index 5d285d7a336..7359f851e83 100644
--- a/drivers/spi/zynq_qspips.c
+++ b/drivers/spi/zynq_qspips.c
@@ -850,9 +850,8 @@ static void xqspips_write_quad_bit(void __iomem *regs_base)
 
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-	debug("spi_cs_is_valid: bus: %d cs: %d\n",
-		bus, cs);
-	return 1;
+	/* 1 bus with 2 chipselect */
+	return bus == 0 && cs < 2;
 }
 
 void spi_cs_activate(struct spi_slave *slave)
@@ -952,6 +951,9 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	debug("spi_setup_slave: bus: %d cs: %d max_hz: %d mode: %d\n",
 		bus, cs, max_hz, mode);
 
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
 	is_dual = xqspips_check_is_dual_flash((void *)XPSS_SYS_CTRL_BASEADDR);
 
 	if (is_dual == -1) {