From: Michal Simek Date: Thu, 1 Sep 2016 07:45:30 +0000 (+0200) Subject: ARM64: zynqmp: Enable SPI for zcu100 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=64f02b0c259af2a07d06cc840ec05ec892bef61c;p=thirdparty%2Fu-boot.git ARM64: zynqmp: Enable SPI for zcu100 spi is bus 1, qspi is bus 0. Example: (Read max3107 ID) ZynqMP> sspi 1:0.0 16 1f00 00A1 (Write gpio direction out - reg 18 - for all gpio pins) ZynqMP> sspi 1:0.0 16 980f 0000 (Write value 1 (reg 19) for BT and WIFI (bit 0/bit 1) ZynqMP> sspi 1:0.0 16 9903 0000 All write commands based on spec have 0x80 + reg address as the first 8 bits. Signed-off-by: Michal Simek --- diff --git a/configs/xilinx_zynqmp_zcu100_defconfig b/configs/xilinx_zynqmp_zcu100_defconfig index d3f6ef72445..41f437c7204 100644 --- a/configs/xilinx_zynqmp_zcu100_defconfig +++ b/configs/xilinx_zynqmp_zcu100_defconfig @@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y