From: Jim MacArthur Date: Thu, 15 Jan 2026 15:26:29 +0000 (+0000) Subject: target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max X-Git-Tag: v11.0.0-rc0~108^2~21 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=672a1dd1ed051b252fa93094a8d064a24197bcfe;p=thirdparty%2Fqemu.git target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max docs/system/arm/emulation.rst: Add ASID2 Reviewed-by: Gustavo Romero Signed-off-by: Jim MacArthur Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 31a5878a8fa..3f30ea5a30e 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -24,6 +24,7 @@ the following architecture extensions: - FEAT_AIE (Memory Attribute Index Enhancement) - FEAT_Armv9_Crypto (Armv9 Cryptographic Extension) - FEAT_ASID16 (16 bit ASID) +- FEAT_ASID2 (Concurrent use of two ASIDs) - FEAT_ATS1A (Address Translation operations that ignore stage 1 permissions) - FEAT_BBM at level 2 (Translation table break-before-make levels) - FEAT_BF16 (AArch64 BFloat16 instructions) diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index 917db5bb09a..611838171b6 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1334,6 +1334,10 @@ void aarch64_max_tcg_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64MMFR3, AIE, 1); /* FEAT_AIE */ SET_IDREG(isar, ID_AA64MMFR3, t); + t = GET_IDREG(isar, ID_AA64MMFR4); + t = FIELD_DP64(t, ID_AA64MMFR4, ASID2, 1); /* FEAT_ASID2 */ + SET_IDREG(isar, ID_AA64MMFR4, t); + t = GET_IDREG(isar, ID_AA64ZFR0); t = FIELD_DP64(t, ID_AA64ZFR0, SVEVER, 2); /* FEAT_SVE2p1 */ t = FIELD_DP64(t, ID_AA64ZFR0, AES, 2); /* FEAT_SVE_PMULL128 */