From: segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu, 8 Jan 2015 03:46:41 +0000 (+0000)
Subject: 	PR target/36557
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=67d7e7e4c870f0b4247e9b0ae51744c9d82c9767;p=thirdparty%2Fgcc.git

	PR target/36557
	* config/rs6000/rs6000.md (*eqsi3_ext<mode>, *nesi3_ext<mode>): New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219336 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 137b64043b14..5eb1bc65bb5f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-01-07  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	PR target/36557
+	* config/rs6000/rs6000.md (*eqsi3_ext<mode>, *nesi3_ext<mode>): New.
+
 2015-01-07  Sandra Loosemore  <sandra@codesourcery.com>
 
 	* doc/invoke.texi ([-fvtable-verify]): Fix markup on option
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 8e9ac3bf833e..a451af502954 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -12576,6 +12576,66 @@
 	(if_then_else (match_test "operands[2] == const0_rtx")
 		      (const_string "8")
 		      (const_string "12")))])
+
+(define_insn_and_split "*eqsi3_ext<mode>"
+  [(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r")
+	(eq:EXTSI (match_operand:SI 1 "gpc_reg_operand" "r")
+		  (match_operand:SI 2 "scc_eq_operand" "rKLI")))
+   (clobber (match_scratch:SI 3 "=r"))
+   (clobber (match_scratch:SI 4 "=r"))]
+  ""
+  "#"
+  ""
+  [(set (match_dup 4)
+	(clz:SI (match_dup 3)))
+   (set (match_dup 0)
+	(zero_extend:EXTSI
+	  (lshiftrt:SI (match_dup 4)
+		       (const_int 5))))]
+{
+  operands[3] = rs6000_emit_eqne (SImode,
+				  operands[1], operands[2], operands[3]);
+
+  if (GET_CODE (operands[4]) == SCRATCH)
+    operands[4] = gen_reg_rtx (SImode);
+}
+  [(set (attr "length")
+	(if_then_else (match_test "operands[2] == const0_rtx")
+		      (const_string "8")
+		      (const_string "12")))])
+
+(define_insn_and_split "*nesi3_ext<mode>"
+  [(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r")
+	(ne:EXTSI (match_operand:SI 1 "gpc_reg_operand" "r")
+		  (match_operand:SI 2 "scc_eq_operand" "rKLI")))
+   (clobber (match_scratch:SI 3 "=r"))
+   (clobber (match_scratch:SI 4 "=r"))
+   (clobber (match_scratch:EXTSI 5 "=r"))]
+  ""
+  "#"
+  ""
+  [(set (match_dup 4)
+	(clz:SI (match_dup 3)))
+   (set (match_dup 5)
+	(zero_extend:EXTSI
+	  (lshiftrt:SI (match_dup 4)
+		       (const_int 5))))
+   (set (match_dup 0)
+	(xor:EXTSI (match_dup 5)
+		   (const_int 1)))]
+{
+  operands[3] = rs6000_emit_eqne (SImode,
+				  operands[1], operands[2], operands[3]);
+
+  if (GET_CODE (operands[4]) == SCRATCH)
+    operands[4] = gen_reg_rtx (SImode);
+  if (GET_CODE (operands[5]) == SCRATCH)
+    operands[5] = gen_reg_rtx (<MODE>mode);
+}
+  [(set (attr "length")
+	(if_then_else (match_test "operands[2] == const0_rtx")
+		      (const_string "12")
+		      (const_string "16")))])
 
 ;; Define both directions of branch and return.  If we need a reload
 ;; register, we'd rather use CR0 since it is much easier to copy a