From: Michal Simek <michal.simek@xilinx.com>
Date: Wed, 21 Oct 2015 12:56:23 +0000 (+0200)
Subject: ARM64: zynqmp: Remove temporary comments from dtses
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6828328402f99469c1f346e6da83e34eaa90f622;p=thirdparty%2Fu-boot.git

ARM64: zynqmp: Remove temporary comments from dtses

DTS comment cleanup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index eefb706d2a7..123f3582bc6 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -32,10 +32,8 @@
 
 	memory {
 		device_type = "memory";
-		reg = <0x0 0x0 0x80000000>, <0x8 0x00000000 0x80000000>; /* 4GB DIMM modules where 2GB are below 4GB (DDR_LOW) and the rest at DDR_HIGH */
-		/* PL address space - also with PL DDR 512MB-3GB, 16GB-24GB */
+		reg = <0x0 0x0 0x80000000>, <0x8 0x00000000 0x80000000>;
 	};
-	/* FIXME - there is also PL DDR - based on presentation 64GB */
 };
 
 &amba {
@@ -124,14 +122,13 @@
 	phy-handle = <&phy0>;
 	phy-mode = "rgmii-id";
 	phy0: phy@0{
-		reg = <0>; /* FIXME not quite sure about this one */
-		/* max-speed = <100>; */ /* FIXME here for sure */
+		reg = <0>;
 	};
 };
 
 &gpio {
 	status = "okay";
-	clocks = <&clk100>; /* FIXME - can't find in the table */
+	clocks = <&clk100>;
 };
 
 /*
@@ -148,13 +145,6 @@
 		compatible = "at,24c64"; /* 24AA64 */
 		reg = <0x54>;
 	};
-/* This eeprom is connected on FMC to be detactable from SW point of view
-   address depends on FMC connector where it is plugged
-	eeprom@52 {
-		compatible = "at,24c02";
-		reg = <0x50>; // FIXME 0b10100xx
-	};
-*/
 };
 
 &qspi {
@@ -166,7 +156,7 @@
 		#size-cells = <1>;
 		reg = <0x0>;
 		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
+		spi-rx-bus-width = <4>;
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
 		partition@qspi-fsbl-uboot { /* for testing purpose */
 			label = "qspi-fsbl-uboot";
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index 4079f94aea5..f4133a5075a 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -36,10 +36,8 @@
 
 	memory {
 		device_type = "memory";
-		reg = <0x0 0x0 0x80000000>, <0x8 0x00000000 0x80000000>; /* 4GB DIMM modules where 2GB are below 4GB (DDR_LOW) and the rest at DDR_HIGH */
-		/* PL address space - also with PL DDR 2GB-3GB, 16GB-24GB */
+		reg = <0x0 0x0 0x80000000>, <0x8 0x00000000 0x80000000>;
 	};
-	/* FIXME - there is also PL DDR - based on presentation 64GB */
 };
 
 &amba {
@@ -137,12 +135,11 @@
 	local-mac-address = [00 0a 35 00 02 90];
 	phy-handle = <&phy0>;
 	phy-mode = "rgmii-id";
-	phy0: phy@0{ /* DP83867 http://www.ti.com/lit/ds/symlink/dp83867ir.pdf ID 0x2000a231 */
-		reg = <0>; /* FIXME not quite sure about this one */
-		/* max-speed = <100>; */ /* FIXME here for sure */
-                ti,rx-internal-delay = <0x8>; /* FIXME DP83867_RGMIIDCTL_2_25_NS */
-                ti,tx-internal-delay = <0xa>; /* FIXME DP83867_RGMIIDCTL_2_75_NS */
-                ti,fifo-depth = <0x1>; /* default setup DP83867_PHYCR_FIFO_DEPTH_4_B_NIB */
+	phy0: phy@0{
+		reg = <0>;
+		ti,rx-internal-delay = <0x8>;
+		ti,tx-internal-delay = <0xa>;
+		ti,fifo-depth = <0x1>;
 	};
 };
 
@@ -184,7 +181,7 @@
 */
 };
 
-&nand0 { /* CLK 100, Micron SLC family device MT29F32G08ABCDB - 2 cs  - flashes in parralel */
+&nand0 {
 	status = "okay";
 	arasan,has-mdma;
 	partition@0 {	/* for testing purpose */
@@ -218,7 +215,7 @@
 	num-cs = <1>;
 	clocks = <&clk200 &clk200>;
 	spi0_flash0: spi0_flash0@0 {
-		compatible = "m25p80"; /* FIXME SST25WF080 */
+		compatible = "m25p80";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		spi-max-frequency = <50000000>;
@@ -239,7 +236,7 @@
 		compatible = "m25p80"; /* AT45DB041E 4Mbit */
 		#address-cells = <1>;
 		#size-cells = <1>;
-		spi-max-frequency = <85000000>; /* Adesto datasheet http://www.adestotech.com/wp-content/uploads/doc8783.pdf */
+		spi-max-frequency = <85000000>;
 		reg = <0>;
 
 		spi1_flash0@00000000 {
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 2bc920e4b06..5e357e4b8b3 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -552,7 +552,7 @@
 		};
 
 		usb0: usb@fe200000 {
-			compatible = "snps,dwc3"; /* 2.90a version in 1.0 silicon */
+			compatible = "snps,dwc3";
 			status = "disabled";
 			interrupt-parent = <&gic>;
 			interrupts = <0 65 4>;
@@ -562,7 +562,7 @@
 		};
 
 		usb1: usb@fe300000 {
-			compatible = "snps,dwc3"; /* 2.90a version in 1.0 silicon */
+			compatible = "snps,dwc3";
 			status = "disabled";
 			interrupt-parent = <&gic>;
 			interrupts = <0 70 4>;