From: Wendy Liang Date: Wed, 17 Apr 2013 03:59:18 +0000 (+1000) Subject: zynq_qspips:Break infinite loop after 1000 status read after trying to set qbit X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6a3c44bfb3fda7f1d52938ad4b621293c8b9d2ab;p=thirdparty%2Fu-boot.git zynq_qspips:Break infinite loop after 1000 status read after trying to set qbit Currently, u-boot end up in infinite loop when the status reg of the SPI flash is not 0 after it tries to set the quad bit. If quad bit setting fails, u-boot hangs because of this infinite loop. We introduce a counter. If the status register value is still not 0 after 1000 runs, it break the loop. Signed-off-by: Wendy Liang --- diff --git a/drivers/spi/zynq_qspips.c b/drivers/spi/zynq_qspips.c index 3fd2d1849df..338f250ce05 100644 --- a/drivers/spi/zynq_qspips.c +++ b/drivers/spi/zynq_qspips.c @@ -899,6 +899,7 @@ void spi_enable_quad_bit(struct spi_slave *spi) u8 rcr_cmd = 0x35; /* RCR */ u8 rdsr_cmd = 0x05; /* RDSR */ u8 wren_cmd = 0x06; /* WREN */ + int count = 0; ret = spi_flash_cmd(spi, rdid_cmd, &idcode, sizeof(idcode)); if (ret) { @@ -931,11 +932,12 @@ void spi_enable_quad_bit(struct spi_slave *spi) xqspips_write_quad_bit((void *)ZYNQ_QSPI_BASEADDR); /* Read RDSR */ + count = 0; do { ret = spi_flash_cmd_read(spi, &rdsr_cmd, sizeof(rdsr_cmd), &rcr_data, sizeof(rcr_data)); - } while ((ret == 0) && (rcr_data != 0)); + } while ((ret == 0) && (rcr_data != 0) && (count++<1000)); /* Read config register */ ret = spi_flash_cmd_read(spi, &rcr_cmd, sizeof(rcr_cmd),